added dbug's fec and network routines
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@@ -7,6 +7,8 @@
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#ifndef _MCD_API_H
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#define _MCD_API_H
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#include "bas_types.h"
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/*
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* Turn Execution Unit tasks ON (#define) or OFF (#undef)
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*/
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@@ -47,39 +49,33 @@
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/*
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* Portability typedefs
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*/
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typedef int s32;
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typedef unsigned int u32;
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typedef short s16;
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typedef unsigned short u16;
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typedef char s8;
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typedef unsigned char u8;
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/*
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* These structures represent the internal registers of the
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* multi-channel DMA
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*/
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struct dmaRegs_s {
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u32 taskbar; /* task table base address register */
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u32 currPtr;
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u32 endPtr;
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u32 varTablePtr;
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u16 dma_rsvd0;
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u16 ptdControl; /* ptd control */
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u32 intPending; /* interrupt pending register */
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u32 intMask; /* interrupt mask register */
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u16 taskControl[16]; /* task control registers */
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u8 priority[32]; /* priority registers */
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u32 initiatorMux; /* initiator mux control */
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u32 taskSize0; /* task size control register 0. */
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u32 taskSize1; /* task size control register 1. */
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u32 dma_rsvd1; /* reserved */
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u32 dma_rsvd2; /* reserved */
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u32 debugComp1; /* debug comparator 1 */
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u32 debugComp2; /* debug comparator 2 */
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u32 debugControl; /* debug control */
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u32 debugStatus; /* debug status */
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u32 ptdDebug; /* priority task decode debug */
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u32 dma_rsvd3[31]; /* reserved */
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uint32_t taskbar; /* task table base address register */
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uint32_t currPtr;
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uint32_t endPtr;
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uint32_t varTablePtr;
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uint16_t dma_rsvd0;
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uint16_t ptdControl; /* ptd control */
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uint32_t intPending; /* interrupt pending register */
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uint32_t intMask; /* interrupt mask register */
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uint16_t taskControl[16]; /* task control registers */
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uint8_t priority[32]; /* priority registers */
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uint32_t initiatorMux; /* initiator mux control */
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uint32_t taskSize0; /* task size control register 0. */
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uint32_t taskSize1; /* task size control register 1. */
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uint32_t dma_rsvd1; /* reserved */
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uint32_t dma_rsvd2; /* reserved */
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uint32_t debugComp1; /* debug comparator 1 */
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uint32_t debugComp2; /* debug comparator 2 */
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uint32_t debugControl; /* debug control */
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uint32_t debugStatus; /* debug status */
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uint32_t ptdDebug; /* priority task decode debug */
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uint32_t dma_rsvd3[31]; /* reserved */
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};
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typedef volatile struct dmaRegs_s dmaRegs;
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@@ -165,7 +161,7 @@ typedef volatile struct dmaRegs_s dmaRegs;
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*/
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/* Byte swapping: */
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#define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */
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#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */
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#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each uint32_t of the DMAed data. */
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#define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of
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each 32-bit data value being DMAed.*/
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#define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each
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@@ -232,44 +228,44 @@ typedef volatile struct dmaRegs_s dmaRegs;
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/* Task Table Entry struct*/
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typedef struct {
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u32 TDTstart; /* task descriptor table start */
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u32 TDTend; /* task descriptor table end */
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u32 varTab; /* variable table start */
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u32 FDTandFlags; /* function descriptor table start and flags */
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volatile u32 descAddrAndStatus;
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volatile u32 modifiedVarTab;
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u32 contextSaveSpace; /* context save space start */
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u32 literalBases;
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uint32_t TDTstart; /* task descriptor table start */
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uint32_t TDTend; /* task descriptor table end */
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uint32_t varTab; /* variable table start */
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uint32_t FDTandFlags; /* function descriptor table start and flags */
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volatile uint32_t descAddrAndStatus;
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volatile uint32_t modifiedVarTab;
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uint32_t contextSaveSpace; /* context save space start */
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uint32_t literalBases;
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} TaskTableEntry;
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/* Chained buffer descriptor */
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typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
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struct MCD_bufDesc_struct {
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u32 flags; /* flags describing the DMA */
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u32 csumResult; /* checksum from checksumming performed since last checksum reset */
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s8 *srcAddr; /* the address to move data from */
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s8 *destAddr; /* the address to move data to */
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s8 *lastDestAddr; /* the last address written to */
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u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */
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uint32_t flags; /* flags describing the DMA */
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uint32_t csumResult; /* checksum from checksumming performed since last checksum reset */
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int8_t *srcAddr; /* the address to move data from */
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int8_t *destAddr; /* the address to move data to */
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int8_t *lastDestAddr; /* the last address written to */
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uint32_t dmaSize; /* the number of bytes to transfer independent of the transfer size */
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MCD_bufDesc *next; /* next buffer descriptor in chain */
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u32 info; /* private information about this descriptor; DMA does not affect it */
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uint32_t info; /* private information about this descriptor; DMA does not affect it */
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};
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/* Progress Query struct */
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typedef volatile struct MCD_XferProg_struct {
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s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */
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s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */
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u32 dmaSize; /* the amount of data transferred for the current buffer */
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int8_t *lastSrcAddr; /* the most-recent or last, post-increment source address */
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int8_t *lastDestAddr; /* the most-recent or last, post-increment destination address */
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uint32_t dmaSize; /* the amount of data transferred for the current buffer */
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MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
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} MCD_XferProg;
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/* FEC buffer descriptor */
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typedef volatile struct MCD_bufDescFec_struct {
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u16 statCtrl;
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u16 length;
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u32 dataPointer;
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uint16_t statCtrl;
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uint16_t length;
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uint32_t dataPointer;
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} MCD_bufDescFec;
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@@ -283,16 +279,16 @@ typedef volatile struct MCD_bufDescFec_struct {
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*/
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int MCD_startDma (
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int channel, /* the channel on which to run the DMA */
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s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */
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s16 srcIncr, /* the amount to increment the source address per transfer */
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s8 *destAddr, /* the address to move data to */
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s16 destIncr, /* the amount to increment the destination address per transfer */
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u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */
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u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
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u32 initiator, /* what device initiates the DMA */
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int8_t *srcAddr, /* the address to move data from, or buffer-descriptor address */
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int16_t srcIncr, /* the amount to increment the source address per transfer */
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int8_t *destAddr, /* the address to move data to */
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int16_t destIncr, /* the amount to increment the destination address per transfer */
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uint32_t dmaSize, /* the number of bytes to transfer independent of the transfer size */
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uint32_t xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
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uint32_t initiator, /* what device initiates the DMA */
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int priority, /* priority of the DMA */
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u32 flags, /* flags describing the DMA */
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u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
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uint32_t flags, /* flags describing the DMA */
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uint32_t funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
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);
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/*
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@@ -300,7 +296,7 @@ int MCD_startDma (
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* registers, relocating and creating the appropriate task structures, and
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* setting up some global settings
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*/
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int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
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int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, uint32_t flags);
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/*
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* MCD_dmaStatus() returns the status of the DMA on the requested channel.
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@@ -339,7 +335,7 @@ int MCD_resumeDma (int channel);
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/*
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* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
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*/
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int MCD_csumQuery (int channel, u32 *csum);
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int MCD_csumQuery (int channel, uint32_t *csum);
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/*
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* MCD_getCodeSize provides the packed size required by the microcoded task
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@@ -354,7 +350,7 @@ int MCD_getCodeSize(void);
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int MCD_getVersion(char **longVersion);
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/* macro for setting a location in the variable table */
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#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
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#define MCD_SET_VAR(taskTab,idx,value) ((uint32_t *)(taskTab)->varTab)[idx] = value
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/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
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so I'm avoiding surrounding it with "do {} while(0)" */
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