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skip FPGA config load at reset ("warm start")

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This commit is contained in:
Markus Fröschle
2016-04-02 08:04:26 +00:00
parent 05c9e4d1bb
commit a4581785d3
4 changed files with 17 additions and 4 deletions
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2
BaS_gcc/flash_scripts/flash_firebee_bas.bdm
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@@ -11,7 +11,7 @@ wait
# use system sdram as flashlib scratch area. # use system sdram as flashlib scratch area.
# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet. # TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
# This seems to be related to large flash buffers and PC-relative adressing of the plugin # This seems to be related to large flash buffers and PC-relative adressing of the plugin
#flash-plugin 0x1000 0xf000 flash29-5475.plugin flash-plugin 0x1000 0xf000 flash29.plugin
# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29 # notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
flash 0xe0000000 flash 0xe0000000

16
BaS_gcc/sys/init_fpga.c
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@@ -95,13 +95,15 @@ bool init_fpga(void)
int i; int i;
xprintf("FPGA load config...\r\n"); xprintf("FPGA load config...\r\n");
xprintf("_FPGA_JTAG_LOADED = 0x%x\r\n", _FPGA_JTAG_LOADED);
xprintf("_FPGA_JTAG_VALID = 0x%x\r\n", _FPGA_JTAG_VALID);
if (_FPGA_JTAG_LOADED == 1 && _FPGA_JTAG_VALID == VALID_JTAG) if (_FPGA_JTAG_LOADED == 1 && _FPGA_JTAG_VALID == VALID_JTAG)
{ {
xprintf("detected _FPGA_JTAG_LOADED flag. FPGA config skipped.\r\n"); xprintf("detected _FPGA_JTAG_LOADED flag. FPGA config skipped.\r\n");
/* reset the flag so that next boot will load config again from flash */ /* reset the flag so that next boot will load config again from flash */
_FPGA_JTAG_LOADED = 0; // _FPGA_JTAG_LOADED = 0;
_FPGA_JTAG_VALID = 0; // _FPGA_JTAG_VALID = 0;
return true; return true;
} }
@@ -180,6 +182,16 @@ bool init_fpga(void)
xprintf("finished (took %f seconds).\r\n", time / 1000.0); xprintf("finished (took %f seconds).\r\n", time / 1000.0);
config_gpio_for_jtag_config(); config_gpio_for_jtag_config();
/*
* assure skipping fpga load on warm boot
*/
_FPGA_JTAG_LOADED = 1;
_FPGA_JTAG_VALID = VALID_JTAG;
xprintf("SRAM now set to FPGA load skip\r\n");
return true; return true;
} }
xprintf("FAILED!\r\n"); xprintf("FAILED!\r\n");

1
BaS_gcc/sys/startcf.S
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@@ -41,6 +41,7 @@ _rom_entry:
clr.l d0 clr.l d0
move.l d0,MCF_MMU_MMUCR move.l d0,MCF_MMU_MMUCR
nop
#if !defined(MACHINE_M54455) // MCF54455 does not have RAMBAR0 and RAMBAR1 registers */ #if !defined(MACHINE_M54455) // MCF54455 does not have RAMBAR0 and RAMBAR1 registers */