patch with Fredi's lp fix (and others)
This commit is contained in:
64
altpll1.vhd
64
altpll1.vhd
@@ -14,11 +14,11 @@
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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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--
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-- 13.1.4 Build 182 03/12/2014 SJ Web Edition
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-- 9.1 Build 350 03/24/2010 SP 2 SJ Web Edition
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-- ************************************************************
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--Copyright (C) 1991-2014 Altera Corporation
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--Copyright (C) 1991-2010 Altera Corporation
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--Your use of Altera Corporation's design tools, logic functions
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--and other software and tools, and its AMPP partner logic
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--functions, and any output files from any of the foregoing
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@@ -131,35 +131,35 @@ ARCHITECTURE SYN OF altpll1 IS
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width_clock : NATURAL
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);
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PORT (
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clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0);
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inclk : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
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locked : OUT STD_LOGIC
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locked : OUT STD_LOGIC ;
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clk : OUT STD_LOGIC_VECTOR (4 DOWNTO 0)
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);
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END COMPONENT;
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BEGIN
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sub_wire7_bv(0 DOWNTO 0) <= "0";
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sub_wire7 <= To_stdlogicvector(sub_wire7_bv);
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sub_wire4 <= sub_wire0(2);
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sub_wire3 <= sub_wire0(0);
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sub_wire1 <= sub_wire0(1);
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c1 <= sub_wire1;
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locked <= sub_wire2;
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c0 <= sub_wire3;
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c2 <= sub_wire4;
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sub_wire3 <= sub_wire0(2);
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sub_wire2 <= sub_wire0(1);
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sub_wire1 <= sub_wire0(0);
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c0 <= sub_wire1;
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c1 <= sub_wire2;
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c2 <= sub_wire3;
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locked <= sub_wire4;
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sub_wire5 <= inclk0;
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sub_wire6 <= sub_wire7(0 DOWNTO 0) & sub_wire5;
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altpll_component : altpll
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GENERIC MAP (
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bandwidth_type => "AUTO",
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clk0_divide_by => 66,
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clk0_divide_by => 11,
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clk0_duty_cycle => 50,
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clk0_multiply_by => 1,
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clk0_multiply_by => 16,
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clk0_phase_shift => "0",
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clk1_divide_by => 6875,
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clk1_divide_by => 33,
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clk1_duty_cycle => 50,
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clk1_multiply_by => 512,
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clk1_multiply_by => 16,
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clk1_phase_shift => "0",
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clk2_divide_by => 1375,
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clk2_duty_cycle => 50,
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@@ -218,7 +218,7 @@ BEGIN
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PORT MAP (
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inclk => sub_wire6,
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clk => sub_wire0,
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locked => sub_wire2
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locked => sub_wire4
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);
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@@ -244,14 +244,14 @@ END SYN;
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-- Retrieval info: PRIVATE: CUR_DEDICATED_CLK STRING "c0"
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-- Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "e0"
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-- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
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-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "90"
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-- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
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-- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "900"
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-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "90"
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-- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
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-- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
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-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
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-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "0.500000"
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-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "2.457600"
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-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "48.000000"
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-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "16.000000"
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-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "24.576000"
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-- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
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-- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
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@@ -270,21 +270,21 @@ END SYN;
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-- Retrieval info: PRIVATE: INT_FEEDBACK__MODE_RADIO STRING "1"
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-- Retrieval info: PRIVATE: LOCKED_OUTPUT_CHECK STRING "1"
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-- Retrieval info: PRIVATE: LONG_SCAN_RADIO STRING "1"
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-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available"
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-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "330.000"
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-- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
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-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
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-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "ps"
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-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
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-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "deg"
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-- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
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-- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
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-- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
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-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
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-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "67"
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-- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1"
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-- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "67"
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-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "67"
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-- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "0"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "0.50000000"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "2.45760000"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "48.00000000"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "16.00000000"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "24.57600000"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1"
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-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1"
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@@ -298,7 +298,7 @@ END SYN;
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-- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
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-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
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-- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
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-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
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-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "ps"
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-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
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-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
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-- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
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@@ -338,13 +338,13 @@ END SYN;
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-- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
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-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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-- Retrieval info: CONSTANT: BANDWIDTH_TYPE STRING "AUTO"
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-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "66"
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-- Retrieval info: CONSTANT: CLK0_DIVIDE_BY NUMERIC "11"
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-- Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50"
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-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "1"
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-- Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "16"
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-- Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0"
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-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "6875"
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-- Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "33"
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-- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
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-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "512"
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-- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "16"
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-- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
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-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "1375"
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-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
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@@ -406,17 +406,17 @@ END SYN;
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-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
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-- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
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-- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
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-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
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-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
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-- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
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-- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
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-- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
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-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
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-- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
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-- Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1.vhd TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1.ppf TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1.inc TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1.cmp TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1.bsf TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1.bsf TRUE FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1_inst.vhd FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1_waveforms.html TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL altpll1_wave*.jpg FALSE
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