fixed formatting
This commit is contained in:
@@ -106,11 +106,11 @@ ENTITY firebee IS
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clk_ddr_OUTn : OUT STD_LOGIC;
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clk_ddr_OUTn : OUT STD_LOGIC;
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CLK_USB : OUT STD_LOGIC;
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CLK_USB : OUT STD_LOGIC;
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FB_AD : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0);
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FB_AD : INOUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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FB_ALE : IN STD_LOGIC;
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FB_ALE : IN STD_LOGIC;
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FB_BURSTn : IN STD_LOGIC;
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FB_BURSTn : IN STD_LOGIC;
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FB_CSn : IN STD_LOGIC_VECTOR(3 DOWNTO 1);
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FB_CSn : IN STD_LOGIC_VECTOR (3 DOWNTO 1);
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FB_SIZE : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
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FB_SIZE : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
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FB_OEn : IN STD_LOGIC;
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FB_OEn : IN STD_LOGIC;
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FB_WRn : IN STD_LOGIC;
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FB_WRn : IN STD_LOGIC;
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FB_TAn : OUT STD_LOGIC;
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FB_TAn : OUT STD_LOGIC;
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@@ -124,8 +124,8 @@ ENTITY firebee IS
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LED_FPGA_OK : OUT STD_LOGIC;
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LED_FPGA_OK : OUT STD_LOGIC;
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RESERVED_1 : OUT STD_LOGIC;
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RESERVED_1 : OUT STD_LOGIC;
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VA : OUT STD_LOGIC_VECTOR(12 DOWNTO 0);
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VA : OUT STD_LOGIC_VECTOR (12 DOWNTO 0);
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BA : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
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BA : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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VWEn : OUT STD_LOGIC;
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VWEn : OUT STD_LOGIC;
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VcaSn : OUT STD_LOGIC;
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VcaSn : OUT STD_LOGIC;
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VRASn : OUT STD_LOGIC;
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VRASn : OUT STD_LOGIC;
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@@ -137,14 +137,14 @@ ENTITY firebee IS
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HSYNC : OUT STD_LOGIC;
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HSYNC : OUT STD_LOGIC;
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BLANKn : OUT STD_LOGIC;
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BLANKn : OUT STD_LOGIC;
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VR : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
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VR : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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VG : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
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VG : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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VB : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
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VB : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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VDM : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
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VDM : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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VD : INOUT STD_LOGIC_VECTOR(31 DOWNTO 0);
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VD : INOUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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VD_QS : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
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VD_QS : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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PD_VGAn : OUT STD_LOGIC;
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PD_VGAn : OUT STD_LOGIC;
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VCKE : OUT STD_LOGIC;
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VCKE : OUT STD_LOGIC;
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@@ -156,14 +156,14 @@ ENTITY firebee IS
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PCI_INTCn : IN STD_LOGIC;
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PCI_INTCn : IN STD_LOGIC;
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PCI_INTDn : IN STD_LOGIC;
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PCI_INTDn : IN STD_LOGIC;
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IRQn : OUT STD_LOGIC_VECTOR(7 DOWNTO 2);
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IRQn : OUT STD_LOGIC_VECTOR (7 DOWNTO 2);
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TIN0 : OUT STD_LOGIC;
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TIN0 : OUT STD_LOGIC;
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YM_QA : OUT STD_LOGIC;
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YM_QA : OUT STD_LOGIC;
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YM_QB : OUT STD_LOGIC;
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YM_QB : OUT STD_LOGIC;
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YM_QC : OUT STD_LOGIC;
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YM_QC : OUT STD_LOGIC;
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LP_D : INOUT STD_LOGIC_VECTOR(7 DOWNTO 0);
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LP_D : INOUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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LP_DIR : OUT STD_LOGIC;
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LP_DIR : OUT STD_LOGIC;
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DSA_D : OUT STD_LOGIC;
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DSA_D : OUT STD_LOGIC;
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@@ -194,11 +194,11 @@ ENTITY firebee IS
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SCSI_BUSYn : INOUT STD_LOGIC;
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SCSI_BUSYn : INOUT STD_LOGIC;
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SCSI_RSTn : INOUT STD_LOGIC;
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SCSI_RSTn : INOUT STD_LOGIC;
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SCSI_DIR : OUT STD_LOGIC;
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SCSI_DIR : OUT STD_LOGIC;
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SCSI_D : INOUT STD_LOGIC_VECTOR(7 DOWNTO 0);
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SCSI_D : INOUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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SCSI_PAR : INOUT STD_LOGIC;
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SCSI_PAR : INOUT STD_LOGIC;
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ACSI_DIR : OUT STD_LOGIC;
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ACSI_DIR : OUT STD_LOGIC;
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ACSI_D : INOUT STD_LOGIC_VECTOR(7 DOWNTO 0);
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ACSI_D : INOUT STD_LOGIC_VECTOR (7 DOWNTO 0);
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ACSI_CSn : OUT STD_LOGIC;
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ACSI_CSn : OUT STD_LOGIC;
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ACSI_A1 : OUT STD_LOGIC;
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ACSI_A1 : OUT STD_LOGIC;
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ACSI_reset_n : OUT STD_LOGIC;
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ACSI_reset_n : OUT STD_LOGIC;
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@@ -234,10 +234,10 @@ ENTITY firebee IS
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SD_WP : IN STD_LOGIC;
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SD_WP : IN STD_LOGIC;
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CF_WP : IN STD_LOGIC;
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CF_WP : IN STD_LOGIC;
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CF_CSn : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
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CF_CSn : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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DSP_IO : INOUT STD_LOGIC_VECTOR(17 DOWNTO 0);
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DSP_IO : INOUT STD_LOGIC_VECTOR (17 DOWNTO 0);
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DSP_SRD : INOUT STD_LOGIC_VECTOR(15 DOWNTO 0);
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DSP_SRD : INOUT STD_LOGIC_VECTOR (15 DOWNTO 0);
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DSP_SRCSn : OUT STD_LOGIC;
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DSP_SRCSn : OUT STD_LOGIC;
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DSP_SRBLEn : OUT STD_LOGIC;
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DSP_SRBLEn : OUT STD_LOGIC;
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DSP_SRBHEn : OUT STD_LOGIC;
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DSP_SRBHEn : OUT STD_LOGIC;
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@@ -249,7 +249,7 @@ ENTITY firebee IS
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IDE_RES : OUT STD_LOGIC;
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IDE_RES : OUT STD_LOGIC;
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IDE_WRn : OUT STD_LOGIC;
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IDE_WRn : OUT STD_LOGIC;
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IDE_RDn : OUT STD_LOGIC;
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IDE_RDn : OUT STD_LOGIC;
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IDE_CSn : OUT STD_LOGIC_VECTOR(1 DOWNTO 0)
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IDE_CSn : OUT STD_LOGIC_VECTOR (1 DOWNTO 0)
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);
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);
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END ENTITY firebee;
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END ENTITY firebee;
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@@ -278,9 +278,9 @@ ARCHITECTURE Structure of firebee is
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COMPONENT altpll3
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COMPONENT altpll3
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PORT(
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PORT(
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inclk0 : IN STD_LOGIC := '0';
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inclk0 : IN STD_LOGIC := '0';
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c0 : OUT STD_LOGIC ;
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c0 : OUT STD_LOGIC;
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c1 : OUT STD_LOGIC ;
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c1 : OUT STD_LOGIC;
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c2 : OUT STD_LOGIC ;
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c2 : OUT STD_LOGIC;
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c3 : OUT STD_LOGIC
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c3 : OUT STD_LOGIC
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);
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);
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END COMPONENT;
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END COMPONENT;
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@@ -293,9 +293,9 @@ ARCHITECTURE Structure of firebee is
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scanclk : IN STD_LOGIC := '1';
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scanclk : IN STD_LOGIC := '1';
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scanclkena : IN STD_LOGIC := '0';
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scanclkena : IN STD_LOGIC := '0';
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scandata : IN STD_LOGIC := '0';
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scandata : IN STD_LOGIC := '0';
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c0 : OUT STD_LOGIC ;
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c0 : OUT STD_LOGIC;
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locked : OUT STD_LOGIC ;
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locked : OUT STD_LOGIC;
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scandataOUT : OUT STD_LOGIC ;
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scandataOUT : OUT STD_LOGIC;
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scandone : OUT STD_LOGIC
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scandone : OUT STD_LOGIC
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);
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);
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END COMPONENT;
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END COMPONENT;
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@@ -325,55 +325,55 @@ ARCHITECTURE Structure of firebee is
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SIGNAL acia_cs : STD_LOGIC;
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SIGNAL acia_cs : STD_LOGIC;
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SIGNAL acia_irq_n : STD_LOGIC;
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SIGNAL acia_irq_n : STD_LOGIC;
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SIGNAL acsi_d_out : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL acsi_d_out : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL acsi_d_en : STD_LOGIC;
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SIGNAL acsi_d_en : STD_LOGIC;
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SIGNAL blank_i_n : STD_LOGIC;
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SIGNAL blank_i_n : STD_LOGIC;
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SIGNAL blitter_adr : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL blitter_adr : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL blitter_dack_sr : STD_LOGIC;
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SIGNAL blitter_dack_sr : STD_LOGIC;
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SIGNAL blitter_dout : STD_LOGIC_VECTOR(127 DOWNTO 0);
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SIGNAL blitter_dout : STD_LOGIC_VECTOR (127 DOWNTO 0);
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SIGNAL blitter_on : STD_LOGIC;
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SIGNAL blitter_on : STD_LOGIC;
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SIGNAL blitter_run : STD_LOGIC;
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SIGNAL blitter_run : STD_LOGIC;
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SIGNAL blitter_sig : STD_LOGIC;
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SIGNAL blitter_sig : STD_LOGIC;
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SIGNAL blitter_ta : STD_LOGIC;
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SIGNAL blitter_ta : STD_LOGIC;
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SIGNAL blitter_wr : STD_LOGIC;
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SIGNAL blitter_wr : STD_LOGIC;
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SIGNAL byte : STD_LOGIC; -- When Byte -> 1
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SIGNAL byte : STD_LOGIC; -- When Byte -> 1
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SIGNAL ca : STD_LOGIC_VECTOR(2 DOWNTO 0);
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SIGNAL ca : STD_LOGIC_VECTOR (2 DOWNTO 0);
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SIGNAL clk_2m0 : STD_LOGIC;
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SIGNAL clk_2m0 : STD_LOGIC;
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SIGNAL clk_2m4576 : STD_LOGIC;
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SIGNAL clk_2m4576 : STD_LOGIC;
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SIGNAL clk_25m_i : STD_LOGIC;
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SIGNAL clk_25m_i : STD_LOGIC;
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SIGNAL clk_48m : STD_LOGIC;
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SIGNAL clk_48m : STD_LOGIC;
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SIGNAL clk_500k : STD_LOGIC;
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SIGNAL clk_500k : STD_LOGIC;
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SIGNAL clk_ddr : STD_LOGIC_VECTOR(3 DOWNTO 0);
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SIGNAL clk_ddr : STD_LOGIC_VECTOR (3 DOWNTO 0);
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SIGNAL clk_fdc : STD_LOGIC;
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SIGNAL clk_fdc : STD_LOGIC;
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SIGNAL clk_pixel_i : STD_LOGIC;
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SIGNAL clk_pixel_i : STD_LOGIC;
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SIGNAL clk_video : STD_LOGIC;
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SIGNAL clk_video : STD_LOGIC;
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SIGNAL da_out_x : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL da_out_x : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL data_en_blitter : STD_LOGIC;
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SIGNAL data_en_blitter : STD_LOGIC;
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SIGNAL data_en_h_ddr_ctrl : STD_LOGIC;
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SIGNAL data_en_h_ddr_ctrl : STD_LOGIC;
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SIGNAL data_en_l_ddr_ctrl : STD_LOGIC;
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SIGNAL data_en_l_ddr_ctrl : STD_LOGIC;
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SIGNAL data_in_fdc_scsi : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL data_in_fdc_scsi : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL data_out_acia_i : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL data_out_acia_i : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL data_out_acia_iI : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL data_out_acia_iI : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL data_out_blitter : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL data_out_blitter : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL data_out_ddr_ctrl : STD_LOGIC_VECTOR(31 DOWNTO 16);
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SIGNAL data_out_ddr_ctrl : STD_LOGIC_VECTOR (31 DOWNTO 16);
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SIGNAL data_out_fdc : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL data_out_fdc : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL data_out_mfp : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL data_out_mfp : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL data_out_scsi : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL data_out_scsi : STD_LOGIC_VECTOR (7 DOWNTO 0);
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SIGNAL dint_n : STD_LOGIC;
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SIGNAL dint_n : STD_LOGIC;
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SIGNAL ddr_d_in_n : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL ddr_d_in_n : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL ddr_fb : STD_LOGIC_VECTOR(4 DOWNTO 0);
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SIGNAL ddr_fb : STD_LOGIC_VECTOR (4 DOWNTO 0);
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SIGNAL ddr_sync_66m : STD_LOGIC;
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SIGNAL ddr_sync_66m : STD_LOGIC;
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SIGNAL ddr_wr : STD_LOGIC;
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SIGNAL ddr_wr : STD_LOGIC;
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SIGNAL ddrwr_d_sel : STD_LOGIC_VECTOR(1 DOWNTO 0);
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SIGNAL ddrwr_d_sel : STD_LOGIC_VECTOR (1 DOWNTO 0);
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SIGNAL dma_cs : STD_LOGIC;
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SIGNAL dma_cs : STD_LOGIC;
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SIGNAL drq11_dma : STD_LOGIC;
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SIGNAL drq11_dma : STD_LOGIC;
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SIGNAL drq_fdc : STD_LOGIC;
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SIGNAL drq_fdc : STD_LOGIC;
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SIGNAL drq_dma : STD_LOGIC;
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SIGNAL drq_dma : STD_LOGIC;
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SIGNAL dsp_int : STD_LOGIC;
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SIGNAL dsp_int : STD_LOGIC;
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SIGNAL dsp_io_en : STD_LOGIC;
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SIGNAL dsp_io_en : STD_LOGIC;
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SIGNAL dsp_io_out : STD_LOGIC_VECTOR(17 DOWNTO 0);
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SIGNAL dsp_io_out : STD_LOGIC_VECTOR (17 DOWNTO 0);
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SIGNAL dsp_srd_en : STD_LOGIC;
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SIGNAL dsp_srd_en : STD_LOGIC;
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SIGNAL dsp_srd_out : STD_LOGIC_VECTOR(15 DOWNTO 0);
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SIGNAL dsp_srd_out : STD_LOGIC_VECTOR (15 DOWNTO 0);
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SIGNAL dsp_ta : STD_LOGIC;
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SIGNAL dsp_ta : STD_LOGIC;
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SIGNAL dtack_out_mfp_n : STD_LOGIC;
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SIGNAL dtack_out_mfp_n : STD_LOGIC;
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SIGNAL falcon_io_ta : STD_LOGIC;
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SIGNAL falcon_io_ta : STD_LOGIC;
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@@ -391,23 +391,23 @@ ARCHITECTURE Structure of firebee is
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SIGNAL fb_ad_en_dsp : STD_LOGIC;
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SIGNAL fb_ad_en_dsp : STD_LOGIC;
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SIGNAL fb_ad_en_rtc : STD_LOGIC;
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SIGNAL fb_ad_en_rtc : STD_LOGIC;
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SIGNAL fb_ad_out_dma : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL fb_ad_out_dma : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL fb_ad_out_dsp : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL fb_ad_out_dsp : STD_LOGIC_VECTOR (31 DOWNTO 0);
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||||||
SIGNAL fb_ad_out_ih : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL fb_ad_out_ih : STD_LOGIC_VECTOR (31 DOWNTO 0);
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||||||
SIGNAL fb_ad_out_rtc : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL fb_ad_out_rtc : STD_LOGIC_VECTOR (7 DOWNTO 0);
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||||||
SIGNAL fb_ad_out_video : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL fb_ad_out_video : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL fb_adr : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL fb_adr : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL fb_b0 : STD_LOGIC; -- UPPER Byte BEI 16 STD_LOGIC BUS
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SIGNAL fb_b0 : STD_LOGIC; -- UPPER Byte BEI 16 STD_LOGIC BUS
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||||||
SIGNAL fb_b1 : STD_LOGIC; -- LOWER Byte BEI 16 STD_LOGIC BUS
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SIGNAL fb_b1 : STD_LOGIC; -- LOWER Byte BEI 16 STD_LOGIC BUS
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SIGNAL fb_ddr : STD_LOGIC_VECTOR(127 DOWNTO 0);
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SIGNAL fb_ddr : STD_LOGIC_VECTOR (127 DOWNTO 0);
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SIGNAL fb_le : STD_LOGIC_VECTOR(3 DOWNTO 0);
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SIGNAL fb_le : STD_LOGIC_VECTOR (3 DOWNTO 0);
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SIGNAL fb_vdoe : STD_LOGIC_VECTOR(3 DOWNTO 0);
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SIGNAL fb_vdoe : STD_LOGIC_VECTOR (3 DOWNTO 0);
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SIGNAL fbee_conf : STD_LOGIC_VECTOR(31 DOWNTO 0);
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SIGNAL fbee_conf : STD_LOGIC_VECTOR (31 DOWNTO 0);
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SIGNAL fd_int : STD_LOGIC;
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SIGNAL fd_int : STD_LOGIC;
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SIGNAL fdc_cs_n : STD_LOGIC;
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SIGNAL fdc_cs_n : STD_LOGIC;
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SIGNAL fdc_wr_n : STD_LOGIC;
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SIGNAL fdc_wr_n : STD_LOGIC;
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SIGNAL fifo_clr : STD_LOGIC;
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SIGNAL fifo_clr : STD_LOGIC;
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SIGNAL fifo_mw : STD_LOGIC_VECTOR(8 DOWNTO 0);
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SIGNAL fifo_mw : STD_LOGIC_VECTOR (8 DOWNTO 0);
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SIGNAL hd_dd_out : STD_LOGIC;
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SIGNAL hd_dd_out : STD_LOGIC;
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SIGNAL hsync_i : STD_LOGIC;
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SIGNAL hsync_i : STD_LOGIC;
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SIGNAL ide_cf_ta : STD_LOGIC;
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SIGNAL ide_cf_ta : STD_LOGIC;
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||||||
@@ -418,7 +418,7 @@ ARCHITECTURE Structure of firebee is
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|||||||
SIGNAL keyb_rxd : STD_LOGIC;
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SIGNAL keyb_rxd : STD_LOGIC;
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||||||
SIGNAL lds : STD_LOGIC;
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SIGNAL lds : STD_LOGIC;
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SIGNAL locked : STD_LOGIC;
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SIGNAL locked : STD_LOGIC;
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SIGNAL lp_d_x : STD_LOGIC_VECTOR(7 DOWNTO 0);
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SIGNAL lp_d_x : STD_LOGIC_VECTOR (7 DOWNTO 0);
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||||||
SIGNAL lp_dir_x : STD_LOGIC;
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SIGNAL lp_dir_x : STD_LOGIC;
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||||||
SIGNAL mfp_cs : STD_LOGIC;
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SIGNAL mfp_cs : STD_LOGIC;
|
||||||
SIGNAL mfp_intack : STD_LOGIC;
|
SIGNAL mfp_intack : STD_LOGIC;
|
||||||
@@ -443,7 +443,7 @@ ARCHITECTURE Structure of firebee is
|
|||||||
SIGNAL scsi_dbp_out_n : STD_LOGIC;
|
SIGNAL scsi_dbp_out_n : STD_LOGIC;
|
||||||
SIGNAL scsi_drq : STD_LOGIC;
|
SIGNAL scsi_drq : STD_LOGIC;
|
||||||
SIGNAL scsi_int : STD_LOGIC;
|
SIGNAL scsi_int : STD_LOGIC;
|
||||||
SIGNAL scsi_d_out_n : STD_LOGIC_VECTOR(7 DOWNTO 0);
|
SIGNAL scsi_d_out_n : STD_LOGIC_VECTOR (7 DOWNTO 0);
|
||||||
SIGNAL scsi_rst_en : STD_LOGIC;
|
SIGNAL scsi_rst_en : STD_LOGIC;
|
||||||
SIGNAL scsi_rst_out_n : STD_LOGIC;
|
SIGNAL scsi_rst_out_n : STD_LOGIC;
|
||||||
SIGNAL scsi_sel_en : STD_LOGIC;
|
SIGNAL scsi_sel_en : STD_LOGIC;
|
||||||
@@ -460,28 +460,28 @@ ARCHITECTURE Structure of firebee is
|
|||||||
SIGNAL sr_ddr_wr : STD_LOGIC;
|
SIGNAL sr_ddr_wr : STD_LOGIC;
|
||||||
SIGNAL sr_ddrwr_d_sel : STD_LOGIC;
|
SIGNAL sr_ddrwr_d_sel : STD_LOGIC;
|
||||||
SIGNAL sr_fifo_wre : STD_LOGIC;
|
SIGNAL sr_fifo_wre : STD_LOGIC;
|
||||||
SIGNAL sr_vdmp : STD_LOGIC_VECTOR(7 DOWNTO 0);
|
SIGNAL sr_vdmp : STD_LOGIC_VECTOR (7 DOWNTO 0);
|
||||||
SIGNAL tdo : STD_LOGIC;
|
SIGNAL tdo : STD_LOGIC;
|
||||||
SIGNAL timebase : unsigned (17 DOWNTO 0);
|
SIGNAL timebase : UNSIGNED (17 DOWNTO 0);
|
||||||
SIGNAL vd_en : STD_LOGIC;
|
SIGNAL vd_en : STD_LOGIC;
|
||||||
SIGNAL vd_en_i : STD_LOGIC;
|
SIGNAL vd_en_i : STD_LOGIC;
|
||||||
SIGNAL vd_out : STD_LOGIC_VECTOR(31 DOWNTO 0);
|
SIGNAL vd_out : STD_LOGIC_VECTOR (31 DOWNTO 0);
|
||||||
SIGNAL vd_qs_en : STD_LOGIC;
|
SIGNAL vd_qs_en : STD_LOGIC;
|
||||||
SIGNAL vd_qs_out : STD_LOGIC_VECTOR(3 DOWNTO 0);
|
SIGNAL vd_qs_out : STD_LOGIC_VECTOR (3 DOWNTO 0);
|
||||||
SIGNAL vd_vz : STD_LOGIC_VECTOR(127 DOWNTO 0);
|
SIGNAL vd_vz : STD_LOGIC_VECTOR (127 DOWNTO 0);
|
||||||
SIGNAL vdm_sel : STD_LOGIC_VECTOR(3 DOWNTO 0);
|
SIGNAL vdm_sel : STD_LOGIC_VECTOR (3 DOWNTO 0);
|
||||||
SIGNAL vdp_in : STD_LOGIC_VECTOR(63 DOWNTO 0);
|
SIGNAL vdp_in : STD_LOGIC_VECTOR (63 DOWNTO 0);
|
||||||
SIGNAL vdp_out : STD_LOGIC_VECTOR(63 DOWNTO 0);
|
SIGNAL vdp_out : STD_LOGIC_VECTOR (63 DOWNTO 0);
|
||||||
SIGNAL vdp_q1 : STD_LOGIC_VECTOR(31 DOWNTO 0);
|
SIGNAL vdp_q1 : STD_LOGIC_VECTOR (31 DOWNTO 0);
|
||||||
SIGNAL vdp_q2 : STD_LOGIC_VECTOR(31 DOWNTO 0);
|
SIGNAL vdp_q2 : STD_LOGIC_VECTOR (31 DOWNTO 0);
|
||||||
SIGNAL vdp_q3 : STD_LOGIC_VECTOR(31 DOWNTO 0);
|
SIGNAL vdp_q3 : STD_LOGIC_VECTOR (31 DOWNTO 0);
|
||||||
SIGNAL vdr : STD_LOGIC_VECTOR(31 DOWNTO 0);
|
SIGNAL vdr : STD_LOGIC_VECTOR (31 DOWNTO 0);
|
||||||
SIGNAL video_ddr_ta : STD_LOGIC;
|
SIGNAL video_ddr_ta : STD_LOGIC;
|
||||||
SIGNAL video_mod_ta : STD_LOGIC;
|
SIGNAL video_mod_ta : STD_LOGIC;
|
||||||
SIGNAL video_ram_ctr : STD_LOGIC_VECTOR(15 DOWNTO 0);
|
SIGNAL video_ram_ctr : STD_LOGIC_VECTOR (15 DOWNTO 0);
|
||||||
SIGNAL video_reconfig : STD_LOGIC;
|
SIGNAL video_reconfig : STD_LOGIC;
|
||||||
SIGNAL vr_busy : STD_LOGIC;
|
SIGNAL vr_busy : STD_LOGIC;
|
||||||
SIGNAL vr_d : STD_LOGIC_VECTOR(8 DOWNTO 0);
|
SIGNAL vr_d : STD_LOGIC_VECTOR (8 DOWNTO 0);
|
||||||
SIGNAL vr_rd : STD_LOGIC;
|
SIGNAL vr_rd : STD_LOGIC;
|
||||||
SIGNAL vr_wr : STD_LOGIC;
|
SIGNAL vr_wr : STD_LOGIC;
|
||||||
SIGNAL vsync_i : STD_LOGIC;
|
SIGNAL vsync_i : STD_LOGIC;
|
||||||
@@ -535,9 +535,9 @@ BEGIN
|
|||||||
reconfig => video_reconfig,
|
reconfig => video_reconfig,
|
||||||
read_param => vr_rd,
|
read_param => vr_rd,
|
||||||
write_param => vr_wr,
|
write_param => vr_wr,
|
||||||
data_in => FB_AD(24 DOWNTO 16), -- FIXED: this looks like a typo. Must be FB_AD(24 DOWNTO 16) instead of fb_adr(24 DOWNTO 16)
|
data_in => FB_AD (24 DOWNTO 16), -- FIXED: this looks like a typo. Must be FB_AD(24 DOWNTO 16) instead of fb_adr(24 DOWNTO 16)
|
||||||
counter_type => fb_adr(5 DOWNTO 2),
|
counter_type => fb_adr (5 DOWNTO 2),
|
||||||
counter_param => fb_adr(8 DOWNTO 6),
|
counter_param => fb_adr (8 DOWNTO 6),
|
||||||
pll_scandataout => pll_scandataout,
|
pll_scandataout => pll_scandataout,
|
||||||
pll_scandone => pll_scandone,
|
pll_scandone => pll_scandone,
|
||||||
clock => CLK_MAIN,
|
clock => CLK_MAIN,
|
||||||
|
|||||||
Reference in New Issue
Block a user