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fix __MBAR and __RAMBAR for MCF54455

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This commit is contained in:
Markus Fröschle
2015-11-20 12:34:17 +00:00
parent dce790c044
commit 9a6f9427a7
2 changed files with 23 additions and 4 deletions
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11
BaS_gcc/bas.lk.in
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@@ -223,6 +223,7 @@ SECTIONS
/* MMU memory mapped registers */ /* MMU memory mapped registers */
__MMUBAR = 0xFF040000; __MMUBAR = 0xFF040000;
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
/* /*
* 4KB on-chip Core SRAM0: -> exception table * 4KB on-chip Core SRAM0: -> exception table
*/ */
@@ -233,6 +234,11 @@ SECTIONS
__RAMBAR1 = 0xFF101000; __RAMBAR1 = 0xFF101000;
__RAMBAR1_SIZE = 0x00001000; __RAMBAR1_SIZE = 0x00001000;
__SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4; __SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4;
#else
__RAMBAR0 = 0x80000000; /* RAMBAR must be between 0x80000000 on MCF54455 */
__RAMBAR0_SIZE = 0x1000;
__SUP_SP = __RAMBAR0 + __RAMBAR0_SIZE + 0x1000 - 4;
#endif
/* /*
* FPGA_JTAG_LOADED (if 1) indicates that FPGA configuration has been loaded through JTAG * FPGA_JTAG_LOADED (if 1) indicates that FPGA configuration has been loaded through JTAG
@@ -240,8 +246,13 @@ SECTIONS
* by a random uninitialised value), __FPGA_JTAG_VALID is used as a "magic value" and must be * by a random uninitialised value), __FPGA_JTAG_VALID is used as a "magic value" and must be
* 0xaffeaffe to make this work. * 0xaffeaffe to make this work.
*/ */
#if !defined(MACHINE_M54455) /* MCF54455 does not have RAMBAR0 and RAMBAR1 */
__FPGA_JTAG_LOADED = __RAMBAR1; __FPGA_JTAG_LOADED = __RAMBAR1;
__FPGA_JTAG_VALID = __RAMBAR1 + 4; __FPGA_JTAG_VALID = __RAMBAR1 + 4;
#else
__FPGA_JTAG_LOADED = __RAMBAR0 + 0x1000;
__FPGA_JTAG_VALID = __RAMBAR0 + 0x1000 + 4;
#endif
/* system variables */ /* system variables */
/* RAMBAR0 0 to 0x7FF -> exception vectors */ /* RAMBAR0 0 to 0x7FF -> exception vectors */

10
BaS_gcc/sys/startcf.S
View File

@@ -28,10 +28,12 @@ _rom_entry:
/* disable interrupts */ /* disable interrupts */
move.w #0x2700,sr move.w #0x2700,sr
#if !defined(MACHINE_M54455) // MCF54455 does not have the MBAR register
/* Initialize MBAR */ /* Initialize MBAR */
move.l #__MBAR,d0 move.l #__MBAR,d0
movec d0,MBAR movec d0,MBAR
move.l d0,_rt_mbar move.l d0,_rt_mbar
#endif
/* mmu off */ /* mmu off */
move.l #__MMUBAR+1,d0 move.l #__MMUBAR+1,d0
@@ -40,11 +42,17 @@ _rom_entry:
clr.l d0 clr.l d0
move.l d0,MCF_MMU_MMUCR move.l d0,MCF_MMU_MMUCR
#if !defined(MACHINE_M54455) // MCF54455 does not have RAMBAR0 and RAMBAR1 registers */
/* Initialize RAMBARs: locate SRAM and validate it */ /* Initialize RAMBARs: locate SRAM and validate it */
move.l #__RAMBAR0 + 0x7,d0 /* supervisor only */ move.l #__RAMBAR0 + 0x7,d0 // supervisor only
movec d0,RAMBAR0 movec d0,RAMBAR0
move.l #__RAMBAR1 + 0x1,d0 move.l #__RAMBAR1 + 0x1,d0
movec d0,RAMBAR1 movec d0,RAMBAR1
#else
move.l #__RAMBAR0 + 0x7,d0
movec d0,RAMBAR
#endif
/* set stack pointer to end of SRAM */ /* set stack pointer to end of SRAM */
lea __SUP_SP,a7 lea __SUP_SP,a7