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added register save and restore

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Markus Fröschle
2013-11-19 17:20:58 +00:00
parent 9d36718049
commit 94fb84aaa0
1 changed files with 10 additions and 1 deletions
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11
sources/exceptions.S
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@@ -554,8 +554,17 @@ access_mmu:
move.l MCF_MMU_MMUAR,d0 move.l MCF_MMU_MMUAR,d0
cmp.l #__FASTRAM_END,d0 // above max User RAM area? cmp.l #__FASTRAM_END,d0 // above max User RAM area?
bge bus_error // -> bus error bge bus_error // -> bus error
bsr _mmutr_miss // else we have an MMU TLB miss
lea -4*4(sp),sp
movem.l d0-d1/a0-a1,(sp)
jsr _mmutr_miss // else we have an MMU TLB miss
movem.l (sp),d0-d1/a0-a1
lea 4*4(sp),sp
move.l (sp)+,d0 // restore register move.l (sp)+,d0 // restore register
rte rte
bus_error: bus_error: