fixed PCIxxx() macros for little endian PCIBIOS routines
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@@ -37,7 +37,7 @@
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#define PCICR 0x04 /* PCI Command Register */
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#define PCICR 0x04 /* PCI Command Register */
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#define PCISR 0x06 /* PCI Status Register */
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#define PCISR 0x06 /* PCI Status Register */
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#define PCIREV 0x08 /* PCI Revision ID Register */
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#define PCIREV 0x08 /* PCI Revision ID Register */
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#define PCICCR 0x09 /* PCI Class Code Register */
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#define PCICCR 0x0B /* PCI Class Code Register */
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#define PCICLSR 0x0C /* PCI Cache Line Size Register */
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#define PCICLSR 0x0C /* PCI Cache Line Size Register */
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#define PCILTR 0x0D /* PCI Latency Timer Register */
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#define PCILTR 0x0D /* PCI Latency Timer Register */
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#define PCIHTR 0x0E /* PCI Header Type Register */
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#define PCIHTR 0x0E /* PCI Header Type Register */
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@@ -155,16 +155,16 @@ typedef struct /* structure of address conversion */
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/* PCI configuration space macros */
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/* PCI configuration space macros */
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/* register 0x00 macros */
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/* register 0x00 macros */
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#define PCI_VENDOR_ID(i) ((i) & 0xffff)
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#define PCI_VENDOR_ID(i) swpw((uint16_t)(((i) & 0xffff0000) >> 16))
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#define PCI_DEVICE_ID(i) (((i) & 0xffff0000) >> 16)
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#define PCI_DEVICE_ID(i) swpw((uint16_t) ((i) & 0xffff))
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/* register 0x04 macros */
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/* register 0x04 macros */
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#define PCI_STATUS(i) (((i) >> 16) & 0xffff)
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#define PCI_STATUS(i) ((i) & 0xffff)
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#define PCI_COMMAND(i) ((i) & 0xffff)
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#define PCI_COMMAND(i) (((i) >> 16) & 0xffff)
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/* register 0x08 macros */
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/* register 0x08 macros */
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#define PCI_CLASS_CODE(i) (((i) & 0xff000000) >> 24)
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#define PCI_CLASS_CODE(i) ((swpl((i)) & 0xffff0000) >> 16)
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#define PCI_SUBCLASS(i) (((i) & 0xff0000) >> 16)
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#define PCI_SUBCLASS(i) ((swpl((i)) & 0xffffff00) >> 8)
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#define PCI_PROF_IF(i) (((i) & 0xff00) >> 8)
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#define PCI_PROF_IF(i) (((i) & 0xff00) >> 8)
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#define PCI_REVISION_ID(i) (((i) & 0xff))
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#define PCI_REVISION_ID(i) (((i) & 0xff))
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