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modified debug output and FBCS5 waitstates

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This commit is contained in:
Markus Fröschle
2013-12-17 17:53:45 +00:00
parent 6f6b9d74d6
commit 913bb6095d
3 changed files with 7 additions and 7 deletions
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2
BaS_gcc/flash_scripts/flash_m548x_etos.bdm
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@@ -63,4 +63,4 @@ erase 0xe0000000 37
erase 0xe0000000 38
erase 0xe0000000 39
load -v ../../emutos/emutos-m548x_bas.elf
load ../../emutos/emutos-m548x_bas.elf

10
BaS_gcc/sources/mmu.c
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@@ -58,9 +58,9 @@
#define DEBUG_MMU
#ifdef DEBUG_MMU
#define debug_print(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg);} while(0)
#define dbg_mmu(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg);} while(0)
#else
#define debug_print(format, arg...) do {;} while (0)
#define dbg_mmu(format, arg...) do {;} while (0)
#endif /* DEBUG_MMU */
/*
@@ -363,7 +363,7 @@ void mmutr_miss(void)
{
register uint32_t address asm("d0");
debug_print("MMU TLB MISS at 0x%08x\r\n", address);
dbg_mmu("MMU TLB MISS at 0x%08x\r\n", address);
flush_and_invalidate_caches();
switch (address)
@@ -371,13 +371,13 @@ void mmutr_miss(void)
case keyctl:
case keybd:
/* do something to emulate the IKBD access */
debug_print("IKBD access\r\n");
dbg_mmu("IKBD access\r\n");
break;
case midictl:
case midi:
/* do something to emulate MIDI access */
debug_print("MIDI ACIA access\r\n");
dbg_mmu("MIDI ACIA access\r\n");
break;
default:

2
BaS_gcc/sources/sysinit.c
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@@ -459,7 +459,7 @@ void init_fbcs()
MCF_FBCS5_CSAR = MCF_FBCS_CSAR_BA(0x60000000);
MCF_FBCS5_CSCR = MCF_FBCS_CSCR_PS_16 /* CPLD access */
| MCF_FBCS_CSCR_WS(10)
| MCF_FBCS_CSCR_WS(32)
| MCF_FBCS_CSCR_ASET(1)
| MCF_FBCS_CSCR_AA;
MCF_FBCS5_CSMR = MCF_FBCS_CSMR_BAM_256M