simplified MMU initialization

removed (apparently unneeded) MMU TLBs
added source file templates for SPI dma routines

.gdbinit

@@ -7,4 +7,6 @@ define tbtr
 	target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
 end
 source mcf5474.gdb
+set breakpoint auto-hw
+
 

Makefile

@@ -29,7 +29,7 @@ OBJCOPY=$(TCPREFIX)objcopy
 AR=$(TCPREFIX)ar
 RANLIB=$(TCPREFIX)ranlib
 
-INCLUDE=-Iinclude
+INCLUDE=-Iinclude -Imcdapi
 CFLAGS=-mcpu=5474\
 	   -Wall\
 	   -g\
@@ -72,6 +72,7 @@ CSRCS= \
 	$(SRCDIR)/wait.c \
 	$(SRCDIR)/s19reader.c \
 	$(SRCDIR)/flash.c \
+	$(SRCDIR)/spidma.c \
 	$(SRCDIR)/xhdi_sd.c \
 	$(SRCDIR)/xhdi_interface.c
 
@@ -113,7 +114,7 @@ $(FLASH_EXEC): TARGET_ADDRESS=0xe0000000
 $(FLASH_EXEC): LDCFILE=bas.lk
 $(FLASH_EXEC): MAPFILE=bas.map
 
-$(RAM_EXEC): TARGET_ADDRESS=0x00008000
+$(RAM_EXEC): TARGET_ADDRESS=0x1d000000
 $(RAM_EXEC): LDCFILE=ram.lk
 $(RAM_EXEC): MAPFILE=ram.map
 

bas.lk.in

@@ -30,6 +30,10 @@ SECTIONS
 		objs/supervisor.o(.text)
 		objs/illegal_instruction.o(.text)
 		objs/exceptions.o(.text)
+		objs/spidma.o(.text)
+		mcdapi/MCD_dmaApi.o(.text)
+		mcdapi/MCD_tasks.o(.text)
+		mcdapi/MCD_tasksInit.o(.text)
 		objs/xhdi_sd.o(.text)
 		objs/xhdi_interface.o(text)
 		objs/xhdi_vec.o(text)

include/bas_string.h

@@ -17,6 +17,7 @@ extern size_t strlen(const char *str);
 extern char *strcat(char *dst, const char *src);
 extern char *strncat(char *dst, const char *src, int max);
 extern int atoi(const char *c);
+extern void *memcpy(void *dst, const void *src, size_t n);
 
 #define isdigit(c)	(((c) >= '0') && ((c) <= '9'))
 #define isupper(c)	((c) >= 'A' && ((c) <= 'Z'))

include/spidma.h

@@ -0,0 +1,16 @@
+/*
+ * spidma.h
+ *
+ *  Created on: 27.07.2013
+ *      Author: mfro
+ */
+
+#ifndef _SPIDMA_H_
+#define _SPIDMA_H_
+
+#include <MCF5475.h>
+
+extern int spidma_init(void);
+
+
+#endif /* _SPIDMA_H_ */

sources/BaS.c

@@ -29,6 +29,7 @@
 #include "startcf.h"
 #include "cache.h"
 #include "bas_printf.h"
+#include "bas_string.h"
 #include "bas_types.h"
 #include "sd_card.h"
 #include "wait.h"
@@ -36,6 +37,7 @@
 #include "diskio.h"
 #include "ff.h"
 #include "s19reader.h"
+#include "spidma.h"
 
 /* imported routines */
 extern int mmu_init();
@@ -151,10 +153,15 @@ void nvram_init(void)
 	xprintf("finished\r\n");
 }
 
+/* ACP interrupt controller */
+#define FPGA_INTR_CONTRL	0xf0010000
+#define FPGA_INTR_ENABLE	0xf0010004
+#define FPGA_INTR_PENDIN	0xf0010008
+
 void enable_coldfire_interrupts()
 {
 	xprintf("enable interrupts: ");
-	* (volatile uint32_t *) 0xf0010004 = 0L;		/* disable all interrupts */
+	* (volatile uint32_t *) FPGA_INTR_CONTRL = 0L;		/* disable all interrupts */
 	MCF_EPORT_EPPAR = 0xaaa8;			/* all interrupts on falling edge */
 
 	MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) |	/* timer 0 on, video change capture on rising edge */
@@ -189,11 +196,7 @@ void BaS(void)
 
 	/* copy EMUTOS */
 	src = (uint8_t *) EMUTOS;
-	while (src < (uint8_t *)(EMUTOS + EMUTOS_SIZE))
+	memcpy(dst, src, EMUTOS_SIZE);
-	{
-		*dst++ = *src++;
-	}
-
 	xprintf("finished\r\n");
 
 	/* we have copied a code area, so flush the caches */
@@ -308,6 +311,8 @@ void BaS(void)
 	xprintf("Call OS. BaS initialization finished...\r\n");
 	enable_coldfire_interrupts();
 
+	spidma_init();
+
 	ROM_HEADER* os_header = (ROM_HEADER*)TOS;
 	os_header->initial_pc();
 }

sources/bas_string.c

@@ -7,6 +7,16 @@
 
 #include "bas_string.h"
 
+void *memcpy(void *dst, const void *src, size_t n)
+{
+	char *to = dst;
+
+	while (to < (char *) dst + n)
+		*to++ = * (char *) src++;
+
+	return dst;
+}
+
 int strncmp(const char *s1, const char *s2, int max)
 {
 	int i;

sources/exceptions.S

@@ -100,9 +100,9 @@
 #define	 std_mmutr	(MCF_MMU_MMUTR_SG|MCF_MMU_MMUTR_V)
 #define	 mmuord_d	(                   MCF_MMU_MMUOR_ACC|MCF_MMU_MMUOR_UAA)
 #define	 mmuord_i	(MCF_MMU_MMUOR_ITLB|MCF_MMU_MMUOR_ACC|MCF_MMU_MMUOR_UAA)
-#define	 wt_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(00)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
+#define	 writethrough_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(00)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
-#define	 cb_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(01)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
+#define	 copyback_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(01)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
-#define	 nc_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(10)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
+#define	 nocache_precise_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(10)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
 //---------------------------------------------------
 /*********************************************************************
 *
@@ -519,10 +519,10 @@ irq6:				// mfp
 		add.l	#std_mmutr,d0
 		move.l	d3,d1				// page 0?
 		beq		irq6_sca_pn0		// ja ->
-		add.l	#cb_mmudr,d1		// sonst page cb
+		add.l	#copyback_mmudr,d1		// sonst page cb
 		bra		irq6_sca_pn1c
 irq6_sca_pn0:
-		add.l	#wt_mmudr|MCF_MMU_MMUDR_LK,d1	// page wt and locked
+		add.l	#writethrough_mmudr|MCF_MMU_MMUDR_LK,d1	// page wt and locked
 irq6_sca_pn1c:
 		mvz.w	#0x10b,d2			// MMU update 
 		move.l	d0,MCF_MMU_MMUTR	
@@ -824,7 +824,7 @@ video_copy_data_loop:
  		move.l	d4,MCF_MMU_MMUAR
 		move.l	d0,d1
 		add.l	#MCF_MMU_MMUTR_ID(sca_page_ID)|std_mmutr,d0
-		add.l	#0x60000000|wt_mmudr|MCF_MMU_MMUDR_LK,d1
+		add.l	#0x60000000|writethrough_mmudr|MCF_MMU_MMUDR_LK,d1
 		mvz.w	#0x10b,d2								// MMU update 
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR

sources/mmc.c

@@ -93,7 +93,7 @@ static volatile DSTATUS Stat = 0 /* STA_NOINIT */;	/* Physical drive status */
 static uint8_t CardType;			/* Card type flags */
 
 
-static uint32_t dspi_fifo_val = // MCF_DSPI_DTFR_CONT |	/* enable continous chip select */
+static uint32_t dspi_fifo_val = MCF_DSPI_DTFR_CONT |	/* enable continous chip select */
 								/* CTAS use DCTAR0 for clock and attributes */
 								MCF_DSPI_DTFR_CTCNT;
 

sources/mmu.S

@@ -71,9 +71,9 @@
 #define	 std_mmutr	(MCF_MMU_MMUTR_SG|MCF_MMU_MMUTR_V)
 #define	 mmuord_d	(                   MCF_MMU_MMUOR_ACC|MCF_MMU_MMUOR_UAA)
 #define	 mmuord_i	(MCF_MMU_MMUOR_ITLB|MCF_MMU_MMUOR_ACC|MCF_MMU_MMUOR_UAA)
-#define	 wt_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(00)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
+#define	 writethrough_mmudr		(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(00)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
-#define	 cb_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(01)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
+#define	 copyback_mmudr			(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(01)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
-#define	 nc_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(10)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
+#define	 nocache_precise_mmudr	(MCF_MMU_MMUDR_SZ(00)|MCF_MMU_MMUDR_CM(10)|MCF_MMU_MMUDR_R|MCF_MMU_MMUDR_W|MCF_MMU_MMUDR_X)
 
 		.global _mmu_init
 		.global _mmutr_miss
@@ -112,66 +112,75 @@ _mmu_init:
 		move.l	#MCF_MMU_MMUOR_CA,d0	// clear all entries, 
 		move.l	d0,MCF_MMU_MMUOR		
 		nop
+
 // 0000'0000 locked
   		moveq.l	#0x00000000|std_mmutr,d0
-  		moveq.l	#0x00000000|cb_mmudr|MCF_MMU_MMUDR_LK,d1						 
+  		moveq.l	#0x00000000|copyback_mmudr|MCF_MMU_MMUDR_LK,d1
-		moveq.l	#mmuord_d,d2								// MMU update date
+		moveq.l	#mmuord_d,d2				// MMU update data
-		moveq.l	#mmuord_i,d3								// MMU update instruction
+		moveq.l	#mmuord_i,d3				// MMU update instruction
  		move.l	d0,MCF_MMU_MMUTR		
  		move.l	d1,MCF_MMU_MMUDR
- 		move.l	d2,MCF_MMU_MMUOR						// MMU update date
+ 		move.l	d2,MCF_MMU_MMUOR			// MMU update data
- 		move.l	d3,MCF_MMU_MMUOR						// MMU update instruction
+ 		move.l	d3,MCF_MMU_MMUOR			// MMU update instruction
 
 //---------------------------------------------------------------------------------------
 // 00d0'0000 locked ID=6
 // video ram: read write execute normal write true
  		move.l	#0x00d00000|MCF_MMU_MMUTR_ID(sca_page_ID)|std_mmutr,d0
-		move.l	#0x60d00000|wt_mmudr|MCF_MMU_MMUDR_LK,d1						 
+		move.l	#0x60d00000|writethrough_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
-		move.l	d2,MCF_MMU_MMUOR						// MMU update date
+		move.l	d2,MCF_MMU_MMUOR						// MMU update data
  		move.l	#0x00d00000|std_mmutr,d0
 		move.l	d3,MCF_MMU_MMUOR						// MMU update instruction  
 		
 		move.l	#0x2000,d0
 		move.l	d0,_video_tlb							// set page as video page
   		clr.l	_video_sbt								// clear time
+
+#ifdef _NOT_USED_
 //-------------------------------------------------------------------------------------
 // Make the TOS (in SDRAM) read-only
  		move.l	#__TOS+std_mmutr,d0
-		move.l	#__TOS+cb_mmudr+MCF_MMU_MMUDR_LK,d1
+		move.l	#__TOS+copyback_mmudr+MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
  		move.l	d2,MCF_MMU_MMUOR						// setzen read only ?????? noch nicht
 		move.l	d3,MCF_MMU_MMUOR						// setzen
+#endif /* _NOT_USED_ */
+
 // 00f0'0000 locked		
 		move.l	#0x00f00000|std_mmutr,d0
-		move.l	#0xfff00000|nc_mmudr|MCF_MMU_MMUDR_LK,d1						 
+		move.l	#0xfff00000|nocache_precise_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
-		move.l	d2,MCF_MMU_MMUOR						// maped to ffffxxx, precise,  
+		move.l	d2,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
-		move.l	d3,MCF_MMU_MMUOR						// maped to ffffxxx, precise,  
+		move.l	d3,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
+
 // 1fe0'0000 locked
 		move.l	#0x1FE00000|std_mmutr,d0
-		move.l	#0x1FE00000|cb_mmudr|MCF_MMU_MMUDR_LK,d1						 
+		move.l	#0x1FE00000|copyback_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d2,MCF_MMU_MMUOR						// setzen data
 		move.l	d3,MCF_MMU_MMUOR						// setzen instr
-// 1ff0'0000 locked
+
+#ifdef _NOT_USED_
+// 1ff0'0000 locked (FIXME: why is this?)
 		move.l	#0x1FF00000|std_mmutr,d0
-		move.l	#0x1FF00000|cb_mmudr|MCF_MMU_MMUDR_LK,d1						 
+		move.l	#0x1FF00000|copyback_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d2,MCF_MMU_MMUOR						// setzen data
 		move.l	d3,MCF_MMU_MMUOR						// setzen instr 
 // instr 0xFFF0'0000 nach 0x1FF0'0000 umleiten -->> short sprung 
 /*		move.l	#0xFFF00000|std_mmutr,d0
-		move.l	#0x1FF00000|cb_mmudr|MCF_MMU_MMUDR_LK,d1						 
+		move.l	#0x1FF00000|copyback_mmudr|MCF_MMU_MMUDR_LK,d1
 		move.l	d0,MCF_MMU_MMUTR		
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d3,MCF_MMU_MMUOR						// setzen instr
 */
+#endif /* _NOT_USED_ */
 		move.l	(sp)+,d2			// Restore registers
 		move.l	(sp)+,d3
 		rts
@@ -185,7 +194,7 @@ _mmutr_miss:
 		or.l	#std_mmutr,d0	
 		move.l	d0,MCF_MMU_MMUTR
 		and.l	#0xFFF00000,d0
-		or.l	#cb_mmudr,d0		
+		or.l	#copyback_mmudr,d0
 		move.l	d0,MCF_MMU_MMUDR
 		moveq.l	#mmuord_d,d0					// MMU update data
 		move.l	d0,MCF_MMU_MMUOR				// set

sources/spidma.c

@@ -0,0 +1,26 @@
+/*
+ * spidma.c
+ *
+ *  Created on: 27.07.2013
+ *      Author: mfro
+ */
+
+#include "spidma.h"
+#include <MCD_dma.h>
+#include "bas_printf.h"
+
+extern char *_SYS_SRAM;
+
+int spidma_init(void)
+{
+	int res;
+
+	res = MCD_initDma((dmaRegs *) &MCF_DMA_TASKBAR, &_SYS_SRAM, MCD_RELOC_TASKS | MCD_COMM_PREFETCH_EN);
+	if (res != MCD_OK)
+	{
+		xprintf("DMA API initialization failed (0x%x)\r\n", res);
+		return 0;
+	}
+	xprintf("DMA API initialized. Tasks are at %p\r\n", &_SYS_SRAM);
+	return 1;
+}

sources/sysinit.c

@@ -30,6 +30,7 @@
 #include "cache.h"
 #include "sysinit.h"
 #include "bas_printf.h"
+#include "bas_string.h"
 #include "bas_types.h"
 #include "wait.h"
 
@@ -796,10 +797,10 @@ extern uint8_t _FIRETOS[];
 #define FIRETOS ((uint32_t)_FIRETOS) /* where FireTOS is stored in flash */
 
 extern uint8_t _BAS_LMA[];
-#define BAS_LMA ((uint32_t)_BAS_LMA) /* where the BaS is stored in flash */
+#define BAS_LMA (&_BAS_LMA[0]) /* where the BaS is stored in flash */
 
 extern uint8_t _BAS_IN_RAM[];
-#define BAS_IN_RAM ((uint32_t)_BAS_IN_RAM) /* where the BaS is run in RAM */
+#define BAS_IN_RAM (&_BAS_IN_RAM[0]) /* where the BaS is run in RAM */
 
 extern uint8_t _BAS_SIZE[];
 #define BAS_SIZE ((uint32_t)_BAS_SIZE) /* size of the BaS, in bytes */
@@ -808,11 +809,6 @@ extern uint8_t _FASTRAM_END[];
 #define FASTRAM_END ((uint32_t)_FASTRAM_END)
 
 void initialize_hardware(void) {
-	/* used in copy loop */
-	uint32_t *src;	/* src address to read from flash */
-	uint32_t *end;	/* end address to read from flash */
-	uint32_t *dst;	/* destination address to copy to */
-
 	/* Test for FireTOS switch: DIP switch #5 up */
 	if (!(DIP_SWITCH & (1 << 6))) {
 		/* Minimal hardware initialization */
@@ -923,22 +919,11 @@ void initialize_hardware(void) {
 	//video_1280_1024();
 	init_ac97();
 
-	/* copy the BaS .data and .bss contained in flash to its final location */
+	xprintf("copying BaS data (%p - %p) to RAM (%p)\r\n", BAS_LMA, BAS_LMA + BAS_SIZE, BAS_IN_RAM);
-	src = (uint32_t *) BAS_LMA;
-	end = (uint32_t *) (BAS_LMA + BAS_SIZE);
-	dst = (uint32_t *) BAS_IN_RAM;
-
-	xprintf("copying BaS data (%p - %p) to RAM (%p)\r\n", src, end, dst);
 	/* The linker script will ensure that the Bas size
 	 * is a multiple of the following.
 	 */
-	while (src < end)
+	memcpy((void *) BAS_IN_RAM, BAS_LMA, BAS_SIZE);
-	{
-		*dst++ = *src++;
-		*dst++ = *src++;
-		*dst++ = *src++;
-		*dst++ = *src++;
-	}
 	xprintf("finished.\r\n");
 
 	/* we have copied a code area, so flush the caches */