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added sdc file and upgraded IP components

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This commit is contained in:
Markus Fröschle
2014-12-30 12:57:22 +00:00
parent 7f5ab992fc
commit 7ef61bd397
115 changed files with 10406 additions and 10318 deletions
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120
Video/lpm_shiftreg4.bsf
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@@ -1,56 +1,64 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 0 0 144 80)
(text "lpm_shiftreg4" (rect 34 1 124 17)(font "Arial" (font_size 10)))
(text "inst" (rect 8 64 25 76)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
(text "clock" (rect 26 26 49 39)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 48)
(input)
(text "shiftin" (rect 0 0 34 14)(font "Arial" (font_size 8)))
(text "shiftin" (rect 20 42 48 55)(font "Arial" (font_size 8)))
(line (pt 0 48)(pt 16 48)(line_width 1))
)
(port
(pt 144 48)
(output)
(text "shiftout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
(text "shiftout" (rect 89 42 123 55)(font "Arial" (font_size 8)))
(line (pt 144 48)(pt 128 48)(line_width 1))
)
(drawing
(text "right shift" (rect 88 17 128 29)(font "Arial" ))
(line (pt 16 16)(pt 128 16)(line_width 1))
(line (pt 128 16)(pt 128 64)(line_width 1))
(line (pt 128 64)(pt 16 64)(line_width 1))
(line (pt 16 64)(pt 16 16)(line_width 1))
(line (pt 16 26)(pt 22 32)(line_width 1))
(line (pt 22 32)(pt 16 38)(line_width 1))
)
)
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.2"))
(symbol
(rect 0 0 144 80)
(text "lpm_shiftreg4" (rect 33 0 129 16)(font "Arial" (font_size 10)))
(text "inst" (rect 8 65 26 76)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clock" (rect 0 0 31 13)(font "Arial" (font_size 8)))
(text "clock" (rect 26 26 51 38)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "shiftin" (rect 0 0 34 13)(font "Arial" (font_size 8)))
(text "shiftin" (rect 20 42 48 54)(font "Arial" (font_size 8)))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 144 48)
(output)
(text "shiftout" (rect 0 0 42 13)(font "Arial" (font_size 8)))
(text "shiftout" (rect 91 42 126 54)(font "Arial" (font_size 8)))
(line (pt 144 48)(pt 128 48))
)
(drawing
(text "right shift" (rect 90 18 220 46)(font "Arial" ))
(line (pt 16 16)(pt 16 64))
(line (pt 16 16)(pt 128 16))
(line (pt 16 64)(pt 128 64))
(line (pt 128 16)(pt 128 64))
(line (pt 0 0)(pt 146 0))
(line (pt 146 0)(pt 146 82))
(line (pt 0 82)(pt 146 82))
(line (pt 0 0)(pt 0 82))
(line (pt 16 26)(pt 22 32))
(line (pt 22 32)(pt 16 38))
(line (pt 0 0)(pt 0 0))
(line (pt 0 0)(pt 0 0))
(line (pt 0 0)(pt 0 0))
(line (pt 0 0)(pt 0 0))
)
)