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added sdc file and upgraded IP components

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This commit is contained in:
Markus Fröschle
2014-12-30 12:57:22 +00:00
parent 7f5ab992fc
commit 7ef61bd397
115 changed files with 10406 additions and 10318 deletions
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148
Video/lpm_shiftreg0.bsf
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@@ -1,70 +1,78 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 0 0 144 128)
(text "lpm_shiftreg0" (rect 34 1 124 17)(font "Arial" (font_size 10)))
(text "inst" (rect 8 112 25 124)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "load" (rect 0 0 23 14)(font "Arial" (font_size 8)))
(text "load" (rect 20 26 41 39)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 48)
(input)
(text "data[15..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))
(text "data[15..0]" (rect 20 42 71 55)(font "Arial" (font_size 8)))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 80)
(input)
(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
(text "clock" (rect 26 74 49 87)(font "Arial" (font_size 8)))
(line (pt 0 80)(pt 16 80)(line_width 1))
)
(port
(pt 0 96)
(input)
(text "shiftin" (rect 0 0 34 14)(font "Arial" (font_size 8)))
(text "shiftin" (rect 20 90 48 103)(font "Arial" (font_size 8)))
(line (pt 0 96)(pt 16 96)(line_width 1))
)
(port
(pt 144 72)
(output)
(text "shiftout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
(text "shiftout" (rect 89 66 123 79)(font "Arial" (font_size 8)))
(line (pt 144 72)(pt 128 72)(line_width 1))
)
(drawing
(text "left shift" (rect 92 17 128 29)(font "Arial" ))
(line (pt 16 16)(pt 128 16)(line_width 1))
(line (pt 128 16)(pt 128 112)(line_width 1))
(line (pt 128 112)(pt 16 112)(line_width 1))
(line (pt 16 112)(pt 16 16)(line_width 1))
(line (pt 16 74)(pt 22 80)(line_width 1))
(line (pt 22 80)(pt 16 86)(line_width 1))
)
)
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.2"))
(symbol
(rect 0 0 144 128)
(text "lpm_shiftreg0" (rect 33 0 128 16)(font "Arial" (font_size 10)))
(text "inst" (rect 8 113 26 124)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "load" (rect 0 0 25 13)(font "Arial" (font_size 8)))
(text "load" (rect 20 26 41 38)(font "Arial" (font_size 8)))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "data[15..0]" (rect 0 0 61 13)(font "Arial" (font_size 8)))
(text "data[15..0]" (rect 20 42 72 54)(font "Arial" (font_size 8)))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 80)
(input)
(text "clock" (rect 0 0 31 13)(font "Arial" (font_size 8)))
(text "clock" (rect 26 74 51 86)(font "Arial" (font_size 8)))
(line (pt 0 80)(pt 16 80))
)
(port
(pt 0 96)
(input)
(text "shiftin" (rect 0 0 34 13)(font "Arial" (font_size 8)))
(text "shiftin" (rect 20 90 48 102)(font "Arial" (font_size 8)))
(line (pt 0 96)(pt 16 96))
)
(port
(pt 144 64)
(output)
(text "shiftout" (rect 0 0 42 13)(font "Arial" (font_size 8)))
(text "shiftout" (rect 91 58 126 70)(font "Arial" (font_size 8)))
(line (pt 144 64)(pt 128 64))
)
(drawing
(text "left shift" (rect 96 18 227 46)(font "Arial" ))
(line (pt 16 16)(pt 16 112))
(line (pt 16 16)(pt 128 16))
(line (pt 16 112)(pt 128 112))
(line (pt 128 16)(pt 128 112))
(line (pt 0 0)(pt 146 0))
(line (pt 146 0)(pt 146 130))
(line (pt 0 130)(pt 146 130))
(line (pt 0 0)(pt 0 130))
(line (pt 16 74)(pt 22 80))
(line (pt 22 80)(pt 16 86))
(line (pt 0 0)(pt 0 0))
(line (pt 0 0)(pt 0 0))
(line (pt 0 0)(pt 0 0))
(line (pt 0 0)(pt 0 0))
)
)