activated more Coldfire interrupt sources
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@@ -214,13 +214,6 @@ init_vec_loop:
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move.l a1,0x11c(a0)
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#ifdef MACHINE_FIREBEE
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// timer vectors (triggers when vbashi gets changed, used for video page copy)
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lea handler_gpt0(pc),a1
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// GPT0 interrupt source = 62
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move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
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#endif /* MACHINE_FIREBEE */
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// install lowlevel_isr_handler for the three GPT timers
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lea _lowlevel_isr_handler(pc),a1
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@@ -245,6 +238,12 @@ init_vec_loop:
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move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
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#endif
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#ifdef MACHINE_FIREBEE
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// timer vectors (triggers when vbashi gets changed, used for video page copy)
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move.l a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
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#endif /* MACHINE_FIREBEE */
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move.l (sp)+,a2 // Restore registers
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rts
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@@ -489,38 +488,6 @@ irq7:
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move.l (sp)+,a0
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rts // Forward to the Access Error handler
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/*
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* general purpose timer 0 (GPT0): video change, later also others.
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*
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* GPT0 is used as input trigger. It is connected to the TIN0 signal of
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* the FPGA and triggers everytime vbasehi is written to, i.e.
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* when the video base address gets changed
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*/
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/*
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* TODO: remove. This interrupt still fires, but doesn't do anything anymore.
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* BaS_gcc handles FPGA RAM as STRAM, so there is no page copy necessary as
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* it was with previous versions.
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*/
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handler_gpt0:
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.extern _gpt0_interrupt_handler
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//move.w #0x2700,sr // disable interrupts
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link a6,#-4 * 4 // make room for
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movem.l d0-d1/a0-a1,(sp) // gcc scratch registers and save them,
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// other registers will be handled by gcc itself
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move.w 4(a6),d0 // fetch vector number from stack
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move.l d0,-(sp) // push it
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jsr _gpt0_interrupt_handler // call C handler
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addq.l #4,sp // adjust stack
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movem.l (sp),d0-d1/a0-a1 // restore registers
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unlk a6
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rte
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#else // handlers for M5484LITE
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irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE
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