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fixed formatting

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This commit is contained in:
Markus Fröschle
2014-12-22 08:50:22 +00:00
parent 7d98e35c50
commit 7963f9c8ae
1 changed files with 37 additions and 37 deletions
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16
vhdl/rtl/vhdl/Firebee/Firebee.vhd
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@@ -257,9 +257,9 @@ ARCHITECTURE Structure of firebee is
COMPONENT altpll1
PORT(
inclk0 : IN STD_LOGIC := '0';
c0 : OUT STD_LOGIC ;
c1 : OUT STD_LOGIC ;
c2 : OUT STD_LOGIC ;
c0 : OUT STD_LOGIC;
c1 : OUT STD_LOGIC;
c2 : OUT STD_LOGIC;
locked : OUT STD_LOGIC
);
END COMPONENT;
@@ -267,10 +267,10 @@ ARCHITECTURE Structure of firebee is
COMPONENT altpll2
PORT(
inclk0 : IN STD_LOGIC := '0';
c0 : OUT STD_LOGIC ;
c1 : OUT STD_LOGIC ;
c2 : OUT STD_LOGIC ;
c3 : OUT STD_LOGIC ;
c0 : OUT STD_LOGIC;
c1 : OUT STD_LOGIC;
c2 : OUT STD_LOGIC;
c3 : OUT STD_LOGIC;
c4 : OUT STD_LOGIC
);
END COMPONENT;
@@ -754,7 +754,7 @@ BEGIN
variable DDR_D_OUT_H : STD_LOGIC_VECTOR(31 DOWNTO 0);
variable DDR_D_OUT_L : STD_LOGIC_VECTOR(31 DOWNTO 0);
BEGIN
IF clk_ddr(3) = '1' and clk_ddr(3)' event THEN
IF RISING_EDGE(clk_ddr(3)) THEN
DDR_D_OUT_H := vdp_out(63 DOWNTO 32);
DDR_D_OUT_L := vdp_out(31 DOWNTO 0);
vd_en <= sr_ddr_wr OR ddr_wr;