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refactored, reformatted, added missing clobber registers to __asm__

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This commit is contained in:
Markus Fröschle
2014-09-02 13:51:00 +00:00
parent 56cbd17373
commit 7921199e9b
21 changed files with 141 additions and 124 deletions
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71
dma/dma.c
View File

@@ -41,7 +41,7 @@
// #define DBG_DMA
#ifdef DBG_DMA
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_DMA */
@@ -89,7 +89,7 @@ void dma_irq_enable(uint8_t lvl, uint8_t pri)
MCF_INTC_ICR48 = 0
| MCF_INTC_ICR_IP(pri)
| MCF_INTC_ICR_IL(lvl);
dbg("%s:DMA irq assigned level %d, priority %d\r\n", __FUNCTION__, lvl, pri);
dbg("DMA irq assigned level %d, priority %d\r\n", lvl, pri);
/* Unmask all task interrupts */
MCF_DMA_DIMR = 0;
@@ -100,8 +100,7 @@ void dma_irq_enable(uint8_t lvl, uint8_t pri)
/* Unmask the DMA interrupt in the interrupt controller */
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK48;
dbg("%s: DMA task interrupts unmasked, pending interrupts cleared, interrupt controller active\r\n",
__FUNCTION__);
dbg("DMA task interrupts unmasked, pending interrupts cleared, interrupt controller active\r\n");
}
/********************************************************************/
@@ -119,7 +118,7 @@ void dma_irq_disable(void)
/* Mask the DMA interrupt in the interrupt controller */
MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK48;
dbg("%s: DMA interrupts masked and disabled\r\n", __FUNCTION__);
dbg("DMA interrupts masked and disabled\r\n");
}
int dma_set_initiator(int initiator)
@@ -177,7 +176,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot found\r\n", __FUNCTION__);
dbg("no free slot found\r\n");
return 1;
}
@@ -196,7 +195,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -210,7 +209,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -224,7 +223,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -238,7 +237,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -252,7 +251,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -266,7 +265,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -280,7 +279,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -294,7 +293,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -308,7 +307,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -322,7 +321,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -336,7 +335,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -359,7 +358,7 @@ int dma_set_initiator(int initiator)
used_reqs[28] = DMA_PSC2_RX; }
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -373,7 +372,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -387,7 +386,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -401,7 +400,7 @@ int dma_set_initiator(int initiator)
}
else /* No empty slots */
{
dbg("%s: no free slot\r\n", __FUNCTION__);
dbg("no free slot\r\n");
return 1;
}
@@ -409,7 +408,7 @@ int dma_set_initiator(int initiator)
default:
{
dbg("%s: don't know what to do\r\n", __FUNCTION__);
dbg("don't know what to do\r\n");
return 1;
}
@@ -436,7 +435,7 @@ uint32_t dma_get_initiator(int requestor)
if (used_reqs[i] == requestor)
return i;
}
dbg("%s: no initiator found for requestor %d\r\n", __FUNCTION__, requestor);
dbg("no initiator found for requestor %d\r\n", requestor);
return 0;
}
@@ -459,7 +458,7 @@ void dma_free_initiator(int requestor)
break;
}
}
dbg("%s: DMA requestor %d freed\r\n", __FUNCTION__, requestor);
dbg("DMA requestor %d freed\r\n", requestor);
}
/*
@@ -476,7 +475,7 @@ int dma_set_channel(int requestor, void (*handler)(void))
int i;
/* Check to see if this requestor is already assigned to a channel */
dbg("%s: check if requestor %d is already assigned to a channel\r\n", __FUNCTION__, requestor);
dbg("check if requestor %d is already assigned to a channel\r\n", requestor);
if ((i = dma_get_channel(requestor)) != -1)
return i;
@@ -486,11 +485,11 @@ int dma_set_channel(int requestor, void (*handler)(void))
{
dma_channel[i].req = requestor;
dma_channel[i].handler = handler;
dbg("%s: assigned channel %d to requestor %d\r\n", __FUNCTION__, i, requestor);
dbg("assigned channel %d to requestor %d\r\n", i, requestor);
return i;
}
}
dbg("%s: no free DMA channel found for requestor %d\r\n", __FUNCTION__, requestor);
dbg("no free DMA channel found for requestor %d\r\n", requestor);
/* All channels taken */
return -1;
@@ -502,7 +501,7 @@ void dma_clear_channel(int channel)
{
dma_channel[channel].req = -1;
dma_channel[channel].handler = NULL;
dbg("%s: cleared DMA channel %d\r\n", __FUNCTION__, channel);
dbg("cleared DMA channel %d\r\n", channel);
}
}
@@ -525,7 +524,7 @@ int dma_get_channel(int requestor)
if (dma_channel[i].req == requestor)
return i;
}
dbg("%s: no channel occupied by requestor %d\r\n", __FUNCTION__, requestor);
dbg("no channel occupied by requestor %d\r\n", requestor);
return -1;
}
@@ -558,8 +557,6 @@ int dma_interrupt_handler(void *arg1, void *arg2)
{
int i, interrupts;
(void) set_ipl(7);
/*
* Determine which interrupt(s) triggered by AND'ing the
* pending interrupts with those that aren't masked.
@@ -569,7 +566,7 @@ int dma_interrupt_handler(void *arg1, void *arg2)
/* Make sure we are here for a reason */
if (interrupts == 0)
{
dbg("%s: not DMA interrupt! Spurious?\r\n", __FUNCTION__);
dbg("not DMA interrupt! Spurious?\r\n", );
return 0;
}
@@ -583,7 +580,7 @@ int dma_interrupt_handler(void *arg1, void *arg2)
/* If there is a handler, call it */
if (dma_channel[i].handler != NULL)
{
dbg("%s: call handler for DMA channel %d (%p)\r\n", __FUNCTION__, i, dma_channel[i].handler);
dbg("call handler for DMA channel %d (%p)\r\n", i, dma_channel[i].handler);
dma_channel[i].handler();
}
}
@@ -608,7 +605,7 @@ void *dma_memcpy(void *dst, void *src, size_t n)
ret = MCD_startDma(1, src, 4, dst, 4, n, 4, DMA_ALWAYS, 0, MCD_SINGLE_DMA, 0);
if (ret == MCD_OK)
{
dbg("%s: DMA on channel 1 successfully started\r\n", __FUNCTION__);
dbg("DMA on channel 1 successfully started\r\n");
}
do
@@ -652,7 +649,7 @@ void *dma_memcpy(void *dst, void *src, size_t n)
end = MCF_SLT0_SCNT;
time = (start - end) / (SYSCLK / 1000) / 1000;
#endif /* DBG_DMA */
dbg("%s: took %d ms (%f Mbytes/second)\r\n", __FUNCTION__, time, n / (float) time / 1000.0);
dbg("took %d ms (%f Mbytes/second)\r\n", time, n / (float) time / 1000.0);
return dst;
}
@@ -661,11 +658,11 @@ int dma_init(void)
{
int res;
dbg("%s: MCD DMA API initialization: ", __FUNCTION__);
dbg("MCD DMA API initialization: ");
res = MCD_initDma((dmaRegs *) &_MBAR[0x8000], SYS_SRAM, MCD_RELOC_TASKS | MCD_COMM_PREFETCH_EN);
if (res != MCD_OK)
{
dbg("%s: DMA API initialization failed (0x%x)\r\n", __FUNCTION__, res);
dbg("DMA API initialization failed (0x%x)\r\n", res);
return 0;
}

2
include/exceptions.h
View File

@@ -19,7 +19,7 @@ static inline uint32_t set_ipl(uint32_t ipl)
" lsr.l #8,%[ret]\r\n" /* shift them to position */
: [ret] "=&d" (ret) /* output */
: [ipl] "d" (ipl) /* input */
: "d0" /* clobber */
: "cc", d0" /* clobber */
);
return ret;

1
include/nbuf.h
View File

@@ -10,7 +10,6 @@
#include "bas_types.h"
/********************************************************************/
/*
* Include the Queue structure definitions
*/

35
include/ohci.h
View File

@@ -9,7 +9,8 @@
#define USB_OHCI_MAX_ROOT_PORTS 4
static int cc_to_error[16] = {
static int cc_to_error[16] =
{
/* mapping of the OHCI CC status to error codes */
/* No Error */ 0,
@@ -30,8 +31,9 @@ static int cc_to_error[16] = {
/* Not Access */ -1
};
#ifdef DEBUG
static const char *cc_to_string[16] = {
#ifdef DEBUG_OHCI
static const char *cc_to_string[16] =
{
"No Error",
"CRC: Last data packet from endpoint contained a CRC error.",
"BITSTUFFING:\r\nLast data packet from endpoint contained a bit stuffing violation",
@@ -62,7 +64,7 @@ static const char *cc_to_string[16] = {
"NOT ACCESSED:\r\nThis code is set by software before the TD is placed\r\n" \
"on a list to be processed by the HC.(2)",
};
#endif /* DEBUG */
#endif /* DEBUG_OHCI */
/* ED States */
@@ -73,7 +75,8 @@ static const char *cc_to_string[16] = {
#define ED_URB_DEL 0x08
/* usb_ohci_ed */
struct ed {
struct ed
{
uint32_t hwINFO;
uint32_t hwTailP;
uint32_t hwHeadP;
@@ -134,7 +137,8 @@ typedef struct ed ed_t;
#define MAXPSW 1
struct td {
struct td
{
uint32_t hwINFO;
uint32_t hwCBP; /* Current Buffer Pointer */
uint32_t hwNextTD; /* Next TD Pointer */
@@ -162,7 +166,8 @@ typedef struct td td_t;
*/
#define NUM_INTS 32 /* part of the OHCI standard */
struct ohci_hcca {
struct ohci_hcca
{
uint32_t int_table[NUM_INTS]; /* Interrupt ED table */
#if defined(CONFIG_MPC5200)
uint16_t pad1; /* set to 0 on each frame_no change */
@@ -180,7 +185,8 @@ struct ohci_hcca {
* region. This is Memory Mapped I/O. You must use the readl() and
* writel() macros defined in asm/io.h to access these!!
*/
struct ohci_regs {
struct ohci_regs
{
/* control and status registers */
uint32_t revision;
uint32_t control;
@@ -203,7 +209,8 @@ struct ohci_regs {
uint32_t periodicstart;
uint32_t lsthresh;
/* Root hub ports */
struct ohci_roothub_regs {
struct ohci_roothub_regs
{
uint32_t a;
uint32_t b;
uint32_t status;
@@ -263,7 +270,8 @@ struct ohci_regs {
/* Virtual Root HUB */
struct virt_root_hub {
struct virt_root_hub
{
int devnum; /* Address of Root Hub endpoint */
void *dev; /* was urb */
void *int_addr;
@@ -383,7 +391,8 @@ typedef struct
#define NUM_EDS 8 /* num of preallocated endpoint descriptors */
struct ohci_device {
struct ohci_device
{
ed_t ed[NUM_EDS];
int ed_cnt;
};
@@ -395,7 +404,8 @@ struct ohci_device {
* a subset of what the full implementation needs. (Linus)
*/
typedef struct ohci {
typedef struct ohci
{
/* ------- common part -------- */
long handle; /* PCI BIOS */
const struct pci_device_id *ent;
@@ -443,7 +453,6 @@ static int ep_link(ohci_t * ohci, ed_t * ed);
static int ep_unlink(ohci_t * ohci, ed_t * ed);
static ed_t * ep_add_ed(ohci_t * ohci, struct usb_device * usb_dev, uint32_t pipe, int interval, int load);
/*-------------------------------------------------------------------------*/
/* we need more TDs than EDs */
#define NUM_TD 64

3
include/part.h
View File

@@ -26,7 +26,8 @@
typedef unsigned long long uint64_t;
typedef unsigned long lbaint_t;
typedef struct block_dev_desc {
typedef struct block_dev_desc
{
int if_type; /* type of the interface */
int dev; /* device number */
unsigned char part_type; /* partition type */

2
include/queue.h
View File

@@ -8,8 +8,6 @@
#ifndef _QUEUE_H_
#define _QUEUE_H_
/********************************************************************/
/*
* Individual queue node
*/

2
include/radeonfb.h
View File

@@ -10,7 +10,9 @@
#include "i2c-algo-bit.h"
#include "util.h" /* for swpX() */
#include "wait.h"
//#include "radeon_theatre.h"
#include "radeon_reg.h"
/* Buffer are aligned on 4096 byte boundaries */

2
net/am79c874.c
View File

@@ -26,7 +26,7 @@
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_AM79 */
/********************************************************************/
/* Initialize the AM79C874 PHY
*
* This function sets up the Auto-Negotiate Advertisement register

26
net/arp.c
View File

@@ -13,7 +13,7 @@
//#define DBG_ARP
#ifdef DBG_ARP
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_ARP */
@@ -227,13 +227,10 @@ void arp_request(NIF *nif, uint8_t *pa)
arp_frame_hdr *arpframe;
int i, result;
dbg("%s\r\n", __FUNCTION__);
pNbuf = nbuf_alloc();
if (pNbuf == NULL)
{
dbg("%s: arp_request couldn't allocate Tx buffer\n", __FUNCTION__);
dbg("could not allocate Tx buffer\n");
return;
}
@@ -263,7 +260,7 @@ void arp_request(NIF *nif, uint8_t *pa)
pNbuf->length = ARP_HDR_LEN;
/* Send the ARP request */
dbg("%s: sending ARP request\r\n", __FUNCTION__);
dbg("sending ARP request\r\n");
result = nif->send(nif, nif->broadcast, nif->hwa, ETH_FRM_ARP, pNbuf);
if (result == 0)
@@ -315,11 +312,11 @@ uint8_t *arp_resolve(NIF *nif, uint16_t protocol, uint8_t *pa)
timer_set_secs(TIMER_NETWORK, ARP_TIMEOUT);
while (timer_get_reference(TIMER_NETWORK))
{
dbg("%s: try to resolve %d.%d.%d.%d\r\n", __FUNCTION__,
dbg("try to resolve %d.%d.%d.%d\r\n",
pa[0], pa[1], pa[2], pa[3], pa[4]);
if (arp_resolve_pa(nif, protocol, pa, &hwa))
{
dbg("%s: resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n", __FUNCTION__,
dbg("resolved to %02x:%02x:%02x:%02x:%02x:%02x.\r\n",
hwa[0], hwa[1], hwa[2], hwa[3], hwa[4], hwa[5], hwa[6]);
return hwa;
@@ -369,6 +366,7 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
(rx_arpframe->ar_pro != ETH_FRM_IP) ||
(rx_arpframe->ar_pln != 4))
{
dbg("received packet is not an ARP packet, discard it\r\n");
nbuf_free(pNbuf);
return;
}
@@ -384,10 +382,14 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
(rx_arpframe->ar_tpa[2] == addr[2]) &&
(rx_arpframe->ar_tpa[3] == addr[3]) )
{
dbg("received ARP packet is a permanent one, store it\r\n")
longevity = ARP_ENTRY_PERM;
}
else
{
dbg("received ARP packet was not addressed to us, keep only temporarily\r\n");
longevity = ARP_ENTRY_TEMP;
}
/*
* Add ARP info into the table
@@ -412,6 +414,7 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
(rx_arpframe->ar_tpa[2] == addr[2]) &&
(rx_arpframe->ar_tpa[3] == addr[3]) )
{
dbg("received arp request directed to us, replying\r\n");
/*
* Reuse the current network buffer to assemble an ARP reply
*/
@@ -465,12 +468,19 @@ void arp_handler(NIF *nif, NBUF *pNbuf)
pNbuf);
}
else
{
dbg("ARP request not addressed to us, discarding\r\n");
nbuf_free(pNbuf);
}
break;
case ARP_REPLY:
/*
* The ARP Reply case is already taken care of
*/
/* missing break is intentional */
default:
nbuf_free(pNbuf);
break;

5
net/bootp.c
View File

@@ -99,7 +99,9 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
rx_p = (struct bootp_packet *) &nbuf->data[nbuf->offset];
udpframe = (udp_frame_hdr *) &nbuf->data[nbuf->offset - UDP_HDR_SIZE];
/* check packet if it is valid and if it is really intended for us */
/*
* check packet if it is valid and if it is really intended for us
*/
if (rx_p->type == BOOTP_TYPE_BOOTREPLY && rx_p->xid == XID)
{
@@ -109,6 +111,7 @@ void bootp_handler(NIF *nif, NBUF *nbuf)
}
else
{
dbg("received invalid bootp reply\r\n");
/* not valid */
return;
}

9
net/fec.c
View File

@@ -1047,7 +1047,6 @@ void fec1_tx_frame(void)
fec_tx_frame(1);
}
/********************************************************************/
/*
* Send a packet out the selected FEC
*
@@ -1121,7 +1120,6 @@ int fec1_send(NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NBUF *nbuf)
return fec_send(1, nif, dst, src, type, nbuf);
}
/********************************************************************/
/*
* Enable interrupts on the selected FEC
*
@@ -1158,7 +1156,7 @@ void fec_irq_enable(uint8_t ch, uint8_t lvl, uint8_t pri)
MCF_INTC_IMRH &= ~MCF_INTC_IMRH_INT_MASK38;
}
/********************************************************************/
/*
* Disable interrupts on the selected FEC
*
@@ -1182,7 +1180,6 @@ void fec_irq_disable(uint8_t ch)
MCF_INTC_IMRH |= MCF_INTC_IMRH_INT_MASK38;
}
/********************************************************************/
/*
* FEC interrupt handler
* All interrupts are multiplexed into a single vector for each
@@ -1315,7 +1312,6 @@ int fec1_interrupt_handler(void* arg1, void* arg2)
return 1;
}
/********************************************************************/
/*
* Configure the selected Ethernet port and enable all operations
*
@@ -1384,7 +1380,6 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
MCF_FEC_ECR(ch) |= MCF_FEC_ECR_ETHER_EN;
}
/********************************************************************/
/*
* Reset the selected Ethernet port
*
@@ -1396,7 +1391,7 @@ void fec_eth_reset(uint8_t ch)
// To do
}
/********************************************************************/
/*
* Stop the selected Ethernet port
*

17
net/nbuf.c
View File

@@ -14,7 +14,7 @@
//#define DBG_NBUF
#if defined(DBG_NBUF)
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_NBUF */
@@ -48,7 +48,7 @@ int nbuf_init(void)
queue_init(&nbuf_queue[i]);
}
dbg("%s: Creating %d net buffers of %d bytes\r\n", __FUNCTION__, NBUF_MAX, NBUF_SZ);
dbg("Creating %d net buffers of %d bytes\r\n", NBUF_MAX, NBUF_SZ);
for (i = 0; i < NBUF_MAX; ++i)
{
@@ -76,7 +76,7 @@ int nbuf_init(void)
queue_add(&nbuf_queue[NBUF_FREE], (QNODE *)nbuf);
}
dbg("%s: NBUF allocation complete\r\n", __FUNCTION__);
dbg("NBUF allocation complete\r\n");
return 0;
}
@@ -87,7 +87,8 @@ int nbuf_init(void)
void nbuf_flush(void)
{
NBUF *nbuf;
int i, level = set_ipl(7);
int i;
int level = set_ipl(7);
int n = 0;
for (i = 0; i < NBUF_MAX; ++i)
@@ -176,7 +177,8 @@ void nbuf_add(int q, NBUF *nbuf)
void nbuf_reset(void)
{
NBUF *nbuf;
int i, level = set_ipl(7);
int i;
int level = set_ipl(7);
for (i = 1; i < NBUF_MAXQ; ++i)
{
@@ -193,7 +195,9 @@ void nbuf_debug_dump(void)
{
#ifdef DBG_NBUF
NBUF *nbuf;
int i, j, level;
int i;
int j;
int level;
level = set_ipl(7);
@@ -204,6 +208,7 @@ void nbuf_debug_dump(void)
dbg("--------------------------------------\r\n");
j = 0;
nbuf = (NBUF *) queue_peek(&nbuf_queue[i]);
while (nbuf != NULL)
{
dbg("%d\t0x%08x\t0x%04x\t0x%04x\r\n", j++, nbuf->data,

11
net/net_timer.c
View File

@@ -14,7 +14,7 @@
//#define DBG_TMR
#ifdef DBG_TMR
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_TMR */
@@ -48,7 +48,7 @@ int timer_default_isr(void *not_used, NET_TIMER *t)
*/
MCF_GPT_GMS(t->ch) = 0;
dbg("%s: timer isr called for timer channel %d\r\n", __FUNCTION__);
dbg("timer isr called for timer channel %d\r\n");
/*
* Clear the reference - the desired seconds have expired
@@ -133,8 +133,7 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
*/
if (!((ch <= 3) && (lvl <= 7) && (lvl >= 1) && (pri <= 7)))
{
dbg("%s: illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", __FUNCTION__,
ch, lvl, pri);
dbg("illegal parameters (ch=%d, lvl=%d, pri=%d)\r\n", ch, lvl, pri);
return false;
}
@@ -160,10 +159,10 @@ bool timer_init(uint8_t ch, uint8_t lvl, uint8_t pri)
(void *) &net_timer[ch])
)
{
dbg("%s: could not register timer interrupt handler\r\n", __FUNCTION__);
dbg("could not register timer interrupt handler\r\n");
return false;
}
dbg("%s: timer handler registered\r\n", __FUNCTION__);
dbg("timer handler registered\r\n", __FUNCTION__);
/*
* Calculate the require CNT value to get a 1 second timeout

6
net/nif.c
View File

@@ -16,7 +16,7 @@
#define DBG_NIF
#ifdef DBG_NIF
#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_NIF */
@@ -56,13 +56,13 @@ void nif_protocol_handler(NIF *nif, uint16_t protocol, NBUF *pNbuf)
{
if (nif->protocol[index].protocol == protocol)
{
dbg("%s: call protocol handler for protocol %d at %p\r\n", __FUNCTION__, protocol,
dbg("call protocol handler for protocol %d at %p\r\n", protocol,
nif->protocol[index].handler);
nif->protocol[index].handler(nif,pNbuf);
return;
}
}
dbg("%s: no protocol handler found for protocol %d\r\n", __FUNCTION__, protocol);
dbg("no protocol handler found for protocol %d\r\n", protocol);
}
void *nif_get_protocol_info(NIF *nif, uint16_t protocol)

10
net/udp.c
View File

@@ -14,7 +14,7 @@
//#define DBG_UDP
#if defined(DBG_UDP)
#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif /* DBG_UDP */
@@ -112,7 +112,7 @@ int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
if (nif == NULL)
{
dbg("%s: nif is NULL\r\n", __FUNCTION__);
dbg("nif is NULL\r\n");
return 0;
}
@@ -141,7 +141,7 @@ int udp_send(NIF *nif, uint8_t *dest, int sport, int dport, NBUF *pNbuf)
myip = ip_get_myip(nif_get_protocol_info(nif, ETH_FRM_IP));
dbg("%s: sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n", __FUNCTION__,
dbg("sent UDP request to %d.%d.%d.%d from %d.%d.%d.%d\r\n",
dest[0], dest[1], dest[2], dest[3],
myip[0], myip[1], myip[2], myip[3]);
@@ -159,7 +159,7 @@ void udp_handler(NIF *nif, NBUF *pNbuf)
udpframe = (udp_frame_hdr *) &pNbuf->data[pNbuf->offset];
dbg("%s: packet received\r\n", __FUNCTION__);
dbg("packet received\r\n",);
/*
* Adjust the length and valid data offset of the packet we are
@@ -176,7 +176,7 @@ void udp_handler(NIF *nif, NBUF *pNbuf)
handler(nif, pNbuf);
else
{
dbg("%s: received UDP packet for non-supported port\n", __FUNCTION__);
dbg("received UDP packet for non-supported port\n");
nbuf_free(pNbuf);
}

2
pci/ohci-hcd.c
View File

@@ -1042,7 +1042,7 @@ static void check_status(ohci_t *ohci, td_t *td_list)
if (cc)
{
//err("OHCI usb-%s-%c error: %s (%x)", ohci->slot_name, (char)ohci->controller + '0', cc_to_string[cc], cc);
err("OHCI usb-%s-%c error: %s (%x)\r\n", ohci->slot_name, (char)ohci->controller + '0', cc_to_string[cc], cc);
if (*phwHeadP & swpl(0x1))
{
if (lurb_priv && ((td_list->index + 1) < urb_len))

2
spi/dspi.c
View File

@@ -36,7 +36,7 @@ struct baudrate
int divider;
};
static const int system_clock = 133000000; /* System clock in Hz */
static const int system_clock = 132000000; /* System clock in Hz */
struct baudrate baudrates[] =
{

25
sys/BaS.c
View File

@@ -52,7 +52,7 @@
//#define BAS_DEBUG
#if defined(BAS_DEBUG)
#define dbg(format, arg...) do { xprintf("DEBUG: " format "\r\n", ##arg); } while (0)
#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
#else
#define dbg(format, arg...) do { ; } while (0)
#endif
@@ -132,7 +132,7 @@ void pic_init(void)
if (answer[0] != 'O' || answer[1] != 'K' || answer[2] != '!')
{
dbg("%s: PIC initialization failed. Already initialized?\r\n", __FUNCTION__);
dbg("PIC initialization failed. Already initialized?\r\n");
}
else
{
@@ -203,12 +203,12 @@ void acia_init()
void enable_coldfire_interrupts()
{
xprintf("enable interrupts: ");
#if MACHINE_FIREBEE
#if defined(MACHINE_FIREBEE)
*FPGA_INTR_CONTRL = 0L; /* disable all interrupts */
#endif /* MACHINE_FIREBEE */
MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */
#if MACHINE_FIREBEE
#if defined(MACHINE_FIREBEE)
/*
* TIN0 on the Coldfire is connected to the FPGA. TIN0 triggers every write
* access to 0xff8201 (vbasehi), i.e. everytime the video base address is written
@@ -231,9 +231,10 @@ void enable_coldfire_interrupts()
void disable_coldfire_interrupts()
{
#ifdef MACHINE_FIREBEE
#if defined(MACHINE_FIREBEE)
*FPGA_INTR_ENABLE = 0; /* disable all interrupts */
#endif /* MACHINE_FIREBEE */
MCF_EPORT_EPIER = 0x0;
MCF_EPORT_EPFR = 0x0;
MCF_INTC_IMRL = 0xfffffffe;
@@ -243,7 +244,7 @@ void disable_coldfire_interrupts()
NIF nif1;
#ifdef MACHINE_M5484LITE
#if defined(MACHINE_M5484LITE)
NIF nif2;
#endif
static IP_INFO ip_info;
@@ -267,7 +268,7 @@ void network_init(void)
if (!isr_register_handler(vector, handler, NULL, (void *) &nif1))
{
dbg("%s: unable to register handler for vector %d\r\n", __FUNCTION__, vector);
dbg("unable to register handler for vector %d\r\n", vector);
return;
}
@@ -279,7 +280,7 @@ void network_init(void)
if (!isr_register_handler(vector, handler, NULL,NULL))
{
dbg("%s: Error: Unable to register handler for vector %s\r\n", __FUNCTION__, vector);
dbg("Error: Unable to register handler for vector %s\r\n", vector);
return;
}
@@ -291,7 +292,7 @@ void network_init(void)
memcpy(nif1.hwa, mac, 6);
memcpy(nif1.broadcast, bc, 6);
dbg("%s: ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n", __FUNCTION__,
dbg("ethernet address is %02X:%02X:%02X:%02X:%02X:%02X\r\n",
nif1.hwa[0], nif1.hwa[1], nif1.hwa[2],
nif1.hwa[3], nif1.hwa[4], nif1.hwa[5]);
@@ -319,7 +320,7 @@ void BaS(void)
uint8_t *src;
uint8_t *dst = (uint8_t *) TOS;
#if MACHINE_FIREBEE /* LITE board has no pic and (currently) no nvram */
#if defined(MACHINE_FIREBEE) /* LITE board has no pic and (currently) no nvram */
pic_init();
nvram_init();
#endif /* MACHINE_FIREBEE */
@@ -415,7 +416,7 @@ void BaS(void)
*/
memset((void *) 0x400, 0, 0x400);
#ifdef MACHINE_FIREBEE
#if defined(MACHINE_FIREBEE)
/* set Falcon bus control register */
/* sets bit 3 and 6. Both are undefined on an original Falcon? */
@@ -434,7 +435,7 @@ void BaS(void)
* (uint32_t *) 0x5a4 = FASTRAM_END; /* ramtop TOS system variable */
* (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */
#ifdef MACHINE_FIREBEE /* m5484lite has no ACIA and no dip switch... */
#if defined(MACHINE_FIREBEE) /* m5484lite has no ACIA and no dip switch... */
acia_init();
#endif /* MACHINE_FIREBEE */

10
sys/cache.c
View File

@@ -72,7 +72,7 @@ void flush_and_invalidate_caches(void)
" bne.s cfa_setloop | no->\n\t"
/* input */ :
/* output */ :
/* clobber */ : "d0", "d1", "a0"
/* clobber */ : "cc", "d0", "d1", "a0"
);
}
@@ -102,7 +102,7 @@ void flush_icache_range(void *address, size_t size)
" cpushl ic,(%[set]) \n\t"
: /* output parameters */
: [set] "a" (set) /* input parameters */
:
: "cc" /* clobbered registers */
);
}
/* next loop will finish the cache ie pass the hole */
@@ -119,7 +119,7 @@ void flush_icache_range(void *address, size_t size)
" cpushl ic,(%[set])"
: /* output parameters */
: [set] "a" (set)
:
: "cc"
);
}
}
@@ -154,7 +154,7 @@ void flush_dcache_range(void *address, size_t size)
" cpushl dc,(%[set]) \n\t"
: /* output parameters */
: [set] "a" (set)
: /* clobbered registers */
: "cc" /* clobbered registers */
);
}
/* next loop will finish the cache ie pass the hole */
@@ -172,7 +172,7 @@ void flush_dcache_range(void *address, size_t size)
" cpushl dc,(%[set]) \n\t"
: /* output parameters */
: [set] "a" (set)
: /* clobbered registers */
: "cc" /* clobbered registers */
);
}
}

6
sys/fault_vectors.c
View File

@@ -192,7 +192,11 @@ void setup_vectors(void)
__asm__ __volatile__("clr.l d0\n\t"\
"movec.l d0,VBR\n\t"\
"nop\n\t"\
"move.l d0,_rt_vbr" ::: "d0", "memory");
"move.l d0,_rt_vbr"
: /* outputs */
: /* inputs */
: "d0", "memory", "cc" /* clobbered registers */
);
xprintf("finished.\r\n");
}

6
sys/sysinit.c
View File

@@ -1186,12 +1186,6 @@ void initialize_hardware(void)
*/
setup_vectors();
#ifdef _NOT_USED_
/* make sure the handlers are called */
__asm__ __volatile__("dc.w 0xafff"); /* should trigger a line-A exception */
#endif /* _NOT_USED_ */
/*
* save the planet (and reduce case heat): disable clocks of unused SOC modules
*/