From 73b318549753028b34a28e7c56f9c7ef33ce7fad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Mon, 13 May 2013 14:15:10 +0000 Subject: [PATCH] read result of DSPI receiver fifo only after transfer has been finished completely (check with status register) --- BaS_gcc/sources/mmc.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/BaS_gcc/sources/mmc.c b/BaS_gcc/sources/mmc.c index 9b40840..079b132 100644 --- a/BaS_gcc/sources/mmc.c +++ b/BaS_gcc/sources/mmc.c @@ -97,13 +97,11 @@ static uint8_t xchg_spi(uint8_t byte) uint32_t fifo = dspi_fifo_val | byte; uint8_t res; + while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until previous DSPI transfer completed */ MCF_DSPI_DTFR = fifo; - while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until DSPI transfer complete */ - MCF_DSPI_DSR = 0xffffffff; /* clear DSPI status register */ - while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait again for transfer to complete */ - - fifo = MCF_DSPI_DRFR; + while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF)); /* wait until previous DSPI transfer completed */ + fifo = MCF_DSPI_DRFR; /* read out return value */ MCF_DSPI_DSR = 0xffffffff; /* clear status register */