From 71ae31867502b339cb2b37054aea97394cfaba03 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Mon, 13 Jan 2014 21:26:42 +0000 Subject: [PATCH] renamed mmutr_miss() to mmu_map_page() (that's what its doing) --- BaS_gcc/include/mmu.h | 2 +- BaS_gcc/sys/mmu.c | 14 ++++++++------ 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/BaS_gcc/include/mmu.h b/BaS_gcc/include/mmu.h index ba3a4e1..01839b8 100644 --- a/BaS_gcc/include/mmu.h +++ b/BaS_gcc/include/mmu.h @@ -35,6 +35,6 @@ extern long video_tlb; extern long video_sbt; extern void mmu_init(void); -extern void mmutr_miss(uint32_t address); +extern void mmu_map_page(uint32_t virt, uint32_t phys); #endif /* _MMU_H_ */ diff --git a/BaS_gcc/sys/mmu.c b/BaS_gcc/sys/mmu.c index a9f2d70..c4fe669 100644 --- a/BaS_gcc/sys/mmu.c +++ b/BaS_gcc/sys/mmu.c @@ -447,7 +447,7 @@ bool access_exception(uint32_t pc, uint32_t format_status) } else /* map this page */ { - mmutr_miss(fault_address); + mmu_map_page(fault_address, fault_address); return true; } } @@ -456,16 +456,18 @@ bool access_exception(uint32_t pc, uint32_t format_status) } -void mmutr_miss(uint32_t address) +void mmu_map_page(uint32_t virt, uint32_t phys) { - dbg("MMU TLB MISS accessing 0x%08x\r\n", address); + dbg("%s: map virt=%p to phys=%p\r\n", virt, phys); - /* add missed page to TLB */ - MCF_MMU_MMUTR = (address & 0xfff00000) | /* virtual aligned to 1M */ + /* + * add page to TLB + */ + MCF_MMU_MMUTR = (virt & 0xfff00000) | /* virtual aligned to 1M */ MCF_MMU_MMUTR_SG | /* shared global */ MCF_MMU_MMUTR_V; /* valid */ - MCF_MMU_MMUDR = (address & 0xfff00000) | /* physical aligned to 1M */ + MCF_MMU_MMUDR = (phys & 0xfff00000) | /* physical aligned to 1M */ MCF_MMU_MMUDR_SZ(0) | /* 1 MB page size */ MCF_MMU_MMUDR_CM(0x1) | /* cacheable copyback */ MCF_MMU_MMUDR_R | /* read access enable */