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fixed resource descriptors

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This commit is contained in:
Markus Fröschle
2013-11-05 05:47:11 +00:00
parent a3b2371608
commit 6af7f6f35b
4 changed files with 47 additions and 62 deletions
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13
BaS_gcc/include/pci.h
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@@ -91,14 +91,7 @@
#define PCI_IO_LIMIT_UPPER16 0x32 #define PCI_IO_LIMIT_UPPER16 0x32
#define PCI_BRIDGE_CONTROL 0x3E /* Bridge Control */ #define PCI_BRIDGE_CONTROL 0x3E /* Bridge Control */
typedef struct struct pci_resource_descriptor /* structure of resource descriptor */
{
unsigned long *subcookie;
unsigned long version;
long routine[45];
} PCI_COOKIE;
typedef struct /* structure of resource descriptor */
{ {
unsigned short next; /* length of the following structure */ unsigned short next; /* length of the following structure */
unsigned short flags; /* type of resource and misc. flags */ unsigned short flags; /* type of resource and misc. flags */
@@ -106,7 +99,7 @@ typedef struct /* structure of resource descriptor */
unsigned long length; /* length of resource */ unsigned long length; /* length of resource */
unsigned long offset; /* offset PCI to phys. CPU Address */ unsigned long offset; /* offset PCI to phys. CPU Address */
unsigned long dmaoffset; /* offset for DMA-transfers */ unsigned long dmaoffset; /* offset for DMA-transfers */
} __attribute__ ((packed)) PCI_RSC_DESC; } __attribute__ ((packed));
typedef struct /* structure of address conversion */ typedef struct /* structure of address conversion */
{ {
@@ -209,7 +202,7 @@ extern void pci_write_config_longword(uint16_t handle, uint16_t offset, uint32_t
extern void pci_write_config_word(uint16_t handle, uint16_t offset, uint16_t value); extern void pci_write_config_word(uint16_t handle, uint16_t offset, uint16_t value);
extern void pci_write_config_byte(uint16_t handle, uint16_t offset, uint8_t value); extern void pci_write_config_byte(uint16_t handle, uint16_t offset, uint8_t value);
extern PCI_RSC_DESC *pci_get_resource(uint16_t handle); extern struct pci_resource_descriptor *pci_get_resource(uint16_t handle);
extern int16_t pci_hook_interrupt(uint16_t handle, void *interrupt_handler, void *parameter); extern int16_t pci_hook_interrupt(uint16_t handle, void *interrupt_handler, void *parameter);
extern int16_t pci_unhook_interrupt(uint16_t handle); extern int16_t pci_unhook_interrupt(uint16_t handle);

6
BaS_gcc/sources/ehci-hcd.c
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@@ -853,8 +853,8 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
uint32_t reg; uint32_t reg;
uint32_t cmd; uint32_t cmd;
uint32_t usb_base_addr = 0xFFFFFFFF; uint32_t usb_base_addr = 0xFFFFFFFF;
PCI_RSC_DESC *pci_rsc_desc; struct pci_resource_descriptor *pci_rsc_desc;
pci_rsc_desc = (PCI_RSC_DESC *)pci_get_resource(handle); /* USB EHCI */ pci_rsc_desc = pci_get_resource(handle); /* USB EHCI */
if (handle && (ent != NULL)) if (handle && (ent != NULL))
{ {
memset(&gehci, 0, sizeof(struct ehci)); memset(&gehci, 0, sizeof(struct ehci));
@@ -922,7 +922,7 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
} }
} }
flags = pci_rsc_desc->flags; flags = pci_rsc_desc->flags;
pci_rsc_desc = (PCI_RSC_DESC *)((uint32_t)pci_rsc_desc->next + (uint32_t)pci_rsc_desc); pci_rsc_desc = (struct pci_resource_descriptor *)((uint32_t)pci_rsc_desc->next + (uint32_t)pci_rsc_desc);
} }
while(!(flags & FLG_LAST)); while(!(flags & FLG_LAST));
} }

10
BaS_gcc/sources/ohci-hcd.c
View File

@@ -1590,8 +1590,8 @@ static int hc_reset(ohci_t *ohci)
{ {
int timeout = 1000; int timeout = 1000;
uint32_t usb_base_addr = 0xFFFFFFFF; uint32_t usb_base_addr = 0xFFFFFFFF;
PCI_RSC_DESC *pci_rsc_desc; struct pci_resource_descriptor *pci_rsc_desc;
pci_rsc_desc = (PCI_RSC_DESC *) pci_get_resource(handle); /* USB OHCI */ pci_rsc_desc = pci_get_resource(handle); /* USB OHCI */
if ((long)pci_rsc_desc >= 0) if ((long)pci_rsc_desc >= 0)
{ {
unsigned short flags; unsigned short flags;
@@ -1616,7 +1616,7 @@ static int hc_reset(ohci_t *ohci)
} }
} }
flags = pci_rsc_desc->flags; flags = pci_rsc_desc->flags;
pci_rsc_desc = (PCI_RSC_DESC *)((uint32_t)pci_rsc_desc->next + (uint32_t)pci_rsc_desc); pci_rsc_desc = (struct pci_resource_descriptor *) ((uint32_t)pci_rsc_desc->next + (uint32_t)pci_rsc_desc);
} }
while (!(flags & FLG_LAST)); while (!(flags & FLG_LAST));
} }
@@ -1927,7 +1927,7 @@ int ohci_usb_lowlevel_init(uint16_t handle, const struct pci_device_id *ent, voi
{ {
uint32_t usb_base_addr = 0xFFFFFFFF; uint32_t usb_base_addr = 0xFFFFFFFF;
ohci_t *ohci = &gohci[PCI_FUNCTION_FROM_HANDLE(handle) & 1]; ohci_t *ohci = &gohci[PCI_FUNCTION_FROM_HANDLE(handle) & 1];
PCI_RSC_DESC *pci_rsc_desc = (PCI_RSC_DESC *) pci_get_resource(handle); /* USB OHCI */ struct pci_resource_descriptor *pci_rsc_desc = pci_get_resource(handle); /* USB OHCI */
if (handle && (ent != NULL)) if (handle && (ent != NULL))
{ {
@@ -2008,7 +2008,7 @@ int ohci_usb_lowlevel_init(uint16_t handle, const struct pci_device_id *ent, voi
} }
} }
flags = pci_rsc_desc->flags; flags = pci_rsc_desc->flags;
pci_rsc_desc = (PCI_RSC_DESC *)((uint32_t)pci_rsc_desc->next + (uint32_t)pci_rsc_desc); pci_rsc_desc = (struct pci_resource_descriptor *)((uint32_t)pci_rsc_desc->next + (uint32_t)pci_rsc_desc);
} }
while (!(flags & FLG_LAST)); while (!(flags & FLG_LAST));
} }

78
BaS_gcc/sources/pci.c
View File

@@ -28,6 +28,7 @@
#include "pci.h" #include "pci.h"
#include "stdint.h" #include "stdint.h"
#include "bas_printf.h" #include "bas_printf.h"
#include "bas_string.h"
#include "util.h" #include "util.h"
#include "wait.h" #include "wait.h"
@@ -59,13 +60,10 @@ static struct pci_class
}; };
static int num_classes = sizeof(pci_classes) / sizeof(struct pci_class); static int num_classes = sizeof(pci_classes) / sizeof(struct pci_class);
static struct handle_index #define NUM_CARDS 10
{ #define NUM_RESOURCES 6
uint16_t handle; uint16_t handles[NUM_CARDS]; /* holds the handle of a card at position = array index */
uint16_t index; static struct pci_resource_descriptor resource_descriptors[NUM_CARDS][NUM_RESOURCES]; /* FIXME: fix number of cards */
} handles[10];
static PCI_RSC_DESC resource_descriptors[10][6]; /* FIXME: fix number of cards */
static char *device_class(int classcode) static char *device_class(int classcode)
{ {
@@ -174,13 +172,13 @@ void pci_write_config_longword(uint16_t handle, uint16_t offset, uint32_t value)
* *
* get resource descriptor chain for handle * get resource descriptor chain for handle
*/ */
PCI_RSC_DESC *pci_get_resource(uint16_t handle) struct pci_resource_descriptor *pci_get_resource(uint16_t handle)
{ {
int i; int i;
int index = -1; int index = -1;
for (i = 0; i < 10; i++) for (i = 0; i < NUM_CARDS; i++)
if (handles[i].handle == handle) if (handles[i] == handle)
index = i; index = i;
if (index == -1) if (index == -1)
return NULL; return NULL;
@@ -266,16 +264,16 @@ static void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
uint32_t address; uint32_t address;
uint16_t handle; uint16_t handle;
uint16_t index = - 1; uint16_t index = - 1;
PCI_RSC_DESC *descriptors; struct pci_resource_descriptor *descriptors;
int i; int i;
/* determine pci handle from bus, slot + function number */ /* determine pci handle from bus, slot + function number */
handle = PCI_HANDLE(bus, slot, function); handle = PCI_HANDLE(bus, slot, function);
/* find index into resource descriptor table for handle */ /* find index into resource descriptor table for handle */
for (i = 0; i < 10; i++) for (i = 0; i < NUM_CARDS; i++)
{ {
if (handles[i].handle == handle) if (handles[i] == handle)
{ {
index = i; index = i;
break; break;
@@ -322,7 +320,7 @@ static void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
//xprintf("BAR[%d] configured to %08x, size %x\r\n", i, value, size); //xprintf("BAR[%d] configured to %08x, size %x\r\n", i, value, size);
/* fill resource descriptor */ /* fill resource descriptor */
descriptors[barnum].next = sizeof(PCI_RSC_DESC); descriptors[barnum].next = sizeof(struct pci_resource_descriptor);
descriptors[barnum].flags = 0 | FLG_8BIT | FLG_16BIT | FLG_32BIT | 1; descriptors[barnum].flags = 0 | FLG_8BIT | FLG_16BIT | FLG_32BIT | 1;
descriptors[barnum].start = mem_address; descriptors[barnum].start = mem_address;
descriptors[barnum].length = size; descriptors[barnum].length = size;
@@ -351,7 +349,7 @@ static void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
//xprintf("BAR[%d] mapped to %08x, size %x\r\n", i, value, size); //xprintf("BAR[%d] mapped to %08x, size %x\r\n", i, value, size);
/* fill resource descriptor */ /* fill resource descriptor */
descriptors[barnum].next = sizeof(PCI_RSC_DESC); descriptors[barnum].next = sizeof(struct pci_resource_descriptor);
descriptors[barnum].flags = FLG_IO | FLG_8BIT | FLG_16BIT | FLG_32BIT | 1; descriptors[barnum].flags = FLG_IO | FLG_8BIT | FLG_16BIT | FLG_32BIT | 1;
descriptors[barnum].start = io_address; descriptors[barnum].start = io_address;
descriptors[barnum].offset = PCI_MEMORY_OFFSET; descriptors[barnum].offset = PCI_MEMORY_OFFSET;
@@ -377,7 +375,6 @@ void pci_scan(void)
uint16_t slot; uint16_t slot;
uint16_t function; uint16_t function;
uint16_t index = 0; uint16_t index = 0;
uint16_t i;
xprintf("\r\nPCI bus scan...\r\n\r\n"); xprintf("\r\nPCI bus scan...\r\n\r\n");
xprintf(" Bus|Slot|Func|Vndr|Dev |\r\n"); xprintf(" Bus|Slot|Func|Vndr|Dev |\r\n");
@@ -402,19 +399,12 @@ void pci_scan(void)
if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */ if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */
{ {
/* save handle to index value so that we later find our resources again */ /* save handle to index value so that we later find our resources again */
handles[index].index = index; handles[index] = PCI_HANDLE(bus, slot, function);
handles[index].handle = PCI_HANDLE(bus, slot, function);
/* configure memory and I/O for card */ /* configure memory and I/O for card */
pci_device_config(bus, slot, function); pci_device_config(bus, slot, function);
} }
//for (i = 0; i < 0x40; i += 4)
//{
//value = pci_read_config_longword(handle, i);
//xprintf("register %02x value= %08x\r\n", i, value);
//}
/* test for multi-function device to avoid ghost device detects */ /* test for multi-function device to avoid ghost device detects */
value = pci_read_config_longword(handle, 0x0c); value = pci_read_config_longword(handle, 0x0c);
if (function == 0 && !(PCI_HEADER_TYPE(value) & 0x80)) /* no multi function device */ if (function == 0 && !(PCI_HEADER_TYPE(value) & 0x80)) /* no multi function device */
@@ -461,37 +451,39 @@ void init_pci(void)
{ {
xprintf("initializing PCI bridge:"); xprintf("initializing PCI bridge:");
MCF_PCIARB_PACR = MCF_PCIARB_PACR_INTMPRI MCF_PCIARB_PACR = MCF_PCIARB_PACR_INTMPRI
+ MCF_PCIARB_PACR_EXTMPRI(0x1F) + MCF_PCIARB_PACR_EXTMPRI(0x1F)
+ MCF_PCIARB_PACR_INTMINTEN + MCF_PCIARB_PACR_INTMINTEN
+ MCF_PCIARB_PACR_EXTMINTEN(0x1F); + MCF_PCIARB_PACR_EXTMINTEN(0x1F);
/* Setup burst parameters */ /* Setup burst parameters */
MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(4) + MCF_PCI_PCICR1_LATTIMER(32); MCF_PCI_PCICR1 = MCF_PCI_PCICR1_CACHELINESIZE(4) + MCF_PCI_PCICR1_LATTIMER(32);
MCF_PCI_PCICR2 = MCF_PCI_PCICR2_MINGNT(16) + MCF_PCI_PCICR2_MAXLAT(16); MCF_PCI_PCICR2 = MCF_PCI_PCICR2_MINGNT(16) + MCF_PCI_PCICR2_MAXLAT(16);
/* Turn on error signaling */ /* Turn on error signaling */
MCF_PCI_PCIICR = MCF_PCI_PCIICR_TAE + MCF_PCI_PCIICR_TAE + MCF_PCI_PCIICR_REE + 32; MCF_PCI_PCIICR = MCF_PCI_PCIICR_TAE + MCF_PCI_PCIICR_TAE + MCF_PCI_PCIICR_REE + 32;
MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SEE; MCF_PCI_PCIGSCR |= MCF_PCI_PCIGSCR_SEE;
/* Configure Initiator Windows */ /* Configure Initiator Windows */
/* initiator window 0 base / translation adress register */ /* initiator window 0 base / translation adress register */
MCF_PCI_PCIIW0BTAR = (PCI_MEMORY_OFFSET + ((PCI_MEMORY_SIZE -1) >> 8)) & 0xffff0000; MCF_PCI_PCIIW0BTAR = (PCI_MEMORY_OFFSET + ((PCI_MEMORY_SIZE -1) >> 8)) & 0xffff0000;
/* initiator window 1 base / translation adress register */ /* initiator window 1 base / translation adress register */
MCF_PCI_PCIIW1BTAR = (PCI_IO_OFFSET + ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000; MCF_PCI_PCIIW1BTAR = (PCI_IO_OFFSET + ((PCI_IO_SIZE - 1) >> 8)) & 0xffff0000;
/* initiator window 2 base / translation address register */ /* initiator window 2 base / translation address register */
MCF_PCI_PCIIW2BTAR = 0L; /* not used */ MCF_PCI_PCIIW2BTAR = 0L; /* not used */
/* initiator window configuration register */ /* initiator window configuration register */
MCF_PCI_PCIIWCR = MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE + MCF_PCI_PCIIWCR_WINCTRL1_IO; MCF_PCI_PCIIWCR = MCF_PCI_PCIIWCR_WINCTRL0_MEMRDLINE + MCF_PCI_PCIIWCR_WINCTRL1_IO;
/* reset PCI devices */ /* reset PCI devices */
MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR; MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR;
xprintf("finished\r\n"); xprintf("finished\r\n");
/* initialize resource descriptor table */
memset(&resource_descriptors, 0, NUM_CARDS * NUM_RESOURCES * sizeof(struct pci_resource_descriptor));
pci_scan(); pci_scan();
} }