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added more missing files to x86emu

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This commit is contained in:
Markus Fröschle
2013-12-29 19:59:25 +00:00
parent f2b55d0230
commit 6ab0dbce07
12 changed files with 12174 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
BaS_gcc/Makefile
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@@ -120,6 +120,10 @@ CSRCS= \
decode.c \ decode.c \
sys.c \ sys.c \
debug.c \ debug.c \
prim_ops.c \
ops.c \
ops2.c \
x86pcibios.c \
\ \
basflash.c \ basflash.c \
basflash_start.c basflash_start.c

4
BaS_gcc/bas.lk.in
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@@ -88,8 +88,12 @@ SECTIONS
OBJDIR/biosemu.o OBJDIR/biosemu.o
OBJDIR/decode.o OBJDIR/decode.o
OBJDIR/ops.o
OBJDIR/ops2.o
OBJDIR/sys.o OBJDIR/sys.o
OBJDIR/debug.o OBJDIR/debug.o
OBJDIR/prim_ops.o
OBJDIR/x86pcibios.o
OBJDIR/radeon_base.o OBJDIR/radeon_base.o
OBJDIR/radeon_accel.o OBJDIR/radeon_accel.o

29
BaS_gcc/include/x86pcibios.h Normal file
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@@ -0,0 +1,29 @@
#ifndef PCI_BIOS_H
#define PCI_BIOS_H
enum {
PCI_BIOS_PRESENT = 0xB101,
FIND_PCI_DEVICE = 0xB102,
FIND_PCI_CLASS_CODE = 0xB103,
GENERATE_SPECIAL_CYCLE = 0xB106,
READ_CONFIG_BYTE = 0xB108,
READ_CONFIG_WORD = 0xB109,
READ_CONFIG_DWORD = 0xB10A,
WRITE_CONFIG_BYTE = 0xB10B,
WRITE_CONFIG_WORD = 0xB10C,
WRITE_CONFIG_DWORD = 0xB10D,
GET_IRQ_ROUTING_OPTIONS = 0xB10E,
SET_PCI_IRQ = 0xB10F
};
enum {
SUCCESSFUL = 0x00,
FUNC_NOT_SUPPORTED = 0x81,
BAD_VENDOR_ID = 0x83,
DEVICE_NOT_FOUND = 0x86,
BAD_REGISTER_NUMBER = 0x87,
SET_FAILED = 0x88,
BUFFER_TOO_SMALL = 0x89
};
#endif /* PCI_BIOS_H */

2
BaS_gcc/sys/init_fpga.c
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@@ -39,6 +39,7 @@ extern uint8_t _FPGA_FLASH_DATA_SIZE[];
#define FPGA_FLASH_DATA_SIZE ((uint32_t) &_FPGA_FLASH_DATA_SIZE[0]) #define FPGA_FLASH_DATA_SIZE ((uint32_t) &_FPGA_FLASH_DATA_SIZE[0])
#ifdef _NOT_USED_
void test_longword(void) void test_longword(void)
{ {
uint32_t *fpga_data = (uint32_t *) FPGA_FLASH_DATA; uint32_t *fpga_data = (uint32_t *) FPGA_FLASH_DATA;
@@ -76,6 +77,7 @@ void test_byte(void)
} while (fpga_data < fpga_flash_data_end); } while (fpga_data < fpga_flash_data_end);
xprintf("finished. \r\n"); xprintf("finished. \r\n");
} }
#endif /* _NOT_USED_ */
/* /*
* load FPGA * load FPGA

4
BaS_gcc/x86emu/biosemu.c
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@@ -68,7 +68,7 @@ uint32_t offset_mem;
static uint32_t offset_io; static uint32_t offset_io;
static uint32_t config_address_reg; static uint32_t config_address_reg;
extern int pcibios_handler(); extern int x86_pcibios_emulator();
extern COOKIE *get_cookie(long id); extern COOKIE *get_cookie(long id);
extern short restart, os_magic; extern short restart, os_magic;
@@ -232,7 +232,7 @@ void do_int(int num)
ret = 0; ret = 0;
break; break;
case 0x1A: case 0x1A:
ret = pcibios_handler(); ret = x86_pcibios_emulator();
ret = 1; ret = 1;
break; break;
case 0xe6: case 0xe6:

477
BaS_gcc/x86emu/debug.c Normal file
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@@ -0,0 +1,477 @@
/****************************************************************************
*
* Realmode X86 Emulator Library
*
* Copyright (C) 1991-2004 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
*
* ========================================================================
*
* Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
* ========================================================================
*
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
*
* Description: This file contains the code to handle debugging of the
* emulator.
*
****************************************************************************/
#include "bas_types.h"
#include "bas_printf.h"
#include "x86debug.h"
#include "x86emui.h"
/*----------------------------- Implementation ----------------------------*/
#ifdef DBG_X86EMU
static void print_encoded_bytes (uint16_t s, uint16_t o);
static void print_decoded_instruction (void);
//static int parse_line (char *s, int *ps, int *n);
/* should look something like debug's output. */
void X86EMU_trace_regs (void)
{
if (DEBUG_TRACE()) {
x86emu_dump_regs();
}
if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) {
dbg("0x%x", M.x86.saved_cs);
dbg(":0x%x", M.x86.saved_ip);
dbg(" ");
print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
print_decoded_instruction();
}
}
void X86EMU_trace_xregs (void)
{
if (DEBUG_TRACE()) {
x86emu_dump_xregs();
}
}
void x86emu_just_disassemble (void)
{
/*
* This routine called if the flag DEBUG_DISASSEMBLE is set kind
* of a hack!
*/
dbg("%x:%x ", M.x86.saved_cs, M.x86.saved_ip);
print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
print_decoded_instruction();
}
#if 0
static void disassemble_forward (uint16_t seg, uint16_t off, int n)
{
X86EMU_sysEnv tregs;
int i;
u8 op1;
/*
* hack, hack, hack. What we do is use the exact machinery set up
* for execution, except that now there is an additional state
* flag associated with the "execution", and we are using a copy
* of the register struct. All the major opcodes, once fully
* decoded, have the following two steps: TRACE_REGS(r,m);
* SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
* the preprocessor. The TRACE_REGS macro expands to:
*
* if (debug&DEBUG_DISASSEMBLE)
* {just_disassemble(); goto EndOfInstruction;}
* if (debug&DEBUG_TRACE) trace_regs(r,m);
*
* ...... and at the last line of the routine.
*
* EndOfInstruction: end_instr();
*
* Up to the point where TRACE_REG is expanded, NO modifications
* are done to any register EXCEPT the IP register, for fetch and
* decoding purposes.
*
* This was done for an entirely different reason, but makes a
* nice way to get the system to help debug codes.
*/
tregs = M;
tregs.x86.R_IP = off;
tregs.x86.R_CS = seg;
/* reset the decoding buffers */
tregs.x86.enc_str_pos = 0;
tregs.x86.enc_pos = 0;
/* turn on the "disassemble only, no execute" flag */
tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
/* DUMP NEXT n instructions to screen in straight_line fashion */
/*
* This looks like the regular instruction fetch stream, except
* that when this occurs, each fetched opcode, upon seeing the
* DEBUG_DISASSEMBLE flag set, exits immediately after decoding
* the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
* Note the use of a copy of the register structure...
*/
for (i=0; i<n; i++) {
op1 = (*sys_rdb)(((uint32_t)M.x86.R_CS<<4) + (M.x86.R_IP++));
(x86emu_optab[op1])(op1);
}
/* end major hack mode. */
}
#endif
void x86emu_check_ip_access (void)
{
/* NULL as of now */
}
void x86emu_check_sp_access (void)
{
}
void x86emu_check_mem_access(uint32_t dummy)
{
/* check bounds, etc */
}
void x86emu_check_data_access (unsigned int dummy1, unsigned int dummy2)
{
/* check bounds, etc */
}
void x86emu_inc_decoded_inst_len (int x)
{
M.x86.enc_pos += x;
}
void x86emu_decode_printf (char *x)
{
#ifdef DBG_X86EMU
strcpy(x, &M.x86.decoded_buf[M.x86.enc_str_pos & 127]);
M.x86.enc_str_pos += strlen(x);
#endif
}
void x86emu_decode_printf2 (char *x, int y)
{
char temp[100], *p;
#ifdef DBG_X86EMU
{
p = temp;
while(x[0] != 0)
{
if(x[0]=='%' && x[1]=='d')
{
x+=2;
Funcs_ltoa(p, y, 10);
while(p[0] != 0)
p++;
}
else if(x[0]=='%' && x[1]=='x')
{
x+=2;
*p++ = '0';
*p++ = 'x';
y &= 0xffff;
Funcs_ltoa(p, y, 16);
while(p[0] != 0)
p++;
}
else
*p++ = *x++;
}
*p = 0;
strcpy(temp, &M.x86.decoded_buf[M.x86.enc_str_pos & 127]);
M.x86.enc_str_pos += strlen(temp);
}
#endif
}
void x86emu_end_instr (void)
{
M.x86.enc_str_pos = 0;
M.x86.enc_pos = 0;
}
static void print_encoded_bytes (uint16_t s, uint16_t o)
{
int i;
for (i = 0; i < M.x86.enc_pos; i++)
dbg("%x", fetch_data_byte_abs(s,o+i));
for ( ; i < 10; i++)
dbg(" ");
}
static void print_decoded_instruction (void)
{
dbg("%s", M.x86.decoded_buf);
}
void x86emu_print_int_vect (uint16_t iv)
{
uint16_t seg,off;
if (iv > 256) return;
seg = fetch_data_word_abs(0,iv*4);
off = fetch_data_word_abs(0,iv*4+2);
dbg("%x:%x", seg, off);
dbg(" ");
}
void X86EMU_dump_memory (uint16_t seg, uint16_t off, uint32_t amt)
{
uint32_t start = off & 0xfffffff0;
uint32_t end = (off+16) & 0xfffffff0;
uint32_t i;
uint32_t current;
current = start;
while (end <= off + amt) {
dbg("%x:%x: ", seg, start);
dbg(" ");
for (i = start; i < off; i++)
dbg(" ");
for ( ; i< end; i++)
dbg(" %x\r\n", fetch_data_byte_abs(seg,i));
start = end;
end = start + 16;
}
}
void x86emu_single_step (void)
{
#if 0
char s[1024];
int ps[10];
int ntok;
int cmd;
int done;
int segment;
int offset;
static int breakpoint;
static int noDecode = 1;
char *p;
if (DEBUG_BREAK()) {
if (M.x86.saved_ip != breakpoint) {
return;
} else {
M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
M.x86.debug |= DEBUG_TRACE_F;
M.x86.debug &= ~DEBUG_BREAK_F;
print_decoded_instruction ();
X86EMU_trace_regs();
}
}
done=0;
offset = M.x86.saved_ip;
while (!done) {
DPRINT("-");
p = fgets(s, 1023, stdin);
cmd = parse_line(s, ps, &ntok);
switch(cmd) {
case 'u':
disassemble_forward(M.x86.saved_cs,(uint16_t)offset,10);
break;
case 'd':
if (ntok == 2) {
segment = M.x86.saved_cs;
offset = ps[1];
X86EMU_dump_memory(segment,(uint16_t)offset,16);
offset += 16;
} else if (ntok == 3) {
segment = ps[1];
offset = ps[2];
X86EMU_dump_memory(segment,(uint16_t)offset,16);
offset += 16;
} else {
segment = M.x86.saved_cs;
X86EMU_dump_memory(segment,(uint16_t)offset,16);
offset += 16;
}
break;
case 'c':
M.x86.debug ^= DEBUG_TRACECALL_F;
break;
case 's':
M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
break;
case 'r':
X86EMU_trace_regs();
break;
case 'x':
X86EMU_trace_xregs();
break;
case 'g':
if (ntok == 2) {
breakpoint = ps[1];
if (noDecode) {
M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
} else {
M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
}
M.x86.debug &= ~DEBUG_TRACE_F;
M.x86.debug |= DEBUG_BREAK_F;
done = 1;
}
break;
case 'q':
M.x86.debug |= DEBUG_EXIT;
return;
case 'P':
noDecode = (noDecode)?0:1;
DPRINT("Toggled decoding to ");
DPRINT((noDecode)?"FALSE":"TRUE");
DPRINT("\r\n");
break;
case 't':
case 0:
done = 1;
break;
}
}
#endif
}
int X86EMU_trace_on(void)
{
return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
}
int X86EMU_trace_off(void)
{
return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
}
int X86EMU_set_debug(int debug)
{
return M.x86.debug = debug;
}
#if 0
static int parse_line (char *s, int *ps, int *n)
{
int cmd;
*n = 0;
while(*s == ' ' || *s == '\t') s++;
ps[*n] = *s;
switch (*s) {
case '\n':
*n += 1;
return 0;
default:
cmd = *s;
*n += 1;
}
while (1) {
while (*s != ' ' && *s != '\t' && *s != '\n') s++;
if (*s == '\n')
return cmd;
while(*s == ' ' || *s == '\t') s++;
sscanf(s,"%x",&ps[*n]);
*n += 1;
}
}
#endif
#endif /* DEBUG */
void x86emu_dump_regs (void)
{
dbg(" AX=%x", M.x86.R_AX );
dbg(" BX=%x", M.x86.R_BX );
dbg(" CX=%x", M.x86.R_CX );
dbg(" DX=%x", M.x86.R_DX );
dbg(" SP=%x", M.x86.R_SP );
dbg(" BP=%x", M.x86.R_BP );
dbg(" SI=%x", M.x86.R_SI );
dbg(" DI=%x", M.x86.R_DI );
dbg("\r\n");
dbg(" DS=%x", M.x86.R_DS );
dbg(" ES=%x", M.x86.R_ES );
dbg(" SS=%x", M.x86.R_SS );
dbg(" CS=%x", M.x86.R_CS );
dbg(" IP=%x", M.x86.R_IP );
dbg("\r\n ");
if (ACCESS_FLAG(F_OF)) dbg("OV "); /* CHECKED... */
else dbg("NV ");
if (ACCESS_FLAG(F_DF)) dbg("DN ");
else dbg("UP ");
if (ACCESS_FLAG(F_IF)) dbg("EI ");
else dbg("DI ");
if (ACCESS_FLAG(F_SF)) dbg("NG ");
else dbg("PL ");
if (ACCESS_FLAG(F_ZF)) dbg("ZR ");
else dbg("NZ ");
if (ACCESS_FLAG(F_AF)) dbg("AC ");
else dbg("NA ");
if (ACCESS_FLAG(F_PF)) dbg("PE ");
else dbg("PO ");
if (ACCESS_FLAG(F_CF)) dbg("CY ");
else dbg("NC ");
dbg("\r\n");
}
void x86emu_dump_xregs (void)
{
dbg(" EAX=%x", M.x86.R_EAX );
dbg(" EBX=%x", M.x86.R_EBX );
dbg(" ECX=%x", M.x86.R_ECX );
dbg(" EDX=%x", M.x86.R_EDX );
dbg("\r\n");
dbg(" ESP=%x", M.x86.R_ESP );
dbg(" EBP=%x", M.x86.R_EBP );
dbg(" ESI=%x", M.x86.R_ESI );
dbg(" EDI=%x", M.x86.R_EDI );
dbg("\r\n");
dbg(" DS=%x", M.x86.R_DS );
dbg(" ES=%x", M.x86.R_ES );
dbg(" SS=%x", M.x86.R_SS );
dbg(" CS=%x", M.x86.R_CS );
dbg(" EIP%x=", M.x86.R_EIP );
dbg("\r\n ");
if (ACCESS_FLAG(F_OF)) dbg("OV "); /* CHECKED... */
else dbg("NV ");
if (ACCESS_FLAG(F_DF)) dbg("DN ");
else dbg("UP ");
if (ACCESS_FLAG(F_IF)) dbg("EI ");
else dbg("DI ");
if (ACCESS_FLAG(F_SF)) dbg("NG ");
else dbg("PL ");
if (ACCESS_FLAG(F_ZF)) dbg("ZR ");
else dbg("NZ ");
if (ACCESS_FLAG(F_AF)) dbg("AC ");
else dbg("NA ");
if (ACCESS_FLAG(F_PF)) dbg("PE ");
else dbg("PO ");
if (ACCESS_FLAG(F_CF)) dbg("CY ");
else dbg("NC ");
dbg("\r\n");
}

1151
BaS_gcc/x86emu/decode.c Normal file
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File diff suppressed because it is too large Load Diff

5418
BaS_gcc/x86emu/ops.c Normal file
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File diff suppressed because it is too large Load Diff

1772
BaS_gcc/x86emu/ops2.c Normal file
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File diff suppressed because it is too large Load Diff

2452
BaS_gcc/x86emu/prim_ops.c Normal file
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File diff suppressed because it is too large Load Diff

620
BaS_gcc/x86emu/sys.c Normal file
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@@ -0,0 +1,620 @@
/****************************************************************************
*
* Realmode X86 Emulator Library
*
* Copyright (C) 1996-1999 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
*
* ========================================================================
*
* Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
* ========================================================================
*
* Language: ANSI C
* Environment: Any
* Developer: Kendall Bennett
*
* Description: This file includes subroutines which are related to
* programmed I/O and memory access. Included in this module
* are default functions with limited usefulness. For real
* uses these functions will most likely be overriden by the
* user library.
*
****************************************************************************/
/* $XFree86: xc/extras/x86emu/src/x86emu/sys.c,v 1.5 2000/08/23 22:10:01 tsi Exp $ */
#include "radeonfb.h"
#include "pci.h"
#include "x86emu.h"
#include "x86regs.h"
#include "x86debug.h"
#include "x86prim_ops.h"
#ifndef NULL
#define NULL ((void *)0)
#endif
extern uint8_t inb(uint16_t port);
extern uint16_t inw(uint16_t port);
extern uint32_t inl(uint16_t port);
extern void outb(uint8_t val, uint16_t port);
extern void outw(uint16_t val, uint16_t port);
extern void outl(uint32_t val, uint16_t port);
extern uint16_t swap_short(uint16_t val);
extern uint32_t swap_long(uint32_t val);
/*------------------------- Global Variables ------------------------------*/
X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
X86EMU_intrFuncs _X86EMU_intrTab[256];
extern struct radeonfb_info *rinfo_biosemu;
extern uint32_t offset_mem;
/*----------------------------- Implementation ----------------------------*/
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
RETURNS:
Byte value read from emulator memory.
REMARKS:
Reads a byte value from the emulator memory.
****************************************************************************/
uint8_t X86API rdb(uint32_t addr)
{
uint8_t val;
if((addr >= 0xA0000) && (addr <= 0xBFFFF))
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("rdb(", addr);
#endif
val = *(uint8_t *)(offset_mem+addr);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(") = ", val);
DPRINT("\r\n");
#endif
}
else
{
#if 0
if(addr >= M.mem_size)
{
DB( { DPRINTVALHEX("mem_ptr: address ", addr);
DPRINT(" out of range!\r\n"); } )
HALT_SYS();
}
#endif
#if 0
if(addr < 0x200)
{
DPRINTVALHEXWORD("", M.x86.R_CS);
DPRINTVALHEXWORD(":", M.x86.R_IP);
DPRINTVALHEX(" updating int vector ", addr >> 2);
DPRINT("\r\n");
}
#endif
val = *(uint8_t *)(M.mem_base + addr);
}
DB(if (DEBUG_MEM_TRACE())
{
DPRINTVALHEXLONG("", addr);
DPRINTVALHEXBYTE(" 1 -> ", val);
DPRINT("\r\n");
} )
return val;
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
RETURNS:
Word value read from emulator memory.
REMARKS:
Reads a word value from the emulator memory.
****************************************************************************/
uint16_t X86API rdw(uint32_t addr)
{
uint16_t val;
if((addr >= 0xA0000) && (addr <= 0xBFFFF))
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("rdw(", addr);
#endif
val = swpw(*(uint16_t *)(offset_mem+addr));
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(") = ", val);
DPRINT("\r\n");
#endif
}
else
{
#if 0
if(addr > M.mem_size - 2)
{
DB( { DPRINTVALHEX("mem_ptr: address ", addr);
DPRINT(" out of range!\r\n"); } )
HALT_SYS();
}
#endif
#if 0
if(addr < 0x200)
{
DPRINTVALHEXWORD("", M.x86.R_CS);
DPRINTVALHEXWORD(":", M.x86.R_IP);
DPRINTVALHEX(" updating int vector ", addr >> 2);
DPRINT("\r\n");
}
#endif
val = (uint16_t)(*(uint8_t *)(M.mem_base + addr));
val |= (((uint16_t)( *(uint8_t *)(M.mem_base + addr + 1))) << 8);
// val = *(uint16_t *)(M.mem_base + addr);
}
DB(if (DEBUG_MEM_TRACE())
{
DPRINTVALHEXLONG("", addr);
DPRINTVALHEXWORD(" 2 -> ", val);
DPRINT("\r\n");
} )
return val;
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
RETURNS:
Long value read from emulator memory.
REMARKS:
Reads a long value from the emulator memory.
****************************************************************************/
uint32_t X86API rdl(uint32_t addr)
{
uint32_t val;
if((addr >= 0xA0000) && (addr <= 0xBFFFF))
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("rdl(", addr);
#endif
val = swap_long(*(uint32_t *)(offset_mem+addr));
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(") = ", val);
DPRINT("\r\n");
#endif
}
else
{
#if 0
if(addr > M.mem_size - 4)
{
DB( { DPRINTVALHEX("mem_ptr: address ", addr);
DPRINT(" out of range!\r\n"); } )
HALT_SYS();
}
#endif
#if 0
if(addr < 0x200)
{
DPRINTVALHEXWORD("", M.x86.R_CS);
DPRINTVALHEXWORD(":", M.x86.R_IP);
DPRINTVALHEX(" updating int vector ", addr >> 2);
DPRINT("\r\n");
}
#endif
val = swap_long(*(uint32_t *)(M.mem_base + addr));
// val = *(uint32_t *)(M.mem_base + addr);
}
DB(if (DEBUG_MEM_TRACE())
{
DPRINTVALHEXLONG("", addr);
DPRINTVALHEXLONG(" 4 -> ", val);
DPRINT("\r\n");
} )
return val;
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
val - Value to store
REMARKS:
Writes a byte value to emulator memory.
****************************************************************************/
void X86API wrb(uint32_t addr, uint8_t val)
{
if((addr >= 0xA0000) && (addr <= 0xBFFFF))
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("wrb(", addr);
DPRINTVALHEX(") = ", val);
DPRINT("\r\n");
#endif
*(uint8_t *)(offset_mem+addr) = val;
}
else
{
if(addr >= M.mem_size)
{
DB( { DPRINTVALHEX("mem_ptr: address ", addr);
DPRINT(" out of range!\r\n"); } )
HALT_SYS();
}
#if 0
if(addr < 0x200)
{
DPRINTVALHEXWORD("", M.x86.R_CS);
DPRINTVALHEXWORD(":", M.x86.R_IP);
DPRINTVALHEX(" updating int vector ", addr >> 2);
DPRINT("\r\n");
}
#endif
*(uint8_t *)(M.mem_base + addr) = val;
}
DB(if (DEBUG_MEM_TRACE())
{
DPRINTVALHEXLONG("", addr);
DPRINTVALHEXBYTE(" 1 <- ", val);
DPRINT("\r\n");
} )
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
val - Value to store
REMARKS:
Writes a word value to emulator memory.
****************************************************************************/
void X86API wrw(uint32_t addr, uint16_t val)
{
if((addr >= 0xA0000) && (addr <= 0xBFFFF))
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("wrw(", addr);
DPRINTVALHEX(") = ", val);
DPRINT("\r\n");
#endif
#ifdef DIRECT_ACCESS
*(uint16_t *)(offset_mem+addr) = swap_short(val);
#else
#ifdef PCI_XBIOS
write_mem_word(rinfo_biosemu->handle, offset_mem+addr, val);
#else
Write_mem_word(rinfo_biosemu->handle, offset_mem+addr, val);
#endif
#endif
}
else
{
if(addr > M.mem_size - 2)
{
DB( { DPRINTVALHEX("mem_ptr: address ", addr);
DPRINT(" out of range!\r\n"); } )
HALT_SYS();
}
#if 0
if(addr < 0x200)
{
DPRINTVALHEXWORD("", M.x86.R_CS);
DPRINTVALHEXWORD(":", M.x86.R_IP);
DPRINTVALHEX(" updating int vector ", addr >> 2);
DPRINT("\r\n");
}
#endif
*(uint8_t *)(M.mem_base + addr) = (uint8_t)val;
*(uint8_t *)(M.mem_base + addr + 1) = (uint8_t)(val >> 8);
// *(uint16_t *)(M.mem_base + addr) = val;
}
DB(if (DEBUG_MEM_TRACE())
{
DPRINTVALHEXLONG("", addr);
DPRINTVALHEXWORD(" 2 <- ", val);
DPRINT("\r\n");
} )
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
val - Value to store
REMARKS:
Writes a long value to emulator memory.
****************************************************************************/
void X86API wrl(uint32_t addr, uint32_t val)
{
if((addr >= 0xA0000) && (addr <= 0xBFFFF))
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("wrl(", addr);
DPRINTVALHEX(") = ", val);
DPRINT("\r\n");
#endif
#ifdef DIRECT_ACCESS
*(uint32_t *)(offset_mem+addr) = swap_long(val);
#else
#ifdef PCI_XBIOS
write_mem_longword(rinfo_biosemu->handle, offset_mem+addr, val);
#else
Write_mem_longword(rinfo_biosemu->handle, offset_mem+addr, val);
#endif
#endif
}
else
{
if(addr > M.mem_size - 4)
{
DB( { DPRINTVALHEX("mem_ptr: address ", addr);
DPRINT(" out of range!\r\n"); } )
HALT_SYS();
}
#if 0
if(addr < 0x200)
{
DPRINTVALHEXWORD("", M.x86.R_CS);
DPRINTVALHEXWORD(":", M.x86.R_IP);
DPRINTVALHEX(" updating int vector ", addr >> 2);
DPRINT("\r\n");
}
#endif
*(uint32_t *)(M.mem_base + addr) = swap_long(val);
// *(uint32_t *)(M.mem_base + addr) = val;
}
DB(if (DEBUG_MEM_TRACE())
{
DPRINTVALHEXLONG("", addr);
DPRINTVALHEXLONG(" 4 <- ", val);
DPRINT("\r\n");
} )
}
/****************************************************************************
PARAMETERS:
addr - PIO address to read
RETURN:
0
REMARKS:
Default PIO byte read function. Doesn't perform real inb.
****************************************************************************/
static uint8_t X86API p_inb(X86EMU_pioAddr addr)
{
DB(if (DEBUG_IO_TRACE())
{
DPRINTVALHEXWORD("inb ", addr);
DPRINT(" \r\n");
} )
return inb(addr);
}
/****************************************************************************
PARAMETERS:
addr - PIO address to read
RETURN:
0
REMARKS:
Default PIO word read function. Doesn't perform real inw.
****************************************************************************/
static uint16_t X86API p_inw(X86EMU_pioAddr addr)
{
DB(if (DEBUG_IO_TRACE())
{
DPRINTVALHEXWORD("inw ", addr);
DPRINT(" \r\n");
} )
return inw(addr);
}
/****************************************************************************
PARAMETERS:
addr - PIO address to read
RETURN:
0
REMARKS:
Default PIO long read function. Doesn't perform real inl.
****************************************************************************/
static uint32_t X86API p_inl(X86EMU_pioAddr addr)
{
DB(if (DEBUG_IO_TRACE())
{
DPRINTVALHEXWORD("inl ", addr);
DPRINT(" \r\n");
} )
return inl(addr);
}
/****************************************************************************
PARAMETERS:
addr - PIO address to write
val - Value to store
REMARKS:
Default PIO byte write function. Doesn't perform real outb.
****************************************************************************/
static void X86API p_outb(X86EMU_pioAddr addr, uint8_t val)
{
DB(if (DEBUG_IO_TRACE())
{
DPRINTVALHEXBYTE("outb ", val);
DPRINTVALHEXWORD(" -> ", addr);
DPRINT(" \r\n");
} )
outb(val, addr);
return;
}
/****************************************************************************
PARAMETERS:
addr - PIO address to write
val - Value to store
REMARKS:
Default PIO word write function. Doesn't perform real outw.
****************************************************************************/
static void X86API p_outw(X86EMU_pioAddr addr, uint16_t val)
{
DB(if (DEBUG_IO_TRACE())
{
DPRINTVALHEXWORD("outw ", (unsigned long)val);
DPRINTVALHEXWORD(" -> ", addr);
DPRINT(" \r\n");
} )
outw(val, addr);
return;
}
/****************************************************************************
PARAMETERS:
addr - PIO address to write
val - Value to store
REMARKS:
Default PIO ;ong write function. Doesn't perform real outl.
****************************************************************************/
static void X86API p_outl(X86EMU_pioAddr addr, uint32_t val)
{
DB(if (DEBUG_IO_TRACE())
{
DPRINTVALHEXLONG("outl ", val);
DPRINTVALHEXWORD(" -> ", addr);
DPRINT(" \r\n");
} )
outl(val, addr);
return;
}
/*------------------------- Global Variables ------------------------------*/
uint8_t(X86APIP sys_rdb) (uint32_t addr) = rdb;
uint16_t(X86APIP sys_rdw) (uint32_t addr) = rdw;
uint32_t(X86APIP sys_rdl) (uint32_t addr) = rdl;
void (X86APIP sys_wrb) (uint32_t addr, uint8_t val) = wrb;
void (X86APIP sys_wrw) (uint32_t addr, uint16_t val) = wrw;
void (X86APIP sys_wrl) (uint32_t addr, uint32_t val) = wrl;
uint8_t(X86APIP sys_inb) (X86EMU_pioAddr addr) = p_inb;
uint16_t(X86APIP sys_inw) (X86EMU_pioAddr addr) = p_inw;
uint32_t(X86APIP sys_inl) (X86EMU_pioAddr addr) = p_inl;
void (X86APIP sys_outb) (X86EMU_pioAddr addr, uint8_t val) = p_outb;
void (X86APIP sys_outw) (X86EMU_pioAddr addr, uint16_t val) = p_outw;
void (X86APIP sys_outl) (X86EMU_pioAddr addr, uint32_t val) = p_outl;
/*----------------------------- Setup -------------------------------------*/
#if 0 // cannot works whith data in flash
/****************************************************************************
PARAMETERS:
funcs - New memory function pointers to make active
REMARKS:
This function is used to set the pointers to functions which access
memory space, allowing the user application to override these functions
and hook them out as necessary for their application.
****************************************************************************/
void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs)
{
sys_rdb = funcs->rdb;
sys_rdw = funcs->rdw;
sys_rdl = funcs->rdl;
sys_wrb = funcs->wrb;
sys_wrw = funcs->wrw;
sys_wrl = funcs->wrl;
}
/****************************************************************************
PARAMETERS:
funcs - New programmed I/O function pointers to make active
REMARKS:
This function is used to set the pointers to functions which access
I/O space, allowing the user application to override these functions
and hook them out as necessary for their application.
****************************************************************************/
void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs)
{
sys_inb = funcs->inb;
sys_inw = funcs->inw;
sys_inl = funcs->inl;
sys_outb = funcs->outb;
sys_outw = funcs->outw;
sys_outl = funcs->outl;
}
#endif
/****************************************************************************
PARAMETERS:
funcs - New interrupt vector table to make active
REMARKS:
This function is used to set the pointers to functions which handle
interrupt processing in the emulator, allowing the user application to
hook interrupts as necessary for their application. Any interrupts that
are not hooked by the user application, and reflected and handled internally
in the emulator via the interrupt vector table. This allows the application
to get control when the code being emulated executes specific software
interrupts.
****************************************************************************/
void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[])
{
int i;
for (i = 0; i < 256; i++)
_X86EMU_intrTab[i] = NULL;
if (funcs) {
for (i = 0; i < 256; i++)
_X86EMU_intrTab[i] = funcs[i];
}
}
/****************************************************************************
PARAMETERS:
int - New software interrupt to prepare for
REMARKS:
This function is used to set up the emulator state to exceute a software
interrupt. This can be used by the user application code to allow an
interrupt to be hooked, examined and then reflected back to the emulator
so that the code in the emulator will continue processing the software
interrupt as per normal. This essentially allows system code to actively
hook and handle certain software interrupts as necessary.
****************************************************************************/
void X86EMU_prepareForInt(int num)
{
push_word((uint16_t) M.x86.R_FLG);
CLEAR_FLAG(F_IF);
CLEAR_FLAG(F_TF);
push_word(M.x86.R_CS);
M.x86.R_CS = mem_access_word(num * 4 + 2);
push_word(M.x86.R_IP);
M.x86.R_IP = mem_access_word(num * 4);
M.x86.intr = 0;
}
void X86EMU_setMemBase(void *base, unsigned long size)
{
M.mem_base = (int) base;
M.mem_size = size;
}

243
BaS_gcc/x86emu/x86pcibios.c Normal file
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@@ -0,0 +1,243 @@
#include "radeonfb.h"
#include "pci.h"
#include "x86emu.h"
#include "x86pcibios.h"
extern unsigned short offset_port;
int x86_pcibios_emulator()
{
int ret = 0;
unsigned long dev;
switch (X86_AX) {
case PCI_BIOS_PRESENT:
#ifdef DEBUG_X86EMU_PCI
DPRINT("PCI_BIOS_PRESENT\r\n");
#endif
X86_AH = 0x00; /* no config space/special cycle support */
X86_AL = 0x01; /* config mechanism 1 */
X86_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24;
X86_EBX = 0x0210; /* Version 2.10 */
X86_ECX = 0xFF00; /* FixME: Max bus number */
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case FIND_PCI_DEVICE:
/* FixME: support SI != 0 */
// vendor, device
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("FIND_PCI_DEVICE vendor ", X86_DX);
DPRINTVALHEX(" device ", X86_CX);
#endif
dev = pci_find_device((unsigned long) X86_DX, ((unsigned long)X86_CX), 0);
if (dev != 0) {
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_BH = PCI_BUS_FROM_HANDLE(dev);
//X86_BH = (char)(dev >> 16) / PCI_MAX_FUNCTION); // dev->bus->secondary;
X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
//X86_BL = (char)dev; // dev->path.u.pci.devfn;
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
} else {
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... error\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case FIND_PCI_CLASS_CODE:
/* FixME: support SI != 0 */
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX("FIND_PCI_CLASS_CODE ", X86_ECX);
#endif
dev = pci_find_classcode(X86_ECX, 0);
if (dev != 0) {
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_BH = PCI_BUS_FROM_HANDLE(dev);
X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
} else {
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... error\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case READ_CONFIG_BYTE:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_BYTE bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
#endif
X86_CL = pci_read_config_byte(dev, X86_DI);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(" value ", X86_CL);
DPRINT("\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case READ_CONFIG_WORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_WORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
#endif
if(X86_DI == PCIBAR1)
X86_CX = offset_port + 1;
else
X86_CX = pci_read_config_word(dev, X86_DI);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(" value ", X86_CX);
DPRINT("\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case READ_CONFIG_DWORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_DWORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
#endif
if(X86_DI == PCIBAR1)
X86_CX = (unsigned long)offset_port+1;
else
X86_ECX = pci_read_config_longword(dev, X86_DI);
#ifdef DEBUG_X86EMU_PCI
DPRINTVALHEX(" value ", X86_ECX);
DPRINT("\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case WRITE_CONFIG_BYTE:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("READ_CONFIG_BYTE bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
DPRINTVALHEX(" value ", X86_CL);
#endif
if ((ret = pci_write_config_byte(dev, X86_DI, X86_CL)) == 0)
{
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
} else {
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL(" ... error ", ret);
DPRINT("\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case WRITE_CONFIG_WORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("WRITE_CONFIG_WORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
DPRINTVALHEX(" value ", X86_CX);
#endif
if(X86_DI == PCIBAR1) {
offset_port = X86_CX;
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
}
if ((ret = pci_write_config_word(dev, X86_DI, X86_CX)) == 0)
{
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
} else {
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL(" ... error ", ret);
DPRINT("\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case WRITE_CONFIG_DWORD:
// bus, devfn
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL("WRITE_CONFIG_DWORD bus ", X86_BH);
DPRINTVAL(" devfn ", X86_BL);
DPRINTVALHEX(" reg ", X86_DI);
DPRINTVALHEX(" value ", X86_ECX);
#endif
if(X86_DI == PCIBAR1) {
offset_port = (unsigned short)X86_ECX & 0xFFFC;
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
}
if ((ret = pci_write_config_longword(dev, X86_DI, X86_ECX)) == 0)
{
#ifdef DEBUG_X86EMU_PCI
DPRINT(" ... OK\r\n");
#endif
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
ret = 1;
}
else
{
#ifdef DEBUG_X86EMU_PCI
DPRINTVAL(" ... error ", ret);
DPRINT("\r\n");
#endif
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
ret = 0;
}
break;
default:
#ifdef DEBUG_X86EMU_PCI
DPRINT("PCI_BIOS FUNC_NOT_SUPPORTED\r\n");
#endif
X86_AH = FUNC_NOT_SUPPORTED;
X86_EFLAGS |= FB_CF;
break;
}
return ret;
}