added scripts for flashing various parts of the firmware with bdmctrl

Fixed hang in DVI initialization (wait...() routines not inlined as supposed to)

BaS_gcc/bas.lk.in

@@ -14,6 +14,7 @@ SECTIONS
 		objs/init_fpga.o(.text)
 		objs/sd_card.o(.text)
 		objs/ff.o(.text)
+		objs/wait.o(.text)
 		objs/mmcbb.o(.text)
 		
 #if (FORMAT == elf32-m68k)
@@ -31,7 +32,6 @@ SECTIONS
 		AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
 	{
 		objs/BaS.o(.text)
-		objs/wait.o(.text)
 		/* put other routines into the same segment (RAM) as BaS.o */ 
 		objs/sd_card_asm.o(.text)
 		objs/bas_printf.o(.text)

BaS_gcc/flash_etos.bdm

@@ -0,0 +1,22 @@
+#!/usr/local/bin/bdmctrl -D2
+#
+# firebee board initialization for bdmctrl 
+#
+open $1
+reset
+
+# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
+write 0xFF000500 0xE0000000 4
+write 0xFF000508 0x00001180 4
+write 0xFF000504 0x007F0001 4
+
+# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
+flash 0xe0000000
+
+# flash-plugin (target-based flashing) does not work yet 
+# flash-plugin 0x10000000 0x4000 flash29.plugin
+
+# contrary to documentation, it seems we need to erase-wait after each sector
+erase 0xe0000000 -1
+erase-wait 0xe0000000
+load -v emutosfb.elf

BaS_gcc/flash_firetos.bdm

@@ -0,0 +1,22 @@
+#!/usr/local/bin/bdmctrl -D2
+#
+# firebee board initialization for bdmctrl 
+#
+open $1
+reset
+
+# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
+write 0xFF000500 0xE0000000 4
+write 0xFF000508 0x00001180 4
+write 0xFF000504 0x007F0001 4
+
+# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
+flash 0xe0000000
+
+# flash-plugin (target-based flashing) does not work yet 
+# flash-plugin 0x10000000 0x4000 flash29.plugin
+
+# contrary to documentation, it seems we need to erase-wait after each sector
+#erase 0xe0000000 -1
+#erase-wait 0xe0000000
+load -v firetos.elf

BaS_gcc/flash_fpga.bdm

@@ -0,0 +1,22 @@
+#!/usr/local/bin/bdmctrl -D2
+#
+# firebee board initialization for bdmctrl 
+#
+open $1
+reset
+
+# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
+write 0xFF000500 0xE0000000 4
+write 0xFF000508 0x00001180 4
+write 0xFF000504 0x007F0001 4
+
+# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
+flash 0xe0000000
+
+# flash-plugin (target-based flashing) does not work yet 
+# flash-plugin 0x10000000 0x4000 flash29.plugin
+
+# contrary to documentation, it seems we need to erase-wait after each sector
+#erase 0xe0000000 -1
+#erase-wait 0xe0000000
+load -v FPGA.elf

BaS_gcc/mcf5474.bdm

@@ -4,7 +4,7 @@
 #
 open $1
 reset
-sleep 10000
+sleep 10
 
 wait
 
@@ -73,12 +73,12 @@ flash 0xE0000000
 #flash-plugin 0x10000000 0x4000 flash29.plugin
 
 # contrary to documentation, it seems we need to erase-wait after each sector
-erase 0xE0000000 0
+#erase 0xE0000000 0
-erase-wait 0xE0000000
+#erase-wait 0xE0000000
-erase 0xE0000000 0x1000
+#erase 0xE0000000 0x1000
-erase-wait 0xE0000000
+#erase-wait 0xE0000000
-erase 0xE0000000 0x2000
+#erase 0xE0000000 0x2000
-erase-wait 0xE0000000
+#erase-wait 0xE0000000
 erase 0xE0000000 0x3000
 erase-wait 0xE0000000
 

BaS_gcc/sources/mmcbb.c

@@ -115,7 +115,7 @@ static uint8_t xchg_spi(uint8_t byte)
 {
 	* (volatile uint8_t *) (&MCF_DSPI_DTFR + 3) = byte;
 
-	while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF));	/* wait until DSPI transfer complete */
+	//while (! (MCF_DSPI_DSR & MCF_DSPI_DSR_TCF));	/* wait until DSPI transfer complete */
 	MCF_DSPI_DSR = 0xffffffff;						/* clear DSPI status register */
 
 	return * (volatile uint8_t *) (&MCF_DSPI_DRFR + 3);