removed debug printout

incorporated EmuTOS byte swap routines for PCI access
This commit is contained in:
Markus Fröschle
2013-10-27 06:24:16 +00:00
parent 6b4431ed84
commit 681343829c
4 changed files with 81 additions and 6 deletions

View File

@@ -85,9 +85,11 @@ void init_fpga(void)
uint8_t *fpga_data; uint8_t *fpga_data;
int i; int i;
/*
xprintf("MCF_FBCS0_CSAR: %08x\r\n", MCF_FBCS0_CSAR); xprintf("MCF_FBCS0_CSAR: %08x\r\n", MCF_FBCS0_CSAR);
xprintf("MCF_FBCS0_CSCR: %08x\r\n", MCF_FBCS0_CSCR); xprintf("MCF_FBCS0_CSCR: %08x\r\n", MCF_FBCS0_CSCR);
xprintf("MCF_FBCS0_CSMR: %08x\r\n", MCF_FBCS0_CSMR); xprintf("MCF_FBCS0_CSMR: %08x\r\n", MCF_FBCS0_CSMR);
*/
xprintf("FPGA load config... "); xprintf("FPGA load config... ");

View File

@@ -39,7 +39,7 @@
MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \ MCF_DSPI_DCTAR_PCSSCK(0b01) | /* 3 clock DSPICS to DSPISCK delay prescaler */ \
MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \ MCF_DSPI_DCTAR_PASC_3CLK | /* 3 clock DSPISCK to DSPICS negation prescaler */ \
MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \ MCF_DSPI_DCTAR_PDT_3CLK | /* 3 clock delay between DSPICS assertions prescaler */ \
/*MCF_DSPI_DCTAR_PBR_1CLK | */ /* 3 clock baudrate prescaler */ \ MCF_DSPI_DCTAR_PBR_1CLK | /* 3 clock baudrate prescaler */ \
MCF_DSPI_DCTAR_CSSCK(1) | /* delay scaler * 4 */\ MCF_DSPI_DCTAR_CSSCK(1) | /* delay scaler * 4 */\
MCF_DSPI_DCTAR_ASC(0b0001) | /* 2 */ \ MCF_DSPI_DCTAR_ASC(0b0001) | /* 2 */ \
MCF_DSPI_DCTAR_DT(0b0010) | /* 2 */ \ MCF_DSPI_DCTAR_DT(0b0010) | /* 2 */ \
@@ -459,11 +459,13 @@ DSTATUS disk_initialize(uint8_t drv)
CardType = card_type; /* Card type */ CardType = card_type; /* Card type */
res = disk_ioctl(0, MMC_GET_CSD, buff); res = disk_ioctl(0, MMC_GET_CSD, buff);
/*
if (res == RES_OK) if (res == RES_OK)
{ {
xprintf("CSD of card:\r\n"); xprintf("CSD of card:\r\n");
hexdump(buff, 16); hexdump(buff, 16);
} }
*/
deselect(); deselect();
if (card_type) if (card_type)
@@ -474,11 +476,13 @@ DSTATUS disk_initialize(uint8_t drv)
Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */ Stat &= ~STA_NOINIT; /* Clear STA_NOINIT flag */
xprintf("card type: %d\r\n", card_type); xprintf("card type: %d\r\n", card_type);
res = disk_ioctl(0, MMC_GET_CSD, buff); res = disk_ioctl(0, MMC_GET_CSD, buff);
/*
if (res == RES_OK) if (res == RES_OK)
{ {
xprintf("CSD of card now:\r\n"); xprintf("CSD of card now:\r\n");
hexdump(buff, 16); hexdump(buff, 16);
} }
*/
deselect(); deselect();
} }

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@@ -30,15 +30,82 @@
#include "bas_printf.h" #include "bas_printf.h"
#include "util.h" #include "util.h"
uint32_t pci_read_config_longword(uint16_t slot, uint16_t function, uint16_t offset) uint16_t pci_read_config_word(uint16_t slot, uint16_t function, uint16_t offset)
{ {
return 0; uint16_t value;
/* initiate PCI configuration access to device */
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
MCF_PCI_PCICAR_DEVNUM(slot + 10) | /* device number, devices 0 - 9 are reserved */
MCF_PCI_PCICAR_FUNCNUM(function) | /* function number */
MCF_PCI_PCICAR_DWORD(offset);
value = * (volatile uint16_t *) PCI_IO_OFFSET; /* access device */
/* finish config cycle */
MCF_PCI_PCICAR = MCF_PCI_PCICAR_DEVNUM(slot + 10) |
MCF_PCI_PCICAR_FUNCNUM(function) |
MCF_PCI_PCICAR_DWORD(0);
swpw(value);
return value;
} }
uint16_t pci_read_config_word(uint16_t slot, uint16_t function, uint16_t offset) uint32_t pci_read_config_longword(uint16_t bus, uint16_t slot, uint16_t function, uint16_t offset)
{ {
return 0; uint32_t value;
/* initiate PCI configuration access to device */
MCF_PCI_PCICAR = MCF_PCI_PCICAR_E | /* enable configuration access special cycle */
MCF_PCI_PCICAR_DEVNUM(slot + 10) | /* device number, devices 0 - 9 are reserved */
MCF_PCI_PCICAR_FUNCNUM(function) | /* function number */
MCF_PCI_PCICAR_DWORD(offset);
value = * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */
/* finish config cycle */
MCF_PCI_PCICAR = MCF_PCI_PCICAR_DEVNUM(slot + 10) |
MCF_PCI_PCICAR_FUNCNUM(function) |
MCF_PCI_PCICAR_DWORD(0);
swpl(value);
return value;
}
void pci_scan(void)
{
uint16_t bus;
uint16_t slot;
uint16_t function;
xprintf("PCI bus scan\r\n");
for (bus = 0; bus < 1; bus++)
{
for (slot = 0; slot < 16; slot++)
{
for (function = 0; function < 8; function++)
{
uint32_t value;
value = pci_read_config_longword(bus, slot, function, 0);
if (value != 0xffffffff)
{
xprintf("[%02x] [%02x] [%02x]: %08x\r\n", bus, slot, function, value);
}
/* test for multi-function device to avoid ghost device detects */
value = pci_read_config_longword(bus, slot, function, 0x0c);
if (!(((value & 0xff00) >> 16) & 0x80)) /* no multi function device */
function = 8;
}
}
}
xprintf("finished\r\n");
} }
/* start of PCI initialization code */ /* start of PCI initialization code */
@@ -106,5 +173,7 @@ void init_pci(void)
MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR; MCF_PCI_PCIGSCR &= ~MCF_PCI_PCIGSCR_PR;
xprintf("finished\r\n"); xprintf("finished\r\n");
pci_scan();
} }

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@@ -945,9 +945,9 @@ void initialize_hardware(void) {
init_slt(); init_slt();
init_fbcs(); init_fbcs();
init_ddram(); init_ddram();
init_pci();
init_eport(); init_eport();
init_xlbus_arbiter(); init_xlbus_arbiter();
init_pci();
init_fpga(); init_fpga();
init_pll(); init_pll();
init_video_ddr(); init_video_ddr();