merged fixes from 0.8.6.1 (errornous skip of FPGA load)
This commit is contained in:
Markus Fröschle
382
bas.lk.in
382
bas.lk.in
@@ -10,254 +10,256 @@
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/* make bas_rom access flags rx if compiling to RAM */
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#ifdef COMPILE_RAM
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#define ROMFLAGS WX
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#define ROMFLAGS WX
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#else
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#define ROMFLAGS RX
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#define ROMFLAGS RX
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#endif /* COMPILE_RAM */
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MEMORY
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{
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bas_rom (ROMFLAGS) : ORIGIN = TARGET_ADDRESS, LENGTH = 0x00100000
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/*
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* target to copy BaS data segment to. 1M should be enough for now
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*/
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* target to copy BaS data segment to. 1M should be enough for now
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*/
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bas_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00200000, LENGTH = 0x00100000
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/*
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* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
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*/
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* driver_ram is an uncached, reserved memory area for drivers (e.g. USB) that need this type of memory
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*/
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driver_ram (WX) : ORIGIN = SDRAM_START + SDRAM_SIZE - 0x00100000, LENGTH = 0x00100000
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}
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SECTIONS
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{
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/* BaS in ROM */
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.text :
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{
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OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
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/* BaS in ROM */
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.text :
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{
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OBJDIR/startcf.o(.text) /* this one is the entry point so it must be the first */
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OBJDIR/sysinit.o(.text)
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OBJDIR/fault_vectors.o(.text)
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OBJDIR/sysinit.o(.text)
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OBJDIR/fault_vectors.o(.text)
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#ifdef MACHINE_FIREBEE
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OBJDIR/init_fpga.o(.text)
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OBJDIR/init_fpga.o(.text)
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#endif /* MACHINE_FIREBEE */
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OBJDIR/wait.o(.text)
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OBJDIR/exceptions.o(.text)
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OBJDIR/driver_vec.o(.text)
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OBJDIR/interrupts.o(.text)
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OBJDIR/mmu.o(.text)
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OBJDIR/wait.o(.text)
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OBJDIR/exceptions.o(.text)
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OBJDIR/driver_vec.o(.text)
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OBJDIR/interrupts.o(.text)
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OBJDIR/mmu.o(.text)
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OBJDIR/BaS.o(.text)
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OBJDIR/pci.o(.text)
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OBJDIR/pci_wrappers.o(.text)
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OBJDIR/usb.o(.text)
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OBJDIR/driver_mem.o(.text)
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OBJDIR/usb_hub.o(.text)
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OBJDIR/usb_mouse.o(.text)
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OBJDIR/usb_kbd.o(.text)
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OBJDIR/ohci-hcd.o(.text)
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OBJDIR/ehci-hcd.o(.text)
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OBJDIR/wait.o(.text)
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OBJDIR/BaS.o(.text)
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OBJDIR/pci.o(.text)
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OBJDIR/pci_wrappers.o(.text)
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OBJDIR/usb.o(.text)
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OBJDIR/driver_mem.o(.text)
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OBJDIR/usb_hub.o(.text)
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OBJDIR/usb_mouse.o(.text)
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OBJDIR/usb_kbd.o(.text)
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OBJDIR/ohci-hcd.o(.text)
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OBJDIR/ehci-hcd.o(.text)
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OBJDIR/wait.o(.text)
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OBJDIR/nbuf.o(.text)
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OBJDIR/net_timer.o(.text)
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OBJDIR/queue.o(.text)
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OBJDIR/nif.o(.text)
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OBJDIR/fecbd.o(.text)
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OBJDIR/fec.o(.text)
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OBJDIR/am79c874.o(.text)
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OBJDIR/bcm5222.o(.text)
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OBJDIR/ip.o(.text)
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OBJDIR/udp.o(text)
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OBJDIR/bootp.o(text)
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OBJDIR/tftp.o(text)
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OBJDIR/arp.o(text)
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OBJDIR/nbuf.o(.text)
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OBJDIR/net_timer.o(.text)
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OBJDIR/queue.o(.text)
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OBJDIR/nif.o(.text)
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OBJDIR/fecbd.o(.text)
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OBJDIR/fec.o(.text)
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OBJDIR/am79c874.o(.text)
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OBJDIR/bcm5222.o(.text)
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OBJDIR/ip.o(.text)
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OBJDIR/udp.o(text)
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OBJDIR/bootp.o(text)
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OBJDIR/tftp.o(text)
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OBJDIR/arp.o(text)
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OBJDIR/unicode.o(.text)
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OBJDIR/mmc.o(.text)
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OBJDIR/ff.o(.text)
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OBJDIR/sd_card.o(.text)
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OBJDIR/s19reader.o(.text)
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OBJDIR/bas_printf.o(.text)
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OBJDIR/bas_string.o(.text)
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OBJDIR/printf_helper.o(.text)
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OBJDIR/cache.o(.text)
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OBJDIR/dma.o(.text)
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OBJDIR/MCD_dmaApi.o(.text)
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OBJDIR/MCD_tasks.o(.text)
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OBJDIR/MCD_tasksInit.o(.text)
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OBJDIR/unicode.o(.text)
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OBJDIR/mmc.o(.text)
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OBJDIR/ff.o(.text)
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OBJDIR/sd_card.o(.text)
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OBJDIR/s19reader.o(.text)
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OBJDIR/bas_printf.o(.text)
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OBJDIR/bas_string.o(.text)
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OBJDIR/printf_helper.o(.text)
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OBJDIR/cache.o(.text)
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OBJDIR/dma.o(.text)
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OBJDIR/MCD_dmaApi.o(.text)
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OBJDIR/MCD_tasks.o(.text)
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OBJDIR/MCD_tasksInit.o(.text)
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OBJDIR/video.o(.text)
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OBJDIR/videl.o(.text)
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OBJDIR/fbmem.o(.text)
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OBJDIR/fbmon.o(.text)
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OBJDIR/fbmodedb.o(.text)
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OBJDIR/offscreen.o(.text)
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OBJDIR/video.o(.text)
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OBJDIR/videl.o(.text)
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OBJDIR/fbmem.o(.text)
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OBJDIR/fbmon.o(.text)
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OBJDIR/fbmodedb.o(.text)
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OBJDIR/offscreen.o(.text)
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OBJDIR/x86decode.o(.text)
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OBJDIR/x86ops.o(.text)
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OBJDIR/x86ops2.o(.text)
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OBJDIR/x86fpu.o(.text)
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OBJDIR/x86sys.o(.text)
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OBJDIR/x86biosemu.o(.text)
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OBJDIR/x86debug.o(.text)
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OBJDIR/x86prim_ops.o(.text)
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OBJDIR/x86pcibios.o(.text)
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OBJDIR/x86decode.o(.text)
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OBJDIR/x86ops.o(.text)
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OBJDIR/x86ops2.o(.text)
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OBJDIR/x86fpu.o(.text)
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OBJDIR/x86sys.o(.text)
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OBJDIR/x86biosemu.o(.text)
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OBJDIR/x86debug.o(.text)
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OBJDIR/x86prim_ops.o(.text)
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OBJDIR/x86pcibios.o(.text)
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OBJDIR/radeon_base.o(.text)
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OBJDIR/radeon_accel.o(.text)
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OBJDIR/radeon_cursor.o(.text)
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OBJDIR/radeon_monitor.o(.text)
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OBJDIR/radeon_base.o(.text)
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OBJDIR/radeon_accel.o(.text)
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OBJDIR/radeon_cursor.o(.text)
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OBJDIR/radeon_monitor.o(.text)
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OBJDIR/xhdi_sd.o(.text)
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OBJDIR/xhdi_interface.o(.text)
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OBJDIR/xhdi_vec.o(.text)
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OBJDIR/xhdi_sd.o(.text)
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OBJDIR/xhdi_interface.o(.text)
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OBJDIR/xhdi_vec.o(.text)
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#ifdef COMPILE_RAM
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/*
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* if we compile to RAM anyway, there is no need to copy anything
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*/
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. = ALIGN(4);
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__BAS_DATA_START = .;
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*(.data)
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__BAS_DATA_END = .;
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__BAS_BSS_START = .;
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*(.bss)
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__BAS_BSS_END = .;
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/*
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* if we compile to RAM anyway, there is no need to copy anything
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*/
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. = ALIGN(4);
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__BAS_DATA_START = .;
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*(.data)
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__BAS_DATA_END = .;
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__BAS_BSS_START = .;
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*(.bss)
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__BAS_BSS_END = .;
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#endif /* COMPILE_RAM */
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#if (FORMAT_ELF == 1)
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*(.rodata)
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*(.rodata.*)
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*(.rodata)
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*(.rodata.*)
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#endif
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} > bas_rom
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} > bas_rom
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#if (TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS)
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/*
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* put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
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*/
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.bas :
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AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
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{
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. = ALIGN(4); /* same alignment than AT() statement! */
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__BAS_DATA_START = .;
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*(.data)
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__BAS_DATA_END = .;
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__BAS_BSS_START = .;
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*(.bss)
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__BAS_BSS_END = .;
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/*
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* put BaS .data and .bss segments to flash, but relocate it to RAM after initialize_hardware() ran
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*/
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.bas :
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AT (ALIGN(ADDR(.text) + SIZEOF(.text), 4))
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{
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. = ALIGN(4); /* same alignment than AT() statement! */
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__BAS_DATA_START = .;
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*(.data)
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__BAS_DATA_END = .;
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__BAS_BSS_START = .;
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*(.bss)
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__BAS_BSS_END = .;
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. = ALIGN(16);
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} > bas_ram
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. = ALIGN(16);
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} > bas_ram
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#endif
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.driver_memory :
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{
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. = ALIGN(4);
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_driver_mem_buffer = .;
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//. = . + DRIVER_MEM_BUFFER_SIZE;
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} > driver_ram
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.driver_memory :
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{
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. = ALIGN(4);
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_driver_mem_buffer = .;
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//. = . + DRIVER_MEM_BUFFER_SIZE;
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} > driver_ram
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/*
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* Global memory map
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*/
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/*
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* Global memory map
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*/
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/* SDRAM Initialization */
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___SDRAM = SDRAM_START;
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___SDRAM_SIZE = SDRAM_SIZE;
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_SDRAM_VECTOR_TABLE = ___SDRAM;
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/* SDRAM Initialization */
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___SDRAM = SDRAM_START;
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___SDRAM_SIZE = SDRAM_SIZE;
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_SDRAM_VECTOR_TABLE = ___SDRAM;
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/* ST-RAM */
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__STRAM = ___SDRAM;
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__STRAM_END = __TOS;
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/* ST-RAM */
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__STRAM = ___SDRAM;
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__STRAM_END = __TOS;
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/* TOS */
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__TOS = 0x00e00000;
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/* TOS */
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__TOS = 0x00e00000;
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/* FastRAM */
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__FASTRAM = 0x10000000;
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__TARGET_ADDRESS = TARGET_ADDRESS;
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/* FastRAM */
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__FASTRAM = 0x10000000;
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__TARGET_ADDRESS = TARGET_ADDRESS;
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#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
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__FASTRAM_END = __BAS_IN_RAM;
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__FASTRAM_END = __BAS_IN_RAM;
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#else
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__FASTRAM_END = TARGET_ADDRESS;
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__FASTRAM_END = TARGET_ADDRESS;
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#endif
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__FASTRAM_SIZE = __FASTRAM_END - __FASTRAM;
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__FASTRAM_SIZE = __FASTRAM_END - __FASTRAM;
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/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
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___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS;
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___BOOT_FLASH_SIZE = BOOTFLASH_SIZE;
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/* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */
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___BOOT_FLASH = BOOTFLASH_BASE_ADDRESS;
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___BOOT_FLASH_SIZE = BOOTFLASH_SIZE;
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#if TARGET_ADDRESS == BOOTFLASH_BASE_ADDRESS
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/* BaS */
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__BAS_LMA = LOADADDR(.bas);
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__BAS_IN_RAM = ADDR(.bas);
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__BAS_SIZE = SIZEOF(.bas);
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/* BaS */
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__BAS_LMA = LOADADDR(.bas);
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__BAS_IN_RAM = ADDR(.bas);
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__BAS_SIZE = SIZEOF(.bas);
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#else
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/* BaS is already in RAM - no need to copy anything */
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__BAS_IN_RAM = __FASTRAM_END;
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__BAS_SIZE = 0;
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__BAS_LMA = __BAS_IN_RAM;
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/* BaS is already in RAM - no need to copy anything */
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__BAS_IN_RAM = __FASTRAM_END;
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__BAS_SIZE = 0;
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__BAS_LMA = __BAS_IN_RAM;
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#endif
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/* Other flash components */
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__FIRETOS = 0xe0400000;
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__EMUTOS = EMUTOS_BASE_ADDRESS;
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__EMUTOS_SIZE = 0x00100000;
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/* Other flash components */
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__FIRETOS = 0xe0400000;
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__EMUTOS = EMUTOS_BASE_ADDRESS;
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__EMUTOS_SIZE = 0x00100000;
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/* where FPGA data lives in flash */
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__FPGA_CONFIG = 0xe0700000;
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__FPGA_CONFIG_SIZE = 0x100000;
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/* where FPGA data lives in flash */
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__FPGA_CONFIG = 0xe0700000;
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__FPGA_CONFIG_SIZE = 0x100000;
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/* VIDEO RAM BASIS */
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__VRAM = 0x60000000;
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/* VIDEO RAM BASIS */
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__VRAM = 0x60000000;
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/* Memory mapped registers */
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__MBAR = 0xFF000000;
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/* Memory mapped registers */
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__MBAR = 0xFF000000;
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/* 32KB on-chip System SRAM */
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||||
__SYS_SRAM = __MBAR + 0x10000;
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__SYS_SRAM_SIZE = 0x00008000;
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/* 32KB on-chip System SRAM */
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||||
__SYS_SRAM = __MBAR + 0x10000;
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__SYS_SRAM_SIZE = 0x00008000;
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||||
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||||
/* MMU memory mapped registers */
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__MMUBAR = 0xFF040000;
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/* MMU memory mapped registers */
|
||||
__MMUBAR = 0xFF040000;
|
||||
|
||||
/*
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||||
* 4KB on-chip Core SRAM0: -> exception table
|
||||
*/
|
||||
__RAMBAR0 = 0xFF100000;
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||||
__RAMBAR0_SIZE = 0x00001000;
|
||||
/*
|
||||
* 4KB on-chip Core SRAM0: -> exception table
|
||||
*/
|
||||
__RAMBAR0 = 0xFF100000;
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||||
__RAMBAR0_SIZE = 0x00001000;
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||||
|
||||
/* 4KB on-chip Core SRAM1 */
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||||
__RAMBAR1 = 0xFF101000;
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||||
__RAMBAR1_SIZE = 0x00001000;
|
||||
__SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4;
|
||||
/* 4KB on-chip Core SRAM1 */
|
||||
__RAMBAR1 = 0xFF101000;
|
||||
__RAMBAR1_SIZE = 0x00001000;
|
||||
__SUP_SP = __RAMBAR1 + __RAMBAR1_SIZE - 4;
|
||||
|
||||
/*
|
||||
* this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot
|
||||
*/
|
||||
__FPGA_JTAG_LOADED = __RAMBAR1;
|
||||
__FPGA_JTAG_VALID = __RAMBAR1 + 4;
|
||||
/* system variables */
|
||||
/*
|
||||
* this flag (if 1) indicates that FPGA configuration has been loaded through JTAG
|
||||
* and shouldn't be overwritten on boot
|
||||
*/
|
||||
__FPGA_JTAG_LOADED = __RAMBAR1;
|
||||
__FPGA_JTAG_VALID = __RAMBAR1 + 4;
|
||||
/* system variables */
|
||||
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
/* system variables */
|
||||
|
||||
/* RAMBAR0 0 to 0x7FF -> exception vectors */
|
||||
_rt_mod = __RAMBAR0 + 0x800;
|
||||
_rt_ssp = __RAMBAR0 + 0x804;
|
||||
_rt_usp = __RAMBAR0 + 0x808;
|
||||
_rt_vbr = __RAMBAR0 + 0x80C; /* (8)01 */
|
||||
_rt_cacr = __RAMBAR0 + 0x810; /* 002 */
|
||||
_rt_asid = __RAMBAR0 + 0x814; /* 003 */
|
||||
_rt_acr0 = __RAMBAR0 + 0x818; /* 004 */
|
||||
_rt_acr1 = __RAMBAR0 + 0x81c; /* 005 */
|
||||
_rt_acr2 = __RAMBAR0 + 0x820; /* 006 */
|
||||
_rt_acr3 = __RAMBAR0 + 0x824; /* 007 */
|
||||
_rt_mmubar = __RAMBAR0 + 0x828; /* 008 */
|
||||
_rt_sr = __RAMBAR0 + 0x82c;
|
||||
_d0_save = __RAMBAR0 + 0x830;
|
||||
_a7_save = __RAMBAR0 + 0x834;
|
||||
_video_tlb = __RAMBAR0 + 0x838;
|
||||
_video_sbt = __RAMBAR0 + 0x83C;
|
||||
_rt_mbar = __RAMBAR0 + 0x844; /* (c)0f */
|
||||
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user