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Networking finally works stable, although not really clean. Something causes spurious interrupts and a handler for this fixed it for now.

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This commit is contained in:
Markus Fröschle
2015-01-18 19:47:31 +00:00
parent a5c06bf765
commit 62d68ec12e
3 changed files with 391 additions and 365 deletions
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32
sys/BaS.c
View File

@@ -270,6 +270,15 @@ NIF nif1;
NIF nif2;
#endif
bool spurious_interrupt_handler(void *arg1, void *arg2)
{
dbg("IMRH=%lx, IMRL=%lx\r\n", MCF_INTC_IMRH, MCF_INTC_IMRL);
dbg("IPRH=%lx, IPRL=%lx\r\n", MCF_INTC_IPRH, MCF_INTC_IPRL);
dbg("IRLR=%x\r\n", MCF_INTC_IRLR);
return true;
}
/*
* initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices
*/
@@ -277,12 +286,20 @@ void init_isr(void)
{
isr_init(); /* need to call that explicitely, otherwise isr table might be full */
/*
* register spurious interrupt handler
*/
if (!isr_register_handler(24, 6, 6, spurious_interrupt_handler, NULL, NULL))
{
dbg("unable to register spurious interrupt handler\r\n");
}
/*
* register the FEC interrupt handler
*/
if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1))
{
err("unable to register isr for FEC0\r\n");
dbg("unable to register isr for FEC0\r\n");
}
/*
@@ -291,7 +308,7 @@ void init_isr(void)
if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL))
{
err("unable to register isr for DMA\r\n");
dbg("unable to register isr for DMA\r\n");
}
#ifdef MACHINE_FIREBEE
@@ -300,7 +317,7 @@ void init_isr(void)
*/
if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL))
{
err("unable to register isr for GPT0 timer\r\n");
dbg("unable to register isr for GPT0 timer\r\n");
}
/*
@@ -308,7 +325,7 @@ void init_isr(void)
*/
if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL))
{
err("Error: unable to register ISR for PSC3\r\n");
dbg("Error: unable to register ISR for PSC3\r\n");
}
#endif /* MACHINE_FIREBEE */
@@ -317,7 +334,7 @@ void init_isr(void)
*/
if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL))
{
err("Error: unable to register isr for XLB PCI interrupts\r\n");
dbg("Error: unable to register isr for XLB PCI interrupts\r\n");
}
MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
@@ -330,7 +347,7 @@ void init_isr(void)
if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
{
err("Error: unable to register isr for PCIARB interrupts\r\n");
dbg("Error: unable to register isr for PCIARB interrupts\r\n");
return;
}
@@ -442,7 +459,10 @@ void BaS(void)
init_isr();
enable_coldfire_interrupts();
MCF_INTC_IMRH = 0;
MCF_INTC_IMRL = 0;
dma_irq_enable();
fec_irq_enable(0, 5, 1);
init_pci();
// video_init();

8
sys/exceptions.S
View File

@@ -178,6 +178,8 @@ init_vec_loop:
subq.l #1,d0
bne init_vec_loop
// set individual interrupt handler assignments
move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table
lea reset_vector(pc),a1 // set reset vector
@@ -186,6 +188,10 @@ init_vec_loop:
lea access(pc),a1 // set illegal access exception handler
move.l a1,0x08(a0)
// install spurious interrupt handler
lea _lowlevel_isr_handler,a1
move.l a1,0x60(a0)
// trap #0 (without any parameters for now) is used to provide BaS' driver addresses to the OS
lea _get_bas_drivers(pc),a1
move.l a1,0x80(a0) // trap #0 exception vector
@@ -259,7 +265,7 @@ _std_exc_vec:
movem.l d0/a5,(sp) // save registers
move.w 8(sp),d0 // fetch vector
and.l #0x3fc,d0 // mask out vector number
#define DBG_EXC
//#define DBG_EXC
#ifdef DBG_EXC
// printout vector number of exception

6
sys/interrupts.c
View File

@@ -117,7 +117,7 @@ bool isr_enable_int_source(int int_source)
}
else
{
err("vector %d does not correspond to an internal interrupt source\r\n");
dbg("vector %d does not correspond to an internal interrupt source\r\n");
return false;
}
@@ -165,13 +165,13 @@ bool isr_register_handler(int vector, int level, int priority, bool (*handler)(v
if (!isr_enable_int_source(int_source))
{
err("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
dbg("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
return false;
}
if (!isr_set_prio_and_level(int_source, priority, level))
{
err("failed to set priority and level for interrupt source %d\r\n", int_source);
dbg("failed to set priority and level for interrupt source %d\r\n", int_source);
return false;
}