Networking finally works stable, although not really clean. Something causes spurious interrupts and a handler for this fixed it for now.
This commit is contained in:
32
sys/BaS.c
32
sys/BaS.c
@@ -270,6 +270,15 @@ NIF nif1;
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NIF nif2;
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NIF nif2;
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#endif
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#endif
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bool spurious_interrupt_handler(void *arg1, void *arg2)
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{
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dbg("IMRH=%lx, IMRL=%lx\r\n", MCF_INTC_IMRH, MCF_INTC_IMRL);
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dbg("IPRH=%lx, IPRL=%lx\r\n", MCF_INTC_IPRH, MCF_INTC_IPRL);
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dbg("IRLR=%x\r\n", MCF_INTC_IRLR);
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return true;
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}
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/*
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/*
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* initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices
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* initialize the interrupt handler tables to dispatch interrupt requests from Coldfire devices
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*/
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*/
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@@ -277,12 +286,20 @@ void init_isr(void)
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{
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{
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isr_init(); /* need to call that explicitely, otherwise isr table might be full */
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isr_init(); /* need to call that explicitely, otherwise isr table might be full */
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/*
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* register spurious interrupt handler
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*/
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if (!isr_register_handler(24, 6, 6, spurious_interrupt_handler, NULL, NULL))
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{
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dbg("unable to register spurious interrupt handler\r\n");
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}
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/*
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/*
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* register the FEC interrupt handler
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* register the FEC interrupt handler
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*/
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*/
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if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1))
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if (!isr_register_handler(64 + INT_SOURCE_FEC0, 5, 1, fec0_interrupt_handler, NULL, (void *) &nif1))
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{
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{
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err("unable to register isr for FEC0\r\n");
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dbg("unable to register isr for FEC0\r\n");
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}
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}
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/*
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/*
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@@ -291,7 +308,7 @@ void init_isr(void)
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if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL))
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if (!isr_register_handler(64 + INT_SOURCE_DMA, 5, 3, dma_interrupt_handler, NULL, NULL))
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{
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{
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err("unable to register isr for DMA\r\n");
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dbg("unable to register isr for DMA\r\n");
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}
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}
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#ifdef MACHINE_FIREBEE
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#ifdef MACHINE_FIREBEE
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@@ -300,7 +317,7 @@ void init_isr(void)
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*/
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*/
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if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL))
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if (!isr_register_handler(64 + INT_SOURCE_GPT0, 5, 2, gpt0_interrupt_handler, NULL, NULL))
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{
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{
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err("unable to register isr for GPT0 timer\r\n");
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dbg("unable to register isr for GPT0 timer\r\n");
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}
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}
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/*
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/*
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@@ -308,7 +325,7 @@ void init_isr(void)
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*/
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*/
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if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL))
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if (!isr_register_handler(64 + INT_SOURCE_PSC3, 5, 5, pic_interrupt_handler, NULL, NULL))
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{
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{
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err("Error: unable to register ISR for PSC3\r\n");
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dbg("Error: unable to register ISR for PSC3\r\n");
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}
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}
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#endif /* MACHINE_FIREBEE */
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#endif /* MACHINE_FIREBEE */
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@@ -317,7 +334,7 @@ void init_isr(void)
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*/
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*/
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if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL))
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if (!isr_register_handler(64 + INT_SOURCE_XLBPCI, 7, 0, xlbpci_interrupt_handler, NULL, NULL))
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{
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{
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err("Error: unable to register isr for XLB PCI interrupts\r\n");
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dbg("Error: unable to register isr for XLB PCI interrupts\r\n");
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}
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}
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MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
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MCF_XLB_XARB_IMR = MCF_XLB_XARB_IMR_SEAE | /* slave error acknowledge interrupt */
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@@ -330,7 +347,7 @@ void init_isr(void)
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if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
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if (!isr_register_handler(64 + INT_SOURCE_PCIARB, 7, 1, pciarb_interrupt_handler, NULL, NULL))
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{
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{
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err("Error: unable to register isr for PCIARB interrupts\r\n");
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dbg("Error: unable to register isr for PCIARB interrupts\r\n");
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return;
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return;
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}
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}
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@@ -442,7 +459,10 @@ void BaS(void)
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init_isr();
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init_isr();
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enable_coldfire_interrupts();
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enable_coldfire_interrupts();
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MCF_INTC_IMRH = 0;
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MCF_INTC_IMRL = 0;
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dma_irq_enable();
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dma_irq_enable();
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fec_irq_enable(0, 5, 1);
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init_pci();
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init_pci();
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// video_init();
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// video_init();
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@@ -178,6 +178,8 @@ init_vec_loop:
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subq.l #1,d0
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subq.l #1,d0
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bne init_vec_loop
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bne init_vec_loop
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// set individual interrupt handler assignments
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move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table
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move.l #__SUP_SP,(a0) // set initial stack pointer at start of exception vector table
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lea reset_vector(pc),a1 // set reset vector
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lea reset_vector(pc),a1 // set reset vector
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@@ -186,6 +188,10 @@ init_vec_loop:
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lea access(pc),a1 // set illegal access exception handler
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lea access(pc),a1 // set illegal access exception handler
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move.l a1,0x08(a0)
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move.l a1,0x08(a0)
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// install spurious interrupt handler
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lea _lowlevel_isr_handler,a1
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move.l a1,0x60(a0)
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// trap #0 (without any parameters for now) is used to provide BaS' driver addresses to the OS
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// trap #0 (without any parameters for now) is used to provide BaS' driver addresses to the OS
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lea _get_bas_drivers(pc),a1
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lea _get_bas_drivers(pc),a1
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move.l a1,0x80(a0) // trap #0 exception vector
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move.l a1,0x80(a0) // trap #0 exception vector
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@@ -259,7 +265,7 @@ _std_exc_vec:
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movem.l d0/a5,(sp) // save registers
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movem.l d0/a5,(sp) // save registers
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move.w 8(sp),d0 // fetch vector
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move.w 8(sp),d0 // fetch vector
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and.l #0x3fc,d0 // mask out vector number
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and.l #0x3fc,d0 // mask out vector number
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#define DBG_EXC
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//#define DBG_EXC
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#ifdef DBG_EXC
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#ifdef DBG_EXC
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// printout vector number of exception
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// printout vector number of exception
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@@ -117,7 +117,7 @@ bool isr_enable_int_source(int int_source)
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}
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}
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else
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else
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{
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{
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err("vector %d does not correspond to an internal interrupt source\r\n");
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dbg("vector %d does not correspond to an internal interrupt source\r\n");
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return false;
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return false;
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}
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}
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@@ -165,13 +165,13 @@ bool isr_register_handler(int vector, int level, int priority, bool (*handler)(v
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if (!isr_enable_int_source(int_source))
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if (!isr_enable_int_source(int_source))
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{
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{
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err("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
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dbg("failed to enable internal interrupt souce %d in IMRL/IMRH\r\n", int_source);
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return false;
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return false;
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}
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}
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if (!isr_set_prio_and_level(int_source, priority, level))
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if (!isr_set_prio_and_level(int_source, priority, level))
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{
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{
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err("failed to set priority and level for interrupt source %d\r\n", int_source);
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dbg("failed to set priority and level for interrupt source %d\r\n", int_source);
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return false;
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return false;
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}
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}
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