added multichannel DMA API (MCDAPI) to BaS
This commit is contained in:
Markus Fröschle
@@ -42,6 +42,7 @@ CFLAGS=-mcpu=5474\
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-Wa,--register-prefix-optional
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SRCDIR=sources
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MCDSRC=mcdapi
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OBJDIR=objs
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# Linker control file. The final $(LDCFILE) is intermediate only (preprocessed version of $(LDCSRC)
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@@ -83,10 +84,16 @@ ASRCS= \
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$(SRCDIR)/illegal_instruction.S \
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$(SRCDIR)/xhdi_vec.S
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MCDSRCS=\
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$(MCDSRC)/MCD_dmaApi.c \
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$(MCDSRC)/MCD_tasks.c \
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$(MCDSRC)/MCD_tasksInit.c
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COBJS=$(patsubst $(SRCDIR)/%.o,$(OBJDIR)/%.o,$(patsubst %.c,%.o,$(CSRCS)))
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AOBJS=$(patsubst $(SRCDIR)/%.o,$(OBJDIR)/%.o,$(patsubst %.S,%.o,$(ASRCS)))
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MCDOBJS=$(patsubst $(MCDSRCS)/%.o,$(OBJDIR)/%.o,$(patsubst %.c,%.o,$(MCDSRCS)))
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OBJS=$(COBJS) $(AOBJS)
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OBJS=$(COBJS) $(AOBJS) $(MCDOBJS)
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LIBBAS=libbas.a
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all: fls ram bfl lib
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362
BaS_gcc/mcdapi/MCD_dma.h
Executable file
362
BaS_gcc/mcdapi/MCD_dma.h
Executable file
@@ -0,0 +1,362 @@
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/*
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* File: MCD_dma.h
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* Purpose: Main header file for multi-channel DMA API.
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*
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* Notes:
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*/
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#ifndef _MCD_API_H
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#define _MCD_API_H
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/*
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* Turn Execution Unit tasks ON (#define) or OFF (#undef)
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*/
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#undef MCD_INCLUDE_EU
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/*
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* Number of DMA channels
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*/
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#define NCHANNELS 16
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/*
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* Total number of variants
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*/
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#ifdef MCD_INCLUDE_EU
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#define NUMOFVARIANTS 6
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#else
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#define NUMOFVARIANTS 4
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#endif
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/*
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* Define sizes of the various tables
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*/
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#define TASK_TABLE_SIZE (NCHANNELS*32)
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#define VAR_TAB_SIZE (128)
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#define CONTEXT_SAVE_SIZE (128)
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#define FUNCDESC_TAB_SIZE (256)
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#ifdef MCD_INCLUDE_EU
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#define FUNCDESC_TAB_NUM 16
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#else
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#define FUNCDESC_TAB_NUM 1
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#endif
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#ifndef DEFINESONLY
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/*
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* Portability typedefs
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*/
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typedef int s32;
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typedef unsigned int u32;
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typedef short s16;
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typedef unsigned short u16;
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typedef char s8;
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typedef unsigned char u8;
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/*
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* These structures represent the internal registers of the
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* multi-channel DMA
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*/
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struct dmaRegs_s {
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u32 taskbar; /* task table base address register */
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u32 currPtr;
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u32 endPtr;
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u32 varTablePtr;
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u16 dma_rsvd0;
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u16 ptdControl; /* ptd control */
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u32 intPending; /* interrupt pending register */
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u32 intMask; /* interrupt mask register */
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u16 taskControl[16]; /* task control registers */
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u8 priority[32]; /* priority registers */
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u32 initiatorMux; /* initiator mux control */
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u32 taskSize0; /* task size control register 0. */
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u32 taskSize1; /* task size control register 1. */
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u32 dma_rsvd1; /* reserved */
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u32 dma_rsvd2; /* reserved */
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u32 debugComp1; /* debug comparator 1 */
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u32 debugComp2; /* debug comparator 2 */
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u32 debugControl; /* debug control */
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u32 debugStatus; /* debug status */
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u32 ptdDebug; /* priority task decode debug */
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u32 dma_rsvd3[31]; /* reserved */
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};
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typedef volatile struct dmaRegs_s dmaRegs;
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#endif
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/*
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* PTD contrl reg bits
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*/
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#define PTD_CTL_TSK_PRI 0x8000
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#define PTD_CTL_COMM_PREFETCH 0x0001
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/*
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* Task Control reg bits and field masks
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*/
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#define TASK_CTL_EN 0x8000
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#define TASK_CTL_VALID 0x4000
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#define TASK_CTL_ALWAYS 0x2000
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#define TASK_CTL_INIT_MASK 0x1f00
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#define TASK_CTL_ASTRT 0x0080
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#define TASK_CTL_HIPRITSKEN 0x0040
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#define TASK_CTL_HLDINITNUM 0x0020
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#define TASK_CTL_ASTSKNUM_MASK 0x000f
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/*
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* Priority reg bits and field masks
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*/
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#define PRIORITY_HLD 0x80
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#define PRIORITY_PRI_MASK 0x07
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/*
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* Debug Control reg bits and field masks
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*/
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#define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
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#define DBG_CTL_AUTO_ARM 0x00008000
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#define DBG_CTL_BREAK 0x00004000
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#define DBG_CTL_COMP1_TYP_MASK 0x00003800
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#define DBG_CTL_COMP2_TYP_MASK 0x00000070
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#define DBG_CTL_EXT_BREAK 0x00000004
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#define DBG_CTL_INT_BREAK 0x00000002
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/*
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* PTD Debug reg selector addresses
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* This reg must be written with a value to show the contents of
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* one of the desired internal register.
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*/
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#define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */
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#define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and
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have initiators asserted */
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/*
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* General return values
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*/
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#define MCD_OK 0
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#define MCD_ERROR -1
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#define MCD_TABLE_UNALIGNED -2
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#define MCD_CHANNEL_INVALID -3
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/*
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* MCD_initDma input flags
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*/
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#define MCD_RELOC_TASKS 0x00000001
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#define MCD_NO_RELOC_TASKS 0x00000000
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#define MCD_COMM_PREFETCH_EN 0x00000002 /* Commbus Prefetching - MCF547x/548x ONLY */
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/*
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* MCD_dmaStatus Status Values for each channel
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*/
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#define MCD_NO_DMA 1 /* No DMA has been requested since reset */
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#define MCD_IDLE 2 /* DMA active, but the initiator is currently inactive */
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#define MCD_RUNNING 3 /* DMA active, and the initiator is currently active */
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#define MCD_PAUSED 4 /* DMA active but it is currently paused */
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#define MCD_HALTED 5 /* the most recent DMA has been killed with MCD_killTask() */
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#define MCD_DONE 6 /* the most recent DMA has completed. */
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/*
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* MCD_startDma parameter defines
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*/
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/*
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* Constants for the funcDesc parameter
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*/
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/* Byte swapping: */
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#define MCD_NO_BYTE_SWAP 0x00045670 /* to disable byte swapping. */
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#define MCD_BYTE_REVERSE 0x00076540 /* to reverse the bytes of each u32 of the DMAed data. */
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#define MCD_U16_REVERSE 0x00067450 /* to reverse the 16-bit halves of
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each 32-bit data value being DMAed.*/
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#define MCD_U16_BYTE_REVERSE 0x00054760 /* to reverse the byte halves of each
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16-bit half of each 32-bit data value DMAed */
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#define MCD_NO_BIT_REV 0x00000000 /* do not reverse the bits of each byte DMAed. */
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#define MCD_BIT_REV 0x00088880 /* reverse the bits of each byte DMAed */
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/* CRCing: */
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#define MCD_CRC16 0xc0100000 /* to perform CRC-16 on DMAed data. */
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#define MCD_CRCCCITT 0xc0200000 /* to perform CRC-CCITT on DMAed data. */
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#define MCD_CRC32 0xc0300000 /* to perform CRC-32 on DMAed data. */
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#define MCD_CSUMINET 0xc0400000 /* to perform internet checksums on DMAed data.*/
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#define MCD_NO_CSUM 0xa0000000 /* to perform no checksumming. */
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#define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | MCD_NO_CSUM)
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#define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
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/*
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* Constants for the flags parameter
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*/
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#define MCD_TT_FLAGS_RL 0x00000001 /* Read line */
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#define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */
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#define MCD_TT_FLAGS_SP 0x00000004 /* Speculative prefetch(XLB) MCF547x/548x ONLY */
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#define MCD_TT_FLAGS_MASK 0x000000ff
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#define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
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#define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */
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#define MCD_CHAIN_DMA /* TBD */
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#define MCD_EU_DMA /* TBD */
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#define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */
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#define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */
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/* these flags are valid for MCD_startDma and the chained buffer descriptors */
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#define MCD_BUF_READY 0x80000000 /* indicates that this buffer is now under the DMA's control */
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#define MCD_WRAP 0x20000000 /* to tell the FEC Dmas to wrap to the first BD */
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#define MCD_INTERRUPT 0x10000000 /* to generate an interrupt after completion of the DMA. */
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#define MCD_END_FRAME 0x08000000 /* tell the DMA to end the frame when transferring
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last byte of data in buffer */
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#define MCD_CRC_RESTART 0x40000000 /* to empty out the accumulated checksum
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prior to performing the DMA. */
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/* Defines for the FEC buffer descriptor control/status word*/
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#define MCD_FEC_BUF_READY 0x8000
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#define MCD_FEC_WRAP 0x2000
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#define MCD_FEC_INTERRUPT 0x1000
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#define MCD_FEC_END_FRAME 0x0800
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/*
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* Defines for general intuitiveness
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*/
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#define MCD_TRUE 1
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#define MCD_FALSE 0
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/*
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* Three different cases for destination and source.
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*/
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#define MINUS1 -1
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#define ZERO 0
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#define PLUS1 1
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#ifndef DEFINESONLY
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/* Task Table Entry struct*/
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typedef struct {
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u32 TDTstart; /* task descriptor table start */
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u32 TDTend; /* task descriptor table end */
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u32 varTab; /* variable table start */
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u32 FDTandFlags; /* function descriptor table start and flags */
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volatile u32 descAddrAndStatus;
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volatile u32 modifiedVarTab;
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u32 contextSaveSpace; /* context save space start */
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u32 literalBases;
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} TaskTableEntry;
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/* Chained buffer descriptor */
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typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
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struct MCD_bufDesc_struct {
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u32 flags; /* flags describing the DMA */
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u32 csumResult; /* checksum from checksumming performed since last checksum reset */
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s8 *srcAddr; /* the address to move data from */
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s8 *destAddr; /* the address to move data to */
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s8 *lastDestAddr; /* the last address written to */
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u32 dmaSize; /* the number of bytes to transfer independent of the transfer size */
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MCD_bufDesc *next; /* next buffer descriptor in chain */
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u32 info; /* private information about this descriptor; DMA does not affect it */
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};
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/* Progress Query struct */
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typedef volatile struct MCD_XferProg_struct {
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s8 *lastSrcAddr; /* the most-recent or last, post-increment source address */
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s8 *lastDestAddr; /* the most-recent or last, post-increment destination address */
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u32 dmaSize; /* the amount of data transferred for the current buffer */
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MCD_bufDesc *currBufDesc;/* pointer to the current buffer descriptor being DMAed */
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} MCD_XferProg;
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/* FEC buffer descriptor */
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typedef volatile struct MCD_bufDescFec_struct {
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u16 statCtrl;
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u16 length;
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u32 dataPointer;
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} MCD_bufDescFec;
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/*************************************************************************/
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/*
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* API function Prototypes - see MCD_dmaApi.c for further notes
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*/
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/*
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* MCD_startDma starts a particular kind of DMA .
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*/
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int MCD_startDma (
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int channel, /* the channel on which to run the DMA */
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s8 *srcAddr, /* the address to move data from, or buffer-descriptor address */
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s16 srcIncr, /* the amount to increment the source address per transfer */
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s8 *destAddr, /* the address to move data to */
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s16 destIncr, /* the amount to increment the destination address per transfer */
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u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */
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u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
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u32 initiator, /* what device initiates the DMA */
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int priority, /* priority of the DMA */
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u32 flags, /* flags describing the DMA */
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u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
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);
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/*
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* MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
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* registers, relocating and creating the appropriate task structures, and
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* setting up some global settings
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*/
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int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags);
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/*
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* MCD_dmaStatus() returns the status of the DMA on the requested channel.
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*/
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int MCD_dmaStatus (int channel);
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/*
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* MCD_XferProgrQuery() returns progress of DMA on requested channel
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*/
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int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep);
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/*
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* MCD_killDma() halts the DMA on the requested channel, without any
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* intention of resuming the DMA.
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*/
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int MCD_killDma (int channel);
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/*
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* MCD_continDma() continues a DMA which as stopped due to encountering an
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* unready buffer descriptor.
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*/
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int MCD_continDma (int channel);
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/*
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* MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
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* running on that channel).
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*/
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int MCD_pauseDma (int channel);
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/*
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* MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
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* running on that channel).
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*/
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int MCD_resumeDma (int channel);
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/*
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* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA
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*/
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int MCD_csumQuery (int channel, u32 *csum);
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/*
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* MCD_getCodeSize provides the packed size required by the microcoded task
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* and structures.
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*/
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int MCD_getCodeSize(void);
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/*
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* MCD_getVersion provides a pointer to a version string and returns a
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* version number.
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*/
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int MCD_getVersion(char **longVersion);
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/* macro for setting a location in the variable table */
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#define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
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/* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
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so I'm avoiding surrounding it with "do {} while(0)" */
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#endif /* DEFINESONLY */
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#endif /* _MCD_API_H */
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933
BaS_gcc/mcdapi/MCD_dmaApi.c
Executable file
933
BaS_gcc/mcdapi/MCD_dmaApi.c
Executable file
@@ -0,0 +1,933 @@
|
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/*
|
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* File: MCD_dmaApi.c
|
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* Purpose: Main C file for multi-channel DMA API.
|
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*
|
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* Notes:
|
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*/
|
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|
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#include "MCD_dma.h"
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#include "MCD_tasksInit.h"
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#include "MCD_progCheck.h"
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/********************************************************************/
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/*
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* This is an API-internal pointer to the DMA's registers
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*/
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dmaRegs *MCD_dmaBar;
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/*
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* These are the real and model task tables as generated by the
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* build process
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*/
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extern TaskTableEntry MCD_realTaskTableSrc[NCHANNELS];
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extern TaskTableEntry MCD_modelTaskTableSrc[NUMOFVARIANTS];
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/*
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* However, this (usually) gets relocated to on-chip SRAM, at which
|
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* point we access them as these tables
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*/
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volatile TaskTableEntry *MCD_taskTable;
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TaskTableEntry *MCD_modelTaskTable;
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/*
|
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* MCD_chStatus[] is an array of status indicators for remembering
|
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* whether a DMA has ever been attempted on each channel, pausing
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* status, etc.
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*/
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static int MCD_chStatus[NCHANNELS] =
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{
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MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
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MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
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MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA,
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MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA, MCD_NO_DMA
|
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};
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/*
|
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* Prototypes for local functions
|
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*/
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static void MCD_memcpy (int *dest, int *src, u32 size);
|
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static void MCD_resmActions (int channel);
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/*
|
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* Buffer descriptors used for storage of progress info for single Dmas
|
||||
* Also used as storage for the DMA for CRCs for single DMAs
|
||||
* Otherwise, the DMA does not parse these buffer descriptors
|
||||
*/
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
extern MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
|
||||
#else
|
||||
MCD_bufDesc MCD_singleBufDescs[NCHANNELS];
|
||||
#endif
|
||||
MCD_bufDesc *MCD_relocBuffDesc;
|
||||
|
||||
|
||||
/*
|
||||
* Defines for the debug control register's functions
|
||||
*/
|
||||
#define DBG_CTL_COMP1_TASK (0x00002000) /* have comparator 1 look for a task # */
|
||||
#define DBG_CTL_ENABLE (DBG_CTL_AUTO_ARM | \
|
||||
DBG_CTL_BREAK | \
|
||||
DBG_CTL_INT_BREAK | \
|
||||
DBG_CTL_COMP1_TASK)
|
||||
#define DBG_CTL_DISABLE (DBG_CTL_AUTO_ARM | \
|
||||
DBG_CTL_INT_BREAK | \
|
||||
DBG_CTL_COMP1_TASK)
|
||||
#define DBG_KILL_ALL_STAT (0xFFFFFFFF)
|
||||
|
||||
/*
|
||||
* Offset to context save area where progress info is stored
|
||||
*/
|
||||
#define CSAVE_OFFSET 10
|
||||
|
||||
/*
|
||||
* Defines for Byte Swapping
|
||||
*/
|
||||
#define MCD_BYTE_SWAP_KILLER 0xFFF8888F
|
||||
#define MCD_NO_BYTE_SWAP_ATALL 0x00040000
|
||||
|
||||
/*
|
||||
* Execution Unit Identifiers
|
||||
*/
|
||||
#define MAC 0 /* legacy - not used */
|
||||
#define LUAC 1 /* legacy - not used */
|
||||
#define CRC 2 /* legacy - not used */
|
||||
#define LURC 3 /* Logic Unit with CRC */
|
||||
|
||||
/*
|
||||
* Task Identifiers
|
||||
*/
|
||||
#define TASK_CHAINNOEU 0
|
||||
#define TASK_SINGLENOEU 1
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
#define TASK_CHAINEU 2
|
||||
#define TASK_SINGLEEU 3
|
||||
#define TASK_FECRX 4
|
||||
#define TASK_FECTX 5
|
||||
#else
|
||||
#define TASK_CHAINEU 0
|
||||
#define TASK_SINGLEEU 1
|
||||
#define TASK_FECRX 2
|
||||
#define TASK_FECTX 3
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Structure to remember which variant is on which channel
|
||||
* TBD- need this?
|
||||
*/
|
||||
typedef struct MCD_remVariants_struct MCD_remVariant;
|
||||
struct MCD_remVariants_struct
|
||||
{
|
||||
int remDestRsdIncr[NCHANNELS]; /* -1,0,1 */
|
||||
int remSrcRsdIncr[NCHANNELS]; /* -1,0,1 */
|
||||
s16 remDestIncr[NCHANNELS]; /* DestIncr */
|
||||
s16 remSrcIncr[NCHANNELS]; /* srcIncr */
|
||||
u32 remXferSize[NCHANNELS]; /* xferSize */
|
||||
};
|
||||
|
||||
/*
|
||||
* Structure to remember the startDma parameters for each channel
|
||||
*/
|
||||
MCD_remVariant MCD_remVariants;
|
||||
/********************************************************************/
|
||||
/*
|
||||
* Function: MCD_initDma
|
||||
* Purpose: Initializes the DMA API by setting up a pointer to the DMA
|
||||
* registers, relocating and creating the appropriate task
|
||||
* structures, and setting up some global settings
|
||||
* Arguments:
|
||||
* dmaBarAddr - pointer to the multichannel DMA registers
|
||||
* taskTableDest - location to move DMA task code and structs to
|
||||
* flags - operational parameters
|
||||
* Return Value:
|
||||
* MCD_TABLE_UNALIGNED if taskTableDest is not 512-byte aligned
|
||||
* MCD_OK otherwise
|
||||
*/
|
||||
extern u32 MCD_funcDescTab0[];
|
||||
|
||||
int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags)
|
||||
{
|
||||
int i;
|
||||
TaskTableEntry *entryPtr;
|
||||
|
||||
/* setup the local pointer to register set */
|
||||
MCD_dmaBar = dmaBarAddr;
|
||||
|
||||
/* do we need to move/create a task table */
|
||||
if ((flags & MCD_RELOC_TASKS) != 0)
|
||||
{
|
||||
int fixedSize;
|
||||
u32 *fixedPtr;
|
||||
/*int *tablePtr = taskTableDest;TBD*/
|
||||
int varTabsOffset, funcDescTabsOffset, contextSavesOffset;
|
||||
int taskDescTabsOffset;
|
||||
int taskTableSize, varTabsSize, funcDescTabsSize, contextSavesSize;
|
||||
int taskDescTabSize;
|
||||
|
||||
int i;
|
||||
|
||||
/* check if physical address is aligned on 512 byte boundary */
|
||||
if (((u32)taskTableDest & 0x000001ff) != 0)
|
||||
return(MCD_TABLE_UNALIGNED);
|
||||
|
||||
MCD_taskTable = taskTableDest; /* set up local pointer to task Table */
|
||||
|
||||
/*
|
||||
* Create a task table:
|
||||
* - compute aligned base offsets for variable tables and
|
||||
* function descriptor tables, then
|
||||
* - loop through the task table and setup the pointers
|
||||
* - copy over model task table with the the actual task descriptor
|
||||
* tables
|
||||
*/
|
||||
|
||||
taskTableSize = NCHANNELS * sizeof(TaskTableEntry);
|
||||
/* align variable tables to size */
|
||||
varTabsOffset = taskTableSize + (u32)taskTableDest;
|
||||
if ((varTabsOffset & (VAR_TAB_SIZE - 1)) != 0)
|
||||
varTabsOffset = (varTabsOffset + VAR_TAB_SIZE) & (~VAR_TAB_SIZE);
|
||||
/* align function descriptor tables */
|
||||
varTabsSize = NCHANNELS * VAR_TAB_SIZE;
|
||||
funcDescTabsOffset = varTabsOffset + varTabsSize;
|
||||
|
||||
if ((funcDescTabsOffset & (FUNCDESC_TAB_SIZE - 1)) != 0)
|
||||
funcDescTabsOffset = (funcDescTabsOffset + FUNCDESC_TAB_SIZE) &
|
||||
(~FUNCDESC_TAB_SIZE);
|
||||
|
||||
funcDescTabsSize = FUNCDESC_TAB_NUM * FUNCDESC_TAB_SIZE;
|
||||
contextSavesOffset = funcDescTabsOffset + funcDescTabsSize;
|
||||
contextSavesSize = (NCHANNELS * CONTEXT_SAVE_SIZE);
|
||||
fixedSize = taskTableSize + varTabsSize + funcDescTabsSize +
|
||||
contextSavesSize;
|
||||
|
||||
/* zero the thing out */
|
||||
fixedPtr = (u32 *)taskTableDest;
|
||||
for (i = 0;i<(fixedSize/4);i++)
|
||||
fixedPtr[i] = 0;
|
||||
|
||||
entryPtr = (TaskTableEntry*)MCD_taskTable;
|
||||
/* set up fixed pointers */
|
||||
for (i = 0; i < NCHANNELS; i++)
|
||||
{
|
||||
entryPtr[i].varTab = (u32)varTabsOffset; /* update ptr to local value */
|
||||
entryPtr[i].FDTandFlags = (u32)funcDescTabsOffset | MCD_TT_FLAGS_DEF;
|
||||
entryPtr[i].contextSaveSpace = (u32)contextSavesOffset;
|
||||
varTabsOffset += VAR_TAB_SIZE;
|
||||
#ifdef MCD_INCLUDE_EU /* if not there is only one, just point to the same one */
|
||||
funcDescTabsOffset += FUNCDESC_TAB_SIZE;
|
||||
#endif
|
||||
contextSavesOffset += CONTEXT_SAVE_SIZE;
|
||||
}
|
||||
/* copy over the function descriptor table */
|
||||
for ( i = 0; i < FUNCDESC_TAB_NUM; i++)
|
||||
{
|
||||
MCD_memcpy((void*)(entryPtr[i].FDTandFlags & ~MCD_TT_FLAGS_MASK),
|
||||
(void*)MCD_funcDescTab0, FUNCDESC_TAB_SIZE);
|
||||
}
|
||||
|
||||
/* copy model task table to where the context saves stuff leaves off*/
|
||||
MCD_modelTaskTable = (TaskTableEntry*)contextSavesOffset;
|
||||
|
||||
MCD_memcpy ((void*)MCD_modelTaskTable, (void*)MCD_modelTaskTableSrc,
|
||||
NUMOFVARIANTS * sizeof(TaskTableEntry));
|
||||
|
||||
entryPtr = MCD_modelTaskTable; /* point to local version of
|
||||
model task table */
|
||||
taskDescTabsOffset = (u32)MCD_modelTaskTable +
|
||||
(NUMOFVARIANTS * sizeof(TaskTableEntry));
|
||||
|
||||
/* copy actual task code and update TDT ptrs in local model task table */
|
||||
for (i = 0; i < NUMOFVARIANTS; i++)
|
||||
{
|
||||
taskDescTabSize = entryPtr[i].TDTend - entryPtr[i].TDTstart + 4;
|
||||
MCD_memcpy ((void*)taskDescTabsOffset, (void*)entryPtr[i].TDTstart, taskDescTabSize);
|
||||
entryPtr[i].TDTstart = (u32)taskDescTabsOffset;
|
||||
taskDescTabsOffset += taskDescTabSize;
|
||||
entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4;
|
||||
}
|
||||
#ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls
|
||||
where they are since DMA might write to them */
|
||||
MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4);
|
||||
#else /* DMA does not touch them so they can be wherever and we don't need to
|
||||
waste SRAM on them */
|
||||
MCD_relocBuffDesc = MCD_singleBufDescs;
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
/* point the would-be relocated task tables and the
|
||||
buffer descriptors to the ones the linker generated */
|
||||
|
||||
if (((u32)MCD_realTaskTableSrc & 0x000001ff) != 0)
|
||||
return(MCD_TABLE_UNALIGNED);
|
||||
|
||||
/* need to add code to make sure that every thing else is aligned properly TBD*/
|
||||
/* this is problematic if we init more than once or after running tasks,
|
||||
need to add variable to see if we have aleady init'd */
|
||||
entryPtr = MCD_realTaskTableSrc;
|
||||
for (i = 0; i < NCHANNELS; i++)
|
||||
{
|
||||
if (((entryPtr[i].varTab & (VAR_TAB_SIZE - 1)) != 0) ||
|
||||
((entryPtr[i].FDTandFlags & (FUNCDESC_TAB_SIZE - 1)) != 0))
|
||||
return(MCD_TABLE_UNALIGNED);
|
||||
}
|
||||
|
||||
MCD_taskTable = MCD_realTaskTableSrc;
|
||||
MCD_modelTaskTable = MCD_modelTaskTableSrc;
|
||||
MCD_relocBuffDesc = MCD_singleBufDescs;
|
||||
}
|
||||
|
||||
|
||||
/* Make all channels as totally inactive, and remember them as such: */
|
||||
|
||||
MCD_dmaBar->taskbar = (u32) MCD_taskTable;
|
||||
for (i = 0; i < NCHANNELS; i++)
|
||||
{
|
||||
MCD_dmaBar->taskControl[i] = 0x0;
|
||||
MCD_chStatus[i] = MCD_NO_DMA;
|
||||
}
|
||||
|
||||
/* Set up pausing mechanism to inactive state: */
|
||||
MCD_dmaBar->debugComp1 = 0; /* no particular values yet for either comparator registers */
|
||||
MCD_dmaBar->debugComp2 = 0;
|
||||
MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
|
||||
MCD_dmaBar->debugStatus = DBG_KILL_ALL_STAT;
|
||||
|
||||
/* enable or disable commbus prefetch, really need an ifdef or
|
||||
something to keep from trying to set this in the 8220 */
|
||||
if ((flags & MCD_COMM_PREFETCH_EN) != 0)
|
||||
MCD_dmaBar->ptdControl &= ~PTD_CTL_COMM_PREFETCH;
|
||||
else
|
||||
MCD_dmaBar->ptdControl |= PTD_CTL_COMM_PREFETCH;
|
||||
|
||||
return(MCD_OK);
|
||||
}
|
||||
/*********************** End of MCD_initDma() ***********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_dmaStatus
|
||||
* Purpose: Returns the status of the DMA on the requested channel
|
||||
* Arguments: channel - channel number
|
||||
* Returns: Predefined status indicators
|
||||
*/
|
||||
int MCD_dmaStatus (int channel)
|
||||
{
|
||||
u16 tcrValue;
|
||||
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
tcrValue = MCD_dmaBar->taskControl[channel];
|
||||
if ((tcrValue & TASK_CTL_EN) == 0)
|
||||
{ /* nothing running */
|
||||
/* if last reported with task enabled */
|
||||
if ( MCD_chStatus[channel] == MCD_RUNNING
|
||||
|| MCD_chStatus[channel] == MCD_IDLE)
|
||||
MCD_chStatus[channel] = MCD_DONE;
|
||||
}
|
||||
else /* something is running */
|
||||
{
|
||||
/* There are three possibilities: paused, running or idle. */
|
||||
if ( MCD_chStatus[channel] == MCD_RUNNING
|
||||
|| MCD_chStatus[channel] == MCD_IDLE)
|
||||
{
|
||||
MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT;
|
||||
/* This register is selected to know which initiator is
|
||||
actually asserted. */
|
||||
if ((MCD_dmaBar->ptdDebug >> channel ) & 0x1 )
|
||||
MCD_chStatus[channel] = MCD_RUNNING;
|
||||
else
|
||||
MCD_chStatus[channel] = MCD_IDLE;
|
||||
/* do not change the status if it is already paused. */
|
||||
}
|
||||
}
|
||||
return MCD_chStatus[channel];
|
||||
}
|
||||
/******************** End of MCD_dmaStatus() ************************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_startDma
|
||||
* Ppurpose: Starts a particular kind of DMA
|
||||
* Arguments: see below
|
||||
* Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
|
||||
*/
|
||||
|
||||
int MCD_startDma (
|
||||
int channel, /* the channel on which to run the DMA */
|
||||
s8 *srcAddr, /* the address to move data from, or physical buffer-descriptor address */
|
||||
s16 srcIncr, /* the amount to increment the source address per transfer */
|
||||
s8 *destAddr, /* the address to move data to */
|
||||
s16 destIncr, /* the amount to increment the destination address per transfer */
|
||||
u32 dmaSize, /* the number of bytes to transfer independent of the transfer size */
|
||||
u32 xferSize, /* the number bytes in of each data movement (1, 2, or 4) */
|
||||
u32 initiator, /* what device initiates the DMA */
|
||||
int priority, /* priority of the DMA */
|
||||
u32 flags, /* flags describing the DMA */
|
||||
u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */
|
||||
#ifdef MCD_NEED_ADDR_TRANS
|
||||
s8 *srcAddrVirt /* virtual buffer descriptor address TBD*/
|
||||
#endif
|
||||
)
|
||||
{
|
||||
int srcRsdIncr, destRsdIncr;
|
||||
int *cSave;
|
||||
short xferSizeIncr;
|
||||
int tcrCount = 0;
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
u32 *realFuncArray;
|
||||
#endif
|
||||
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
/* tbd - need to determine the proper response to a bad funcDesc when not
|
||||
including EU functions, for now, assign a benign funcDesc, but maybe
|
||||
should return an error */
|
||||
#ifndef MCD_INCLUDE_EU
|
||||
funcDesc = MCD_FUNC_NOEU1;
|
||||
#endif
|
||||
|
||||
#ifdef MCD_DEBUG
|
||||
printf("startDma:Setting up params\n");
|
||||
#endif
|
||||
/* Set us up for task-wise priority. We don't technically need to do this on every start, but
|
||||
since the register involved is in the same longword as other registers that users are in control
|
||||
of, setting it more than once is probably preferable. That since the documentation doesn't seem
|
||||
to be completely consistent about the nature of the PTD control register. */
|
||||
MCD_dmaBar->ptdControl |= (u16) 0x8000;
|
||||
#if 1 /* Not sure what we need to keep here rtm TBD */
|
||||
/* Calculate additional parameters to the regular DMA calls. */
|
||||
srcRsdIncr = srcIncr < 0 ? -1 : (srcIncr > 0 ? 1 : 0);
|
||||
destRsdIncr = destIncr < 0 ? -1 : (destIncr > 0 ? 1 : 0);
|
||||
|
||||
xferSizeIncr = (xferSize & 0xffff) | 0x20000000;
|
||||
|
||||
/* Remember for each channel which variant is running. */
|
||||
MCD_remVariants.remSrcRsdIncr[channel] = srcRsdIncr;
|
||||
MCD_remVariants.remDestRsdIncr[channel] = destRsdIncr;
|
||||
MCD_remVariants.remDestIncr[channel] = destIncr;
|
||||
MCD_remVariants.remSrcIncr[channel] = srcIncr;
|
||||
MCD_remVariants.remXferSize[channel] = xferSize;
|
||||
#endif
|
||||
|
||||
cSave = (int*)(MCD_taskTable[channel].contextSaveSpace) + CSAVE_OFFSET + CURRBD;
|
||||
|
||||
#ifdef MCD_INCLUDE_EU /* may move this to EU specific calls */
|
||||
realFuncArray = (u32 *) (MCD_taskTable[channel].FDTandFlags & 0xffffff00);
|
||||
/* Modify the LURC's normal and byte-residue-loop functions according to parameter. */
|
||||
realFuncArray[(LURC*16)] = xferSize == 4 ?
|
||||
funcDesc : xferSize == 2 ?
|
||||
funcDesc & 0xfffff00f : funcDesc & 0xffff000f;
|
||||
realFuncArray[(LURC*16+1)] = (funcDesc & MCD_BYTE_SWAP_KILLER) | MCD_NO_BYTE_SWAP_ATALL;
|
||||
#endif
|
||||
/* Write the initiator field in the TCR, and also set the initiator-hold
|
||||
bit. Note that,due to a hardware quirk, this could collide with an
|
||||
MDE access to the initiator-register file, so we have to verify that the write
|
||||
reads back correctly. */
|
||||
|
||||
MCD_dmaBar->taskControl[channel] =
|
||||
(initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;
|
||||
|
||||
while(((MCD_dmaBar->taskControl[channel] & 0x1fff) !=
|
||||
((initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM)) &&
|
||||
(tcrCount < 1000))
|
||||
{
|
||||
tcrCount++;
|
||||
/*MCD_dmaBar->ptd_tcr[channel] = (initiator << 8) | 0x0020;*/
|
||||
MCD_dmaBar->taskControl[channel] =
|
||||
(initiator << 8) | TASK_CTL_HIPRITSKEN | TASK_CTL_HLDINITNUM;
|
||||
}
|
||||
|
||||
MCD_dmaBar->priority[channel] = (u8)priority & PRIORITY_PRI_MASK;
|
||||
/* should be albe to handle this stuff with only one write to ts reg - tbd */
|
||||
if (channel < 8 && channel >= 0)
|
||||
{
|
||||
MCD_dmaBar->taskSize0 &= ~(0xf << (7-channel)*4);
|
||||
MCD_dmaBar->taskSize0 |= (xferSize & 3) << (((7 - channel)*4) + 2);
|
||||
MCD_dmaBar->taskSize0 |= (xferSize & 3) << ((7 - channel)*4);
|
||||
}
|
||||
else
|
||||
{
|
||||
MCD_dmaBar->taskSize1 &= ~(0xf << (15-channel)*4);
|
||||
MCD_dmaBar->taskSize1 |= (xferSize & 3) << (((15 - channel)*4) + 2);
|
||||
MCD_dmaBar->taskSize1 |= (xferSize & 3) << ((15 - channel)*4);
|
||||
}
|
||||
|
||||
/* setup task table flags/options which mostly control the line buffers */
|
||||
MCD_taskTable[channel].FDTandFlags &= ~MCD_TT_FLAGS_MASK;
|
||||
MCD_taskTable[channel].FDTandFlags |= (MCD_TT_FLAGS_MASK & flags);
|
||||
|
||||
if (flags & MCD_FECTX_DMA)
|
||||
{
|
||||
/* TDTStart and TDTEnd */
|
||||
MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECTX].TDTstart;
|
||||
MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECTX].TDTend;
|
||||
MCD_startDmaENetXmit(srcAddr, srcAddr, destAddr, MCD_taskTable, channel);
|
||||
}
|
||||
else if (flags & MCD_FECRX_DMA)
|
||||
{
|
||||
/* TDTStart and TDTEnd */
|
||||
MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_FECRX].TDTstart;
|
||||
MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_FECRX].TDTend;
|
||||
MCD_startDmaENetRcv(srcAddr, srcAddr, destAddr, MCD_taskTable, channel);
|
||||
}
|
||||
else if(flags & MCD_SINGLE_DMA)
|
||||
{
|
||||
/* this buffer descriptor is used for storing off initial parameters for later
|
||||
progress query calculation and for the DMA to write the resulting checksum
|
||||
The DMA does not use this to determine how to operate, that info is passed
|
||||
with the init routine*/
|
||||
MCD_relocBuffDesc[channel].srcAddr = srcAddr;
|
||||
MCD_relocBuffDesc[channel].destAddr = destAddr;
|
||||
MCD_relocBuffDesc[channel].lastDestAddr = destAddr; /* definitely not its final value */
|
||||
MCD_relocBuffDesc[channel].dmaSize = dmaSize;
|
||||
MCD_relocBuffDesc[channel].flags = 0; /* not used */
|
||||
MCD_relocBuffDesc[channel].csumResult = 0; /* not used */
|
||||
MCD_relocBuffDesc[channel].next = 0; /* not used */
|
||||
|
||||
/* Initialize the progress-querying stuff to show no progress:*/
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET] = (int)srcAddr;
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET] = (int)destAddr;
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] =
|
||||
(u32) &(MCD_relocBuffDesc[channel]);
|
||||
/* tbd - need to keep the user from trying to call the EU routine
|
||||
when MCD_INCLUDE_EU is not defined */
|
||||
if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2)
|
||||
{
|
||||
/* TDTStart and TDTEnd */
|
||||
MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLENOEU].TDTstart;
|
||||
MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLENOEU].TDTend;
|
||||
MCD_startDmaSingleNoEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize,
|
||||
xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave,
|
||||
MCD_taskTable, channel);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* TDTStart and TDTEnd */
|
||||
MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_SINGLEEU].TDTstart;
|
||||
MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_SINGLEEU].TDTend;
|
||||
MCD_startDmaSingleEu(srcAddr, srcIncr, destAddr, destIncr, dmaSize,
|
||||
xferSizeIncr, flags, (int *)&(MCD_relocBuffDesc[channel]), cSave,
|
||||
MCD_taskTable, channel);
|
||||
}
|
||||
}
|
||||
else
|
||||
{ /* chained DMAS */
|
||||
/* Initialize the progress-querying stuff to show no progress:*/
|
||||
#if 1 /* (!defined(MCD_NEED_ADDR_TRANS)) */
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
|
||||
= (int)((MCD_bufDesc*) srcAddr)->srcAddr;
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
|
||||
= (int)((MCD_bufDesc*) srcAddr)->destAddr;
|
||||
#else /* if using address translation, need the virtual addr of the first buffdesc */
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET]
|
||||
= (int)((MCD_bufDesc*) srcAddrVirt)->srcAddr;
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET]
|
||||
= (int)((MCD_bufDesc*) srcAddrVirt)->destAddr;
|
||||
#endif
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET] = 0;
|
||||
((volatile int *)MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET] = (u32) srcAddr;
|
||||
|
||||
if( funcDesc == MCD_FUNC_NOEU1 || funcDesc == MCD_FUNC_NOEU2)
|
||||
{
|
||||
/*TDTStart and TDTEnd*/
|
||||
MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINNOEU].TDTstart;
|
||||
MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINNOEU].TDTend;
|
||||
MCD_startDmaChainNoEu((int *)srcAddr, srcIncr, destIncr, xferSize,
|
||||
xferSizeIncr, cSave, MCD_taskTable, channel);
|
||||
}
|
||||
else
|
||||
{
|
||||
/*TDTStart and TDTEnd*/
|
||||
MCD_taskTable[channel].TDTstart = MCD_modelTaskTable[TASK_CHAINEU].TDTstart;
|
||||
MCD_taskTable[channel].TDTend = MCD_modelTaskTable[TASK_CHAINEU].TDTend;
|
||||
MCD_startDmaChainEu((int *)srcAddr, srcIncr, destIncr, xferSize,
|
||||
xferSizeIncr, cSave, MCD_taskTable, channel);
|
||||
}
|
||||
}
|
||||
MCD_chStatus[channel] = MCD_IDLE;
|
||||
return(MCD_OK);
|
||||
}
|
||||
|
||||
/************************ End of MCD_startDma() *********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_XferProgrQuery
|
||||
* Purpose: Returns progress of DMA on requested channel
|
||||
* Arguments: channel - channel to retrieve progress for
|
||||
* progRep - pointer to user supplied MCD_XferProg struct
|
||||
* Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
|
||||
*
|
||||
* Notes:
|
||||
* MCD_XferProgrQuery() upon completing or after aborting a DMA, or
|
||||
* while the DMA is in progress, this function returns the first
|
||||
* DMA-destination address not (or not yet) used in the DMA. When
|
||||
* encountering a non-ready buffer descriptor, the information for
|
||||
* the last completed descriptor is returned.
|
||||
*
|
||||
* MCD_XferProgQuery() has to avoid the possibility of getting
|
||||
* partially-updated information in the event that we should happen
|
||||
* to query DMA progress just as the DMA is updating it. It does that
|
||||
* by taking advantage of the fact context is not saved frequently for
|
||||
* the most part. We therefore read it at least twice until we get the
|
||||
* same information twice in a row.
|
||||
*
|
||||
* Because a small, but not insignificant, amount of time is required
|
||||
* to write out the progress-query information, especially upon
|
||||
* completion of the DMA, it would be wise to guarantee some time lag
|
||||
* between successive readings of the progress-query information.
|
||||
*/
|
||||
|
||||
/*
|
||||
* How many iterations of the loop below to execute to stabilize values
|
||||
*/
|
||||
#define STABTIME 0
|
||||
|
||||
int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep)
|
||||
{
|
||||
MCD_XferProg prevRep;
|
||||
int again; /* true if we are to try again to get consistent results */
|
||||
int i; /* used as a time-waste counter */
|
||||
int destDiffBytes; /* Total number of bytes that we think actually got xfered. */
|
||||
int numIterations; /* number of iterations */
|
||||
int bytesNotXfered; /* bytes that did not get xfered. */
|
||||
s8 *LWAlignedInitDestAddr, *LWAlignedCurrDestAddr;
|
||||
int subModVal, addModVal; /* Mode values to added and subtracted from the
|
||||
final destAddr */
|
||||
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
/* Read a trial value for the progress-reporting values*/
|
||||
prevRep.lastSrcAddr =
|
||||
(s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
|
||||
prevRep.lastDestAddr =
|
||||
(s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
|
||||
prevRep.dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
|
||||
prevRep.currBufDesc =
|
||||
(MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
|
||||
/* Repeatedly reread those values until they match previous values: */
|
||||
do {
|
||||
/* Waste a little bit of time to ensure stability: */
|
||||
for (i = 0; i < STABTIME; i++)
|
||||
i += i >> 2; /* make sure this loop does something so that it doesn't get optimized out */
|
||||
/* Check them again: */
|
||||
progRep->lastSrcAddr =
|
||||
(s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[SRCPTR + CSAVE_OFFSET];
|
||||
progRep->lastDestAddr =
|
||||
(s8 *) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DESTPTR + CSAVE_OFFSET];
|
||||
progRep->dmaSize = ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[DCOUNT + CSAVE_OFFSET];
|
||||
progRep->currBufDesc =
|
||||
(MCD_bufDesc*) ((volatile int*) MCD_taskTable[channel].contextSaveSpace)[CURRBD + CSAVE_OFFSET];
|
||||
/* See if they match: */
|
||||
if ( prevRep.lastSrcAddr != progRep->lastSrcAddr
|
||||
|| prevRep.lastDestAddr != progRep->lastDestAddr
|
||||
|| prevRep.dmaSize != progRep->dmaSize
|
||||
|| prevRep.currBufDesc != progRep->currBufDesc)
|
||||
{
|
||||
/* If they don't match, remember previous values and try again:*/
|
||||
prevRep.lastSrcAddr = progRep->lastSrcAddr;
|
||||
prevRep.lastDestAddr = progRep->lastDestAddr;
|
||||
prevRep.dmaSize = progRep->dmaSize;
|
||||
prevRep.currBufDesc = progRep->currBufDesc;
|
||||
again = MCD_TRUE;
|
||||
}
|
||||
else
|
||||
again = MCD_FALSE;
|
||||
} while (again == MCD_TRUE);
|
||||
|
||||
|
||||
/* Update the dCount, srcAddr and destAddr */
|
||||
/* To calculate dmaCount, we consider destination address. C
|
||||
overs M1,P1,Z for destination */
|
||||
switch(MCD_remVariants.remDestRsdIncr[channel]) {
|
||||
case MINUS1:
|
||||
subModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
|
||||
addModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
|
||||
LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - addModVal;
|
||||
LWAlignedCurrDestAddr = (progRep->lastDestAddr) - subModVal;
|
||||
destDiffBytes = LWAlignedInitDestAddr - LWAlignedCurrDestAddr;
|
||||
bytesNotXfered = (destDiffBytes/MCD_remVariants.remDestIncr[channel]) *
|
||||
( MCD_remVariants.remDestIncr[channel]
|
||||
+ MCD_remVariants.remXferSize[channel]);
|
||||
progRep->dmaSize = destDiffBytes - bytesNotXfered + addModVal - subModVal;
|
||||
break;
|
||||
case ZERO:
|
||||
progRep->lastDestAddr = progRep->currBufDesc->destAddr;
|
||||
break;
|
||||
case PLUS1:
|
||||
/* This value has to be subtracted from the final calculated dCount. */
|
||||
subModVal = ((int)progRep->currBufDesc->destAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
|
||||
/* These bytes are already in lastDestAddr. */
|
||||
addModVal = ((int)progRep->lastDestAddr) & ((MCD_remVariants.remXferSize[channel]) - 1);
|
||||
LWAlignedInitDestAddr = (progRep->currBufDesc->destAddr) - subModVal;
|
||||
LWAlignedCurrDestAddr = (progRep->lastDestAddr) - addModVal;
|
||||
destDiffBytes = (progRep->lastDestAddr - LWAlignedInitDestAddr);
|
||||
numIterations = ( LWAlignedCurrDestAddr - LWAlignedInitDestAddr)/MCD_remVariants.remDestIncr[channel];
|
||||
bytesNotXfered = numIterations *
|
||||
( MCD_remVariants.remDestIncr[channel]
|
||||
- MCD_remVariants.remXferSize[channel]);
|
||||
progRep->dmaSize = destDiffBytes - bytesNotXfered - subModVal;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* This covers M1,P1,Z for source */
|
||||
switch(MCD_remVariants.remSrcRsdIncr[channel]) {
|
||||
case MINUS1:
|
||||
progRep->lastSrcAddr =
|
||||
progRep->currBufDesc->srcAddr +
|
||||
( MCD_remVariants.remSrcIncr[channel] *
|
||||
(progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
|
||||
break;
|
||||
case ZERO:
|
||||
progRep->lastSrcAddr = progRep->currBufDesc->srcAddr;
|
||||
break;
|
||||
case PLUS1:
|
||||
progRep->lastSrcAddr =
|
||||
progRep->currBufDesc->srcAddr +
|
||||
( MCD_remVariants.remSrcIncr[channel] *
|
||||
(progRep->dmaSize/MCD_remVariants.remXferSize[channel]));
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
return(MCD_OK);
|
||||
}
|
||||
/******************* End of MCD_XferProgrQuery() ********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* MCD_resmActions() does the majority of the actions of a DMA resume.
|
||||
* It is called from MCD_killDma() and MCD_resumeDma(). It has to be
|
||||
* a separate function because the kill function has to negate the task
|
||||
* enable before resuming it, but the resume function has to do nothing
|
||||
* if there is no DMA on that channel (i.e., if the enable bit is 0).
|
||||
*/
|
||||
static void MCD_resmActions (int channel)
|
||||
{
|
||||
MCD_dmaBar->debugControl = DBG_CTL_DISABLE;
|
||||
MCD_dmaBar->debugStatus = MCD_dmaBar->debugStatus;
|
||||
MCD_dmaBar->ptdDebug = PTD_DBG_TSK_VLD_INIT; /* This register is selected to know
|
||||
which initiator is actually asserted. */
|
||||
if((MCD_dmaBar->ptdDebug >> channel ) & 0x1)
|
||||
MCD_chStatus[channel] = MCD_RUNNING;
|
||||
else
|
||||
MCD_chStatus[channel] = MCD_IDLE;
|
||||
}
|
||||
/********************* End of MCD_resmActions() *********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_killDma
|
||||
* Purpose: Halt the DMA on the requested channel, without any
|
||||
* intention of resuming the DMA.
|
||||
* Arguments: channel - requested channel
|
||||
* Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
|
||||
*
|
||||
* Notes:
|
||||
* A DMA may be killed from any state, including paused state, and it
|
||||
* always goes to the MCD_HALTED state even if it is killed while in
|
||||
* the MCD_NO_DMA or MCD_IDLE states.
|
||||
*/
|
||||
int MCD_killDma (int channel)
|
||||
{
|
||||
/* MCD_XferProg progRep; */
|
||||
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
MCD_dmaBar->taskControl[channel] = 0x0;
|
||||
MCD_resumeDma (channel);
|
||||
/*
|
||||
* This must be after the write to the TCR so that the task doesn't
|
||||
* start up again momentarily, and before the status assignment so
|
||||
* as to override whatever MCD_resumeDma() may do to the channel
|
||||
* status.
|
||||
*/
|
||||
MCD_chStatus[channel] = MCD_HALTED;
|
||||
|
||||
/*
|
||||
* Update the current buffer descriptor's lastDestAddr field
|
||||
*
|
||||
* MCD_XferProgrQuery (channel, &progRep);
|
||||
* progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
|
||||
*/
|
||||
return(MCD_OK);
|
||||
}
|
||||
/************************ End of MCD_killDma() **********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_continDma
|
||||
* Purpose: Continue a DMA which as stopped due to encountering an
|
||||
* unready buffer descriptor.
|
||||
* Arguments: channel - channel to continue the DMA on
|
||||
* Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
|
||||
*
|
||||
* Notes:
|
||||
* This routine does not check to see if there is a task which can
|
||||
* be continued. Also this routine should not be used with single DMAs.
|
||||
*/
|
||||
int MCD_continDma (int channel)
|
||||
{
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
MCD_dmaBar->taskControl[channel] |= TASK_CTL_EN;
|
||||
MCD_chStatus[channel] = MCD_RUNNING;
|
||||
|
||||
return(MCD_OK);
|
||||
}
|
||||
/********************** End of MCD_continDma() **********************/
|
||||
|
||||
/*********************************************************************
|
||||
* MCD_pauseDma() and MCD_resumeDma() below use the DMA's debug unit
|
||||
* to freeze a task and resume it. We freeze a task by breakpointing
|
||||
* on the stated task. That is, not any specific place in the task,
|
||||
* but any time that task executes. In particular, when that task
|
||||
* executes, we want to freeze that task and only that task.
|
||||
*
|
||||
* The bits of the debug control register influence interrupts vs.
|
||||
* breakpoints as follows:
|
||||
* - Bits 14 and 0 enable or disable debug functions. If enabled, you
|
||||
* will get the interrupt but you may or may not get a breakpoint.
|
||||
* - Bits 2 and 1 decide whether you also get a breakpoint in addition
|
||||
* to an interrupt.
|
||||
*
|
||||
* The debug unit can do these actions in response to either internally
|
||||
* detected breakpoint conditions from the comparators, or in response
|
||||
* to the external breakpoint pin, or both.
|
||||
* - Bits 14 and 1 perform the above-described functions for
|
||||
* internally-generated conditions, i.e., the debug comparators.
|
||||
* - Bits 0 and 2 perform the above-described functions for external
|
||||
* conditions, i.e., the breakpoint external pin.
|
||||
*
|
||||
* Note that, although you "always" get the interrupt when you turn
|
||||
* the debug functions, the interrupt can nevertheless, if desired, be
|
||||
* masked by the corresponding bit in the PTD's IMR. Note also that
|
||||
* this means that bits 14 and 0 must enable debug functions before
|
||||
* bits 1 and 2, respectively, have any effect.
|
||||
*
|
||||
* NOTE: It's extremely important to not pause more than one DMA channel
|
||||
* at a time.
|
||||
********************************************************************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_pauseDma
|
||||
* Purpose: Pauses the DMA on a given channel (if any DMA is running
|
||||
* on that channel).
|
||||
* Arguments: channel
|
||||
* Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
|
||||
*/
|
||||
int MCD_pauseDma (int channel)
|
||||
{
|
||||
/* MCD_XferProg progRep; */
|
||||
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
|
||||
{
|
||||
MCD_dmaBar->debugComp1 = channel;
|
||||
MCD_dmaBar->debugControl = DBG_CTL_ENABLE | (1 << (channel + 16));
|
||||
MCD_chStatus[channel] = MCD_PAUSED;
|
||||
|
||||
/*
|
||||
* Update the current buffer descriptor's lastDestAddr field
|
||||
*
|
||||
* MCD_XferProgrQuery (channel, &progRep);
|
||||
* progRep.currBufDesc->lastDestAddr = progRep.lastDestAddr;
|
||||
*/
|
||||
}
|
||||
return(MCD_OK);
|
||||
}
|
||||
/************************* End of MCD_pauseDma() ********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_resumeDma
|
||||
* Purpose: Resumes the DMA on a given channel (if any DMA is
|
||||
* running on that channel).
|
||||
* Arguments: channel - channel on which to resume DMA
|
||||
* Returns: MCD_CHANNEL_INVALID if channel is invalid, else MCD_OK
|
||||
*/
|
||||
int MCD_resumeDma (int channel)
|
||||
{
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
if (MCD_dmaBar->taskControl[channel] & TASK_CTL_EN)
|
||||
MCD_resmActions (channel);
|
||||
|
||||
return(MCD_OK);
|
||||
}
|
||||
/************************ End of MCD_resumeDma() ********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_csumQuery
|
||||
* Purpose: Provide the checksum after performing a non-chained DMA
|
||||
* Arguments: channel - channel to report on
|
||||
* csum - pointer to where to write the checksum/CRC
|
||||
* Returns: MCD_ERROR if the channel is invalid, else MCD_OK
|
||||
*
|
||||
* Notes:
|
||||
*
|
||||
*/
|
||||
int MCD_csumQuery (int channel, u32 *csum)
|
||||
{
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
if((channel < 0) || (channel >= NCHANNELS))
|
||||
return(MCD_CHANNEL_INVALID);
|
||||
|
||||
*csum = MCD_relocBuffDesc[channel].csumResult;
|
||||
return(MCD_OK);
|
||||
#else
|
||||
return(MCD_ERROR);
|
||||
#endif
|
||||
}
|
||||
/*********************** End of MCD_resumeDma() *********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_getCodeSize
|
||||
* Purpose: Provide the size requirements of the microcoded tasks
|
||||
* Returns: Size in bytes
|
||||
*/
|
||||
int MCD_getCodeSize(void)
|
||||
{
|
||||
#ifdef MCD_INCLUDE_EU
|
||||
return(0x2b5c);
|
||||
#else
|
||||
return(0x173c);
|
||||
#endif
|
||||
}
|
||||
/********************** End of MCD_getCodeSize() ********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Function: MCD_getVersion
|
||||
* Purpose: Provide the version string and number
|
||||
* Arguments: longVersion - user supplied pointer to a pointer to a char
|
||||
* which points to the version string
|
||||
* Returns: Version number and version string (by reference)
|
||||
*/
|
||||
char MCD_versionString[] = "Multi-channel DMA API Alpha v0.3 (2004-04-26)";
|
||||
#define MCD_REV_MAJOR 0x00
|
||||
#define MCD_REV_MINOR 0x03
|
||||
|
||||
int MCD_getVersion(char **longVersion)
|
||||
{
|
||||
*longVersion = MCD_versionString;
|
||||
return((MCD_REV_MAJOR << 8) | MCD_REV_MINOR);
|
||||
}
|
||||
/********************** End of MCD_getVersion() *********************/
|
||||
|
||||
/********************************************************************/
|
||||
/* Private version of memcpy()
|
||||
* Note that everything this is used for is longword-aligned.
|
||||
*/
|
||||
static void MCD_memcpy (int *dest, int *src, u32 size)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i < size; i += sizeof(int), dest++, src++)
|
||||
*dest = *src;
|
||||
}
|
||||
/********************************************************************/
|
||||
5
BaS_gcc/mcdapi/MCD_progCheck.h
Executable file
5
BaS_gcc/mcdapi/MCD_progCheck.h
Executable file
@@ -0,0 +1,5 @@
|
||||
/* This file is autogenerated. Do not change */
|
||||
#define CURRBD 4
|
||||
#define DCOUNT 6
|
||||
#define DESTPTR 5
|
||||
#define SRCPTR 7
|
||||
2449
BaS_gcc/mcdapi/MCD_tasks.c
Executable file
2449
BaS_gcc/mcdapi/MCD_tasks.c
Executable file
File diff suppressed because it is too large
Load Diff
224
BaS_gcc/mcdapi/MCD_tasksInit.c
Executable file
224
BaS_gcc/mcdapi/MCD_tasksInit.c
Executable file
@@ -0,0 +1,224 @@
|
||||
/*
|
||||
* File: MCD_tasksInit.c
|
||||
* Purpose: Functions for initializing variable tables of different
|
||||
* types of tasks.
|
||||
*
|
||||
* Notes:
|
||||
*/
|
||||
|
||||
/*
|
||||
* Do not edit!
|
||||
*/
|
||||
|
||||
#include "MCD_dma.h"
|
||||
|
||||
extern dmaRegs *MCD_dmaBar;
|
||||
|
||||
|
||||
/*
|
||||
* Task 0
|
||||
*/
|
||||
|
||||
void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)xferSize); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)0x00000000); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x80000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0x00000010); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x08000000); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000001); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x40000000); /* inc[6] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Task 1
|
||||
*/
|
||||
|
||||
void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)srcAddr); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)destAddr); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)dmaSize); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)flags); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)currBD); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000004); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x08000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000001); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x40000000); /* inc[5] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Task 2
|
||||
*/
|
||||
|
||||
void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)xferSize); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000000); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x00000000); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0x80000000); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000010); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000001); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 17, (u32)0x00000004); /* var[17] */
|
||||
MCD_SET_VAR(taskTable+channel, 18, (u32)0x08000000); /* var[18] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0x80000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0xc0000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Task 3
|
||||
*/
|
||||
|
||||
void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)srcAddr); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)(0xe000 << 16) | (0xffff & srcIncr)); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)destAddr); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)(0xe000 << 16) | (0xffff & destIncr)); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)dmaSize); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)(0x2000 << 16) | (0xffff & xferSizeIncr)); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)flags); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)currBD); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)cSave); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000001); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x00000004); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x08000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x00000000); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0xc0000000); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x80000001); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0x40000000); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Task 4
|
||||
*/
|
||||
|
||||
void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)rcvFifoPtr); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x0000ffff); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x30000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)0x0fffffff); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000008); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)0x20000004); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0x40000000); /* inc[3] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Task 5
|
||||
*/
|
||||
|
||||
void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel)
|
||||
{
|
||||
|
||||
MCD_SET_VAR(taskTable+channel, 0, (u32)bDBase); /* var[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 3, (u32)currBD); /* var[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 11, (u32)xmitFifoPtr); /* var[11] */
|
||||
MCD_SET_VAR(taskTable+channel, 1, (u32)0x00000000); /* var[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 2, (u32)0x00000000); /* var[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 4, (u32)0x00000000); /* var[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 5, (u32)0x00000000); /* var[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 6, (u32)0x00000000); /* var[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 7, (u32)0x00000000); /* var[7] */
|
||||
MCD_SET_VAR(taskTable+channel, 8, (u32)0x00000000); /* var[8] */
|
||||
MCD_SET_VAR(taskTable+channel, 9, (u32)0x00000000); /* var[9] */
|
||||
MCD_SET_VAR(taskTable+channel, 10, (u32)0x00000000); /* var[10] */
|
||||
MCD_SET_VAR(taskTable+channel, 12, (u32)0x00000000); /* var[12] */
|
||||
MCD_SET_VAR(taskTable+channel, 13, (u32)0x0000ffff); /* var[13] */
|
||||
MCD_SET_VAR(taskTable+channel, 14, (u32)0xffffffff); /* var[14] */
|
||||
MCD_SET_VAR(taskTable+channel, 15, (u32)0x00000004); /* var[15] */
|
||||
MCD_SET_VAR(taskTable+channel, 16, (u32)0x00000008); /* var[16] */
|
||||
MCD_SET_VAR(taskTable+channel, 24, (u32)0x00000000); /* inc[0] */
|
||||
MCD_SET_VAR(taskTable+channel, 25, (u32)0x60000000); /* inc[1] */
|
||||
MCD_SET_VAR(taskTable+channel, 26, (u32)0x40000000); /* inc[2] */
|
||||
MCD_SET_VAR(taskTable+channel, 27, (u32)0xc000fffc); /* inc[3] */
|
||||
MCD_SET_VAR(taskTable+channel, 28, (u32)0xe0000004); /* inc[4] */
|
||||
MCD_SET_VAR(taskTable+channel, 29, (u32)0x80000000); /* inc[5] */
|
||||
MCD_SET_VAR(taskTable+channel, 30, (u32)0x4000ffff); /* inc[6] */
|
||||
MCD_SET_VAR(taskTable+channel, 31, (u32)0xe0000001); /* inc[7] */
|
||||
|
||||
/* Set the task's Enable bit in its Task Control Register */
|
||||
MCD_dmaBar->taskControl[channel] |= (u16)0x8000;
|
||||
}
|
||||
44
BaS_gcc/mcdapi/MCD_tasksInit.h
Executable file
44
BaS_gcc/mcdapi/MCD_tasksInit.h
Executable file
@@ -0,0 +1,44 @@
|
||||
#ifndef MCD_TSK_INIT_H
|
||||
#define MCD_TSK_INIT_H 1
|
||||
|
||||
/*
|
||||
* Do not edit!
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* Task 0
|
||||
*/
|
||||
void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 1
|
||||
*/
|
||||
void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 2
|
||||
*/
|
||||
void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 3
|
||||
*/
|
||||
void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 4
|
||||
*/
|
||||
void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
|
||||
/*
|
||||
* Task 5
|
||||
*/
|
||||
void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel);
|
||||
|
||||
#endif /* MCD_TSK_INIT_H */
|
||||
Reference in New Issue
Block a user