added comments that try to explain video page flip
This commit is contained in:
Markus Fröschle
80
BaS_gcc/flash_scripts/flash_firebee_bas.bdm
Executable file
80
BaS_gcc/flash_scripts/flash_firebee_bas.bdm
Executable file
@@ -0,0 +1,80 @@
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#!/usr/local/bin/bdmctrl
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#
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# firebee board initialization for bdmctrl
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#
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open $1
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reset
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sleep 10
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wait
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# Turn on MBAR at 0xFF00_0000
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write-ctrl 0x0C0F 0xFF000000
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# set VBR
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write-ctrl 0x0801 0x00000000
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#
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# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
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write 0xFF000500 0xE0000000 4
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write 0xFF000508 0x00001180 4
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write 0xFF000504 0x007F0001 4
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# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
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write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
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write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
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write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
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write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
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write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
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write 0xFF000108 0x73622830 4 # SDCFG1
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write 0xFF00010C 0x46770000 4 # SDCFG2
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write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
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write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
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write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
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sleep 100
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write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
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write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
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write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
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write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
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write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
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sleep 10
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# use system sdram as flashlib scratch area.
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# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
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# This seems to be related to large flash buffers and PC-relative adressing of the plugin
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flash-plugin 0x1000 0xf000 flash29.plugin
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# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
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flash 0xE0000000
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# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
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#
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# Caution: sector offset numbers need to be the ones from the x16 address range
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# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
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#
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# contrary to documentation, it seems we need to erase-wait after each sector
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erase 0xE0000000 0x00000
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erase-wait 0xE0000000
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erase 0xE0000000 0x01000
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erase-wait 0xE0000000
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erase 0xE0000000 0x02000
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erase-wait 0xE0000000
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erase 0xE0000000 0x03000
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erase-wait 0xE0000000
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erase 0xE0000000 0x04000
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erase-wait 0xE0000000
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erase 0xE0000000 0x05000
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erase-wait 0xE0000000
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erase 0xE0000000 0x06000
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erase-wait 0xE0000000
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erase 0xE0000000 0x07000
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erase-wait 0xE0000000
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erase 0xE0000000 0x08000
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erase-wait 0xE0000000
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erase 0xE0000000 0x10000
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erase-wait 0xE0000000
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blank-chk 0xE0000000 0x10000
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load -v bas.elf
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wait
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80
BaS_gcc/flash_scripts/flash_m548x_bas.bdm
Executable file
80
BaS_gcc/flash_scripts/flash_m548x_bas.bdm
Executable file
@@ -0,0 +1,80 @@
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#!/usr/local/bin/bdmctrl
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#
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# m548x board initialization for bdmctrl
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#
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open $1
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reset
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sleep 10
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wait
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# Turn on MBAR at 0xFF00_0000
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write-ctrl 0x0C0F 0xFF000000
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# set VBR
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write-ctrl 0x0801 0x00000000
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#
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# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
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write 0xFF000500 0xE0000000 4
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write 0xFF000508 0x00001180 4
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write 0xFF000504 0x007F0001 4
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# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
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write 0xFF000004 0x000002AA 4 # SDRAMDS configuration
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write 0xFF000020 0x0000001A 4 # SDRAM CS0 configuration (128Mbytes 0000_0000 - 07FF_FFFF)
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write 0xFF000024 0x0800001A 4 # SDRAM CS1 configuration (128Mbytes 0800_0000 - 0FFF_FFFF)
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write 0xFF000028 0x1000001A 4 # SDRAM CS2 configuration (128Mbytes 1000_0000 - 17FF_FFFF)
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write 0xFF00002C 0x1800001A 4 # SDRAM CS3 configuration (128Mbytes 1800_0000 - 1FFF_FFFF)
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write 0xFF000108 0x73622830 4 # SDCFG1
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write 0xFF00010C 0x46770000 4 # SDCFG2
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write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
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write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
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write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
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sleep 100
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write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
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write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
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write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
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write 0xFF000100 0x008D0000 4 # SDMR (write to LMR)
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write 0xFF000104 0x710D0F00 4 # SDCR (lock SDMR and enable refresh)
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sleep 10
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# use system sdram as flashlib scratch area.
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# TODO: plugin flashing seems to work o.k. now for smaller binaries, while it doesn't for larger ones (EmuTOS) yet.
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# This seems to be related to large flash buffers and PC-relative adressing of the plugin
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flash-plugin 0x1000 0xf000 flash29.plugin
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# notify flashlib that we have flash at address 0xE0000000, length 0x7FFFFF, plugin is flash29
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flash 0xE0000000
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# Erase flash from 0xE0000000 to 0xE00FFFFF (reserved space for BaS)
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#
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# Caution: sector offset numbers need to be the ones from the x16 address range
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# column and they vary in size - needs to be exactly as in the data sheet (p. 9)
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#
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# contrary to documentation, it seems we need to erase-wait after each sector
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erase 0xE0000000 0x00000
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erase-wait 0xE0000000
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erase 0xE0000000 0x01000
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erase-wait 0xE0000000
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erase 0xE0000000 0x02000
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erase-wait 0xE0000000
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erase 0xE0000000 0x03000
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erase-wait 0xE0000000
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erase 0xE0000000 0x04000
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erase-wait 0xE0000000
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erase 0xE0000000 0x05000
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erase-wait 0xE0000000
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erase 0xE0000000 0x06000
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erase-wait 0xE0000000
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erase 0xE0000000 0x07000
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erase-wait 0xE0000000
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erase 0xE0000000 0x08000
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erase-wait 0xE0000000
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erase 0xE0000000 0x10000
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erase-wait 0xE0000000
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blank-chk 0xE0000000 0x10000
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load -v bas.elf
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wait
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@@ -891,7 +891,9 @@ psc3_fertig:
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RTE
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/*
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* general purpose timer 0 (GPT0): video change, later also others
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* general purpose timer 0 (GPT0): video change, later also others. GPT0 is used as
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* input trigger. It is connected to the TIN0 signal of the FPGA and triggers everytime
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* vbasehi is written to, i.e. when the video base address gets changed
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*/
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handler_gpt0:
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move #0x2700,sr // disable interrupts
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@@ -900,31 +902,34 @@ handler_gpt0:
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movem.l d0-d4/a0-a1,(a7)
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mvz.b vbasehi,d0 // screen base address high
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cmp.w #2,d0 // lower than 0x200000?
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blt video_chg_end // yes
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cmp.w #0xd0,d0 // 0xd00000? - normal Falcon video area, map to 60d00000 (FPGA video memory)
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cmp.w #2,d0 // screen base lower than 0x20000?
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blt video_chg_end // yes, do nothing
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cmp.w #0xd0,d0 // lower than 0xd00000? - normal Falcon video area, mapped
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// to 60d00000 (FPGA video memory)
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blt sca_other //
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lea MCF_SLT0_SCNT,a0
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move.l (a0),_video_sbt // save time
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// FIXME: don't we need to get out here?
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sca_other:
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lsl.l #8,d0 // build screen start address from Atari register contents
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lsl.l #8,d0 // build new screen start address from Atari register contents
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move.b 0xffff8203,d0 // mid byt
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lsl.l #8,d0
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move.b 0xffff820d,d0 // low byt
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move.l d0,d3
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video_chg_1page:
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// test ob page schon gesetzt
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// check if page is already marked as video page
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moveq #20,d4
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move.l d0,d2
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lsr.l d4,d2 // neue page
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lsr.l d4,d2 // new page
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move.l _video_tlb,d4
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bset.l d2,d4 // setzen als ge<EFBFBD>ndert
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bne video_chg_2page // schon gesetzt gewesen? ja->weg
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bset.l d2,d4 // set as changed
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bne video_chg_2page // was it set already?
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move.l d4,_video_tlb
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bsr cpusha // cache leeren
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bsr cpusha // clear cache
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video_copy_data:
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move.l d4,_video_tlb
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@@ -932,7 +937,7 @@ video_copy_data:
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move.l d0,a0
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move.l a0,a1
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add.l #0x60000000,a1
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move.l #0x10000,d4 // die ganze page
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move.l #0x10000,d4 // whole page
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#define _DO_CPU_COPY
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#ifndef _DO_CPU_COPY
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@@ -968,7 +973,7 @@ video_copy_data:
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#else
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video_copy_data_loop:
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move.l (a0)+,(a1)+
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move.l (a0)+,(a1)+ // copy video page contents to real screen
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move.l (a0)+,(a1)+
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move.l (a0)+,(a1)+
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move.l (a0)+,(a1)+
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@@ -977,9 +982,9 @@ video_copy_data_loop:
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#endif
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// eintrag suchen
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move.l d0,MCF_MMU_MMUAR // addresse
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move.l d0,MCF_MMU_MMUAR // adress
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move.l #0x106,d4
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move.l d4,MCF_MMU_MMUOR // suchen -> schl<EFBFBD>gt neuen vor wenn keiner
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move.l d4,MCF_MMU_MMUOR // search -> new one will be offered if not found
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nop
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move.l MCF_MMU_MMUOR,d4
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clr.w d4
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@@ -994,7 +999,7 @@ video_copy_data_loop:
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move.l d2,MCF_MMU_MMUOR // setzen vidoe maped to 60xxx only data
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nop
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video_chg_2page:
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// test ob evt. anschliessende page gesetzt werden muss
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// test of adjacent page is needed also
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move.l d3,d0
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mvz.w 0xffff8210,d4 // byts pro zeile
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mvz.w 0xffff82aa,d2 // zeilen ende
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