From 523f73a9ae701b2c96fe8fa85ac121d3d6b22f4b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Wed, 20 Nov 2013 06:54:48 +0000 Subject: [PATCH] new inline asm version of set_ipl() (was asm_set_ipl()) --- BaS_gcc/include/exceptions.h | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/BaS_gcc/include/exceptions.h b/BaS_gcc/include/exceptions.h index 45a4de9..aaaab75 100644 --- a/BaS_gcc/include/exceptions.h +++ b/BaS_gcc/include/exceptions.h @@ -3,6 +3,27 @@ #include -extern void asm_set_ipl(uint32_t ipl); +inline uint32_t set_ipl(uint32_t ipl) +{ + uint32_t ret; + + __asm__ __volatile__( + " clr.l %[ret]\r\n" /* clear result (mvz.w sr is no valid statement) */ + " move.w sr,%[ret]\r\n" /* retrieve status register */ + " andi.l #0x07,%[ipl]\n\t" /* mask out ipl bits on new value */ + " lsl.l #8,%[ipl]\n\t" /* shift them to position */ + " move.l %[ret],d0\n\t" /* retrieve original value */ + " andi.l #0x0000f8ff,d0\n\t" /* clear ipl part */ + " or.l %[ipl],d0\n\t" /* or in new value */ + " move.w d0,sr\n\t" /* put it in place */ + " andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */ + " lsr.l #8,%[ret]\r\n" /* shift them to position */ + : [ret] "=d" (ret) /* output */ + : [ipl] "r" (ipl) /* input */ + : "d0", "memory" /* clobber */ + ); + + return ret; +} #endif /* _EXCEPTIONS_H_ */