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Not tested. Hopefully fixed interrupts.

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This commit is contained in:
Markus Fröschle
2015-01-08 16:36:55 +00:00
parent 922be63d2a
commit 4fee11270d
4 changed files with 322 additions and 503 deletions
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203
BaS_gcc/sys/exceptions.S
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@@ -186,22 +186,6 @@ init_vec_loop:
move.l a1,0x80(a0) // trap #0 exception vector
#ifdef MACHINE_FIREBEE
// ACP interrupts 1-7 (user-defined, generated by FPGA on the FireBee, M5484LITE has irq7 and irq5 for PCI)
lea mfp_irq1(pc),a1
move.l a1,0x104(a0)
lea mfp_irq2(pc),a1
move.l a1,0x108(a0)
lea mfp_irq3(pc),a1
move.l a1,0x10c(a0)
lea mfp_irq4(pc),a1
move.l a1,0x110(a0)
lea mfp_irq5(pc),a1
move.l a1,0x114(a0)
lea mfp_irq6(pc),a1
move.l a1,0x118(a0)
lea mfp_irq7(pc),a1
move.l a1,0x11c(a0)
// timer vectors (triggers when vbashi gets changed, used for video page copy)
lea handler_gpt0(pc),a1
@@ -229,7 +213,7 @@ init_vec_loop:
move.l a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
#endif
// install lowlevel_isr_handler for DMA interrupts
// install lowlevel_isr_handler for Coldfire DMA interrupts
move.l a1,(INT_SOURCE_DMA + 64) * 4(a0)
move.l (sp)+,a2 // Restore registers
@@ -381,41 +365,8 @@ flpoow:
nop
#endif /* _NOT_USED */
irq1:
irq 0x64,1,0x02 // IRQ1
irq2:
irq 0x68,2,0x04 // IRQ2
irq3:
irq 0x6c,3,0x08 // IRQ3
irq4:
irq 0x70,4,0x10 // IRQ4
irq5:
irq 0x74,5,0x20 // IRQ5
irq6:
irq 0x78,6,0x40 // IRQ6
irq7:
irq 0x7c,7,0x80 // IRQ7
mfp_irq1:
irq 0x104,1,0x02 // MFP IRQ1
mfp_irq2:
irq 0x108,2,0x04 // MFP IRQ2
mfp_irq3:
irq 0x10c,3,0x08 // MFP IRQ3
mfp_irq4:
irq 0x110,4,0x10 // MFP IRQ4
#if MACHINE_M5484LITE_notyet // handlers for M5484LITE
#if MACHINE_M5484LITE // handlers for M5484LITE
irq5: // irq5 is tied to PCI INTC# and PCI INTD# on the M5484LITE
move.w #0x2700,sr // disable interrupts
@@ -458,7 +409,7 @@ irq7text:
.text
#elif MACHINE_FIREBEE /* these handlers are only meaningful for the Firebee */
mfp_irq5: move.w #0x2700,sr // disable interrupts
irq5: move.w #0x2700,sr // disable interrupts
subq.l #4,sp // extra space
link a6,#-4 * 4 // save gcc scratch registers
@@ -484,9 +435,10 @@ irq5_forward: move.l 0x74,a0 // fetch OS irq5 vector
move.w #0x2500,sr // set interrupt level
rts // jump through vector
#ifdef _NOT_USED_
mfp_irq6: move.w #0x2700,sr // disable interrupt
irq6: move.w #0x2700,sr // disable interrupt
subq.l #4,sp // extra space
link a6,#-4 * 4 // save gcc scratch registers
movem.l d0-d1/a0-a1,(sp)
@@ -503,8 +455,8 @@ mfp_irq6: move.w #0x2700,sr // disable interrupt
addq.l #4,sp // "extra space" not needed in this case
rte
mfp_irq6_forward:
move.l 0xf0020000,a0 // fetch FPGA "autovector"
irq6_forward:
move.l 0xf0020000,a0 // fetch FPGA "MFP autovector"
add.l _rt_vbr,a0 // add runtime VBR
move.l (a0),4(a6) // fetch handler address and put it on "extra space"
@@ -514,147 +466,10 @@ mfp_irq6_forward:
rts // jump through vector
#else /* _NOT_USED_ */
// this is the old code from Fredi
mfp_irq6:
// MFP interrupt from FPGA
move.w #0x2700,sr // disable interrupt
subq.l #8,sp
movem.l d0/a5,(sp) // save registers
lea MCF_EPORT_EPFR,a5 // clear int6 from edge port
bset #6,(a5)
mfp_irq6_non_sca:
// test auf acsi dma -----------------------------------------------------------------
lea 0xfffffa0b,a5
bset #7,-4(a5) // int ena
btst.b #7,(a5) // acsi dma int?
beq mfp_non_acsi_dma
bsr acsi_dma
mfp_non_acsi_dma:
// ----------------------------------------------------------------------------------
tst.b (a5)
bne mfp_irq6_1
tst.b 2(a5)
bne mfp_irq6_1
movem.l (sp),d0/a5
addq.l #8,sp
rte
mfp_irq6_1:
lea MCF_GPIO_PODR_FEC1L,a5
bclr.b #4,(a5) // led on
lea blinker,a5
addq.l #1,(a5) // +1
move.l (a5),d0
and.l #0x80,d0
bne mfp_irq6_2
lea MCF_GPIO_PODR_FEC1L,a5
bset.b #4,(a5) // led off
/*
* Firebee inthandler. 0xf0020000 delivers the interrupt vector
*
* 0: PIC_INT
* 1: E0_INT
* 2: DVI_INT
* 3: PCI_INT#A
* 4: PCI_INT#B
* 5: PCI_INT#C
* 6: PCI_INT#D
* 7: DSP_INT
* 8: VSYNC
* 9: HSYNC
*/
mfp_irq6_2:
move.l 0xF0020000,a5 // vector holen
add.l _rt_vbr,a5 // basis
move.l (a5),d0 // vector holen
move.l 4(sp),a5 // a5 zurück
move.l d0,4(sp) // vector eintragen
move.l (sp)+,d0 // d0 zurück
move #0x2600,sr
rts
.data
blinker:.long 0
.text
/*
* pseudo dma
*/
acsi_dma: // atari dma
move.l a1,-(sp)
move.l d1,-(sp)
//lea MCF_PSC0_PSCTB_8BIT,a1 // ++ vr
//mchar move.l, 'D,'M','A,'\ ,(a1)
//move.l #"DMA ",(a1)
//mchar move.l,'I,'N,'T,'!,(a1)
//move.l #'INT!',(a1)
lea 0xf0020110,a5 // fifo daten
acsi_dma_start:
move.l -12(a5),a1 // dma adresse
move.l -8(a5),d0 // byt counter
ble acsi_dma_end
btst.b #0,-16(a5) // write? (dma modus reg)
bne acsi_dma_wl // ja->
acsi_dma_rl:
tst.b -4(a5) // dma req?
bpl acsi_dma_finished // nein->
move.l (a5),(a1)+ // read 4 bytes
move.l (a5),(a1)+ // read 4 bytes
move.l (a5),(a1)+ // read 4 bytes
move.l (a5),(a1)+ // read 4 bytes
moveq #'.',d1
move.b d1,MCF_PSC0_PSCTB_8BIT
sub.l #16,d0 // byt counter -16
bpl acsi_dma_rl
bra acsi_dma_finished
acsi_dma_wl:
tst.b -4(a5) // dma req?
bpl acsi_dma_finished // nein->
move.l (a1)+,(a5) // write 4 byts
move.l (a1)+,(a5) // write 4 byts
move.l (a1)+,(a5) // write 4 byts
move.l (a1)+,(a5) // write 4 byts
moveq #'.',d1
move.b d1,MCF_PSC0_PSCTB_8BIT
sub.l #16,d0 // byt counter -16
bpl acsi_dma_wl
acsi_dma_finished:
move.l a1,-12(a5) // adresse zur<EFBFBD>ck
move.l d0,-8(a5) // byt counter zur<EFBFBD>ck
acsi_dma_end:
tst.b -4(a5) // dma req?
bmi acsi_dma_start // ja->
lea 0xfffffa0b,a5
bclr.b #7,4(a5) // clear int in service mfp
bclr.b #7,(a5) // clear int pending mfp 0xfffffa0b
move.w #0x0d0a,d1
move.w d1,MCF_PSC0_PSCTB_8BIT
move.l (sp)+,d1
move.l (sp)+,a1
rts
#endif /* _NOT_USED_ */
/*
* irq 7 = pseudo bus error
*/
mfp_irq7:
irq7:
lea -12(sp),sp
movem.l d0/a0,(sp)