Fixed missing backup registers.

sources/exceptions.S

@@ -204,6 +204,8 @@ irq_end:
 
 .text
 _vec_init:
+		move.l	a2,-(sp)			// Backup registers
+
  		mov3q.l	#-1,_rt_mod			// rt_mod auf super
  		clr.l	_rt_ssp
  		clr.l	_rt_usp
@@ -286,6 +288,8 @@ no_protect_vectors:
 //timer 1 vectors
 		lea		timer0(pc),a1
 		move.l	a1,0x1f8(a0)
+
+		move.l	(sp)+,a2			// Restore registers
 		rts
 /*
  * exception vector routines

sources/mmu.S

@@ -79,6 +79,9 @@
 
 .text
 _mmu_init:
+		move.l	d3,-(sp)			// Backup registers
+		move.l	d2,-(sp)
+
  		clr.l	d0
 		movec	d0,ASID				// ASID allways 0
 		move.l	d0,_rt_asid			// sichern
@@ -168,6 +171,8 @@ _mmu_init:
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d3,MCF_MMU_MMUOR						// setzen instr
 */
+		move.l	(sp)+,d2			// Restore registers
+		move.l	(sp)+,d3
 		rts
 
 /*