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moved code around to try and determine why PCI memory mapping doesn't work as expected

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This commit is contained in:
Markus Fröschle
2013-11-08 17:34:08 +00:00
parent 7b6dca54d4
commit 4d27bb6f20
2 changed files with 6 additions and 1 deletions
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5
BaS_gcc/sources/pci.c
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@@ -462,6 +462,11 @@ void init_xlbus_arbiter(void)
/* device errata 26: Flexbus hang up in 4:1 clock ratio */ /* device errata 26: Flexbus hang up in 4:1 clock ratio */
MCF_PCI_PCIGSCR |= 0x80000000; /* disable pipeline */ MCF_PCI_PCIGSCR |= 0x80000000; /* disable pipeline */
} }
xprintf("PCIGSCR = %08x\r\n");
MCF_PCI_PCIGSCR |= 0x60000000; /* clear PERR and SERR in global status/command register */
xprintf("PCIGSCR = %08x\r\n");
/* FIXME: Firetos (boot2.S, l. 719) looks pretty strange at this place - is this a typo? */ /* FIXME: Firetos (boot2.S, l. 719) looks pretty strange at this place - is this a typo? */
} }

2
BaS_gcc/sources/sysinit.c
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@@ -1029,9 +1029,9 @@ void initialize_hardware(void)
init_video_ddr(); init_video_ddr();
dvi_on(); dvi_on();
#endif /* MACHINE_FIREBEE */ #endif /* MACHINE_FIREBEE */
init_pci();
init_eport(); init_eport();
init_xlbus_arbiter(); init_xlbus_arbiter();
init_pci();
/* moved the following line (temporarily) to BaS (after MMU init) to be able to catch adressing errors on USB init */ /* moved the following line (temporarily) to BaS (after MMU init) to be able to catch adressing errors on USB init */
//init_usb(); //init_usb();
#if MACHINE_FIREBEE #if MACHINE_FIREBEE