fixed formatting

This commit is contained in:
Markus Fröschle
2014-08-04 20:50:39 +00:00
parent b40ddd37fc
commit 4c5b6d02e9

View File

@@ -262,7 +262,7 @@ begin
'1' when FB_SIZE(1) = '1' and FB_SIZE(0) = '0' and FB_ADR(1) = '1' else -- Low word. '1' when FB_SIZE(1) = '1' and FB_SIZE(0) = '0' and FB_ADR(1) = '1' else -- Low word.
'1' when FB_ADR(1 downto 0) = "11" else '0'; -- Byte 3. '1' when FB_ADR(1 downto 0) = "11" else '0'; -- Byte 3.
-- 16 std_logic selectors: -- 16 bit selectors:
FB_16B(0) <= not FB_ADR(0); FB_16B(0) <= not FB_ADR(0);
FB_16B(1) <= '1'when FB_ADR(0) = '1' else FB_16B(1) <= '1'when FB_ADR(0) = '1' else
'1' when FB_SIZE(1) = '0' and FB_SIZE(0) = '0' else -- No byte. '1' when FB_SIZE(1) = '0' and FB_SIZE(0) = '0' else -- No byte.
@@ -727,7 +727,7 @@ begin
P_DOUBLE_LINE_2 : process P_DOUBLE_LINE_2 : process
begin begin
wait until CLK_PIXEL_I = '1' and CLK_PIXEL_I' event; wait until CLK_PIXEL_I = '1' and CLK_PIXEL_I'event;
if DOP_ZEI = '1' and VVCNT(0) /= VDIS_START(0) and VVCNT /= "00000000000" and VHCNT < std_logic_vector(unsigned(HDIS_END) - 1) then if DOP_ZEI = '1' and VVCNT(0) /= VDIS_START(0) and VVCNT /= "00000000000" and VHCNT < std_logic_vector(unsigned(HDIS_END) - 1) then
INTER_ZEI_I <= '1'; -- Switch insertion line to "double". Line zero due to SYNC. INTER_ZEI_I <= '1'; -- Switch insertion line to "double". Line zero due to SYNC.
elsif DOP_ZEI = '1' and VVCNT(0) = VDIS_START(0) and VVCNT /= "00000000000" and VHCNT > std_logic_vector(unsigned(HDIS_END) - 10) then elsif DOP_ZEI = '1' and VVCNT(0) = VDIS_START(0) and VVCNT /= "00000000000" and VHCNT > std_logic_vector(unsigned(HDIS_END) - 10) then