fix mask for function number
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@@ -24,10 +24,10 @@
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#define MEM_RW(where) emu->emu_rdw(emu, where)
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#define MEM_RL(where) emu->emu_rdl(emu, where)
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#define PCI_VGA_RAM_IMAGE_START 0xC0000
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#define PCI_RAM_IMAGE_START 0xD0000
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#define SYS_BIOS 0xF0000
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#define SIZE_EMU 0x100000
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#define PCI_VGA_RAM_IMAGE_START 0xC0000
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#define PCI_RAM_IMAGE_START 0xD0000
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#define SYS_BIOS 0xF0000
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#define SIZE_EMU 0x100000
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struct rom_header
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@@ -75,7 +75,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
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case READ_CONFIG_BYTE:
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// bus, devfn
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dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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emu->x86.R_CL = pci_read_config_byte(dev, emu->x86.R_DI);
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dbg("value = %x\r\n", emu->x86.R_CL);
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emu->x86.R_AH = SUCCESSFUL;
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@@ -86,7 +86,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
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case READ_CONFIG_WORD:
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// bus, devfn
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dbg("READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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if (emu->x86.R_DI == PCIBAR1)
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emu->x86.R_CX = offset_port + 1;
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else
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@@ -100,7 +100,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
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case READ_CONFIG_DWORD:
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// bus, devfn
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dbg("READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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if (emu->x86.R_DI == PCIBAR1)
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emu->x86.R_CX = (unsigned long) offset_port + 1;
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else
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@@ -115,7 +115,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
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// bus, devfn
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dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x, value = %x\r\n",
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emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CL);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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pci_write_config_byte(dev, emu->x86.R_DI, emu->x86.R_CL);
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emu->x86.R_AH = SUCCESSFUL;
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emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
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@@ -124,7 +124,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
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case WRITE_CONFIG_WORD:
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// bus, devfn
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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dbg("WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CX);
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if (emu->x86.R_DI == PCIBAR1)
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{
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@@ -142,7 +142,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
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case WRITE_CONFIG_DWORD:
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// bus, devfn
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
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dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
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dbg("WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n",
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emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_ECX);
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if (emu->x86.R_DI == PCIBAR1)
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