From 46b6de88115a5846fb16202727735f05508e6344 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Sat, 13 Oct 2012 21:14:57 +0000 Subject: [PATCH] started link script rewrite - needed lots of symbol changes because leading underscores in symbol names --- BaS_GNU/BaS_GNU/Makefile | 3 + BaS_GNU/BaS_GNU/bas.hex.map | 238 +++++++++++++++++++++++++++ BaS_GNU/BaS_GNU/flash.lk | 86 ++++++++++ BaS_GNU/BaS_GNU/sources/exceptions.S | 60 +++---- BaS_GNU/BaS_GNU/sources/startcf.c | 17 +- BaS_GNU/BaS_GNU/sources/supervisor.S | 12 +- BaS_GNU/BaS_GNU/sources/sysinit.c | 2 +- 7 files changed, 373 insertions(+), 45 deletions(-) create mode 100644 BaS_GNU/BaS_GNU/bas.hex.map create mode 100644 BaS_GNU/BaS_GNU/flash.lk diff --git a/BaS_GNU/BaS_GNU/Makefile b/BaS_GNU/BaS_GNU/Makefile index bc350cc..210d499 100644 --- a/BaS_GNU/BaS_GNU/Makefile +++ b/BaS_GNU/BaS_GNU/Makefile @@ -43,7 +43,10 @@ OBJS=$(COBJS) $(AOBJS) all: $(EXEC) +SADDR=0xe0000000 + $(EXEC): $(OBJS) + $(LD) --oformat srec -Map $@.map --cref -T flash.lk -s -o $@ $(OBJS) echo "generating executable" clean: diff --git a/BaS_GNU/BaS_GNU/bas.hex.map b/BaS_GNU/BaS_GNU/bas.hex.map new file mode 100644 index 0000000..aff34d8 --- /dev/null +++ b/BaS_GNU/BaS_GNU/bas.hex.map @@ -0,0 +1,238 @@ + +Memory Configuration + +Name Origin Length Attributes +code 0xe0000000 0x00200000 xr +*default* 0x00000000 0xffffffff + +Linker script and memory map + + 0x1fe00000 __Bas_base = 0x1fe00000 + 0xe0000000 ___BOOT_FLASH = 0xe0000000 + 0x00800000 ___BOOT_FLASH_SIZE = 0x800000 + 0x00000000 ___SDRAM = 0x0 + 0x20000000 ___SDRAM_SIZE = 0x20000000 + 0x60000000 ___VRAM = 0x60000000 + 0xff000000 ___MBAR = 0xff000000 + 0xff040000 ___MMUBAR = 0xff040000 + 0xff100000 ___RAMBAR0 = 0xff100000 + 0x00001000 ___RAMBAR0_SIZE = 0x1000 + 0xff100ffc ___SUP_SP = ((___RAMBAR0 + ___RAMBAR0_SIZE) - 0x4) + 0xff101000 ___RAMBAR1 = 0xff101000 + 0x00001000 ___RAMBAR1_SIZE = 0x1000 + 0xff100800 _rt_mod = (___RAMBAR0 + 0x800) + 0xff100804 _rt_ssp = (___RAMBAR0 + 0x804) + 0xff100808 _rt_usp = (___RAMBAR0 + 0x808) + 0xff10080c _rt_vbr = (___RAMBAR0 + 0x80c) + 0xff100810 _rt_cacr = (___RAMBAR0 + 0x810) + 0xff100814 _rt_asid = (___RAMBAR0 + 0x814) + 0xff100818 _rt_acr0 = (___RAMBAR0 + 0x818) + 0xff10081c _rt_acr1 = (___RAMBAR0 + 0x81c) + 0xff100820 _rt_acr2 = (___RAMBAR0 + 0x820) + 0xff100824 _rt_acr3 = (___RAMBAR0 + 0x824) + 0xff100828 _rt_mmubar = (___RAMBAR0 + 0x828) + 0xff10082c _rt_sr = (___RAMBAR0 + 0x82c) + 0xff100830 _d0_save = (___RAMBAR0 + 0x830) + 0xff100834 _a7_save = (___RAMBAR0 + 0x834) + 0xff100838 _video_tlb = (___RAMBAR0 + 0x838) + 0xff10083c _video_sbt = (___RAMBAR0 + 0x83c) + 0xff100844 _rt_mbar = (___RAMBAR0 + 0x844) + 0xff010000 __SYS_SRAM = 0xff010000 + 0x00008000 __SYS_SRAM_SIZE = 0x8000 + +.code + +.text 0xe0000000 0x30a0 + objs/startcf.o(.text) + .text 0xe0000000 0x58 objs/startcf.o + 0xe0000000 __startup + objs/sysinit.o(.text) + .text 0xe0000058 0xc4c objs/sysinit.o + 0xe0000058 _init_slt + 0xe000007e _init_gpio + 0xe00000d2 _init_serial + 0xe0000202 _init_ddram + 0xe00002e8 _init_fbcs + 0xe00003aa _init_fpga + 0xe00004bc _wait_pll + 0xe00004d2 _init_pll + 0xe0000570 _init_video_ddr + 0xe0000598 _init_PCI + 0xe0000642 _test_upd720101 + 0xe00006ac _vdi_on + 0xe0000a18 _init_ac97 + 0xe0000c1a ___initialize_hardware + objs/BaS.o(.text) + .text 0xe0000ca4 0x290 objs/BaS.o + 0xe0000ca4 _wait_10ms + 0xe0000cbc _wait_1ms + 0xe0000cd4 _wait_100us + 0xe0000cec _wait_50us + 0xe0000d04 _wait_10us + 0xe0000d1c _wait_1us + 0xe0000d34 _BaS + objs/sd_card.o(.text) + .text 0xe0000f34 0x88 objs/sd_card.o + 0xe0000f34 _sd_com + 0xe0000f5c _sd_get_status + 0xe0000f78 _sd_rcv_info + 0xe0000fb8 _sd_card_idle + objs/mmu.o(.text) + .text 0xe0000fbc 0x1b0 objs/mmu.o + 0xe0000fbc _mmu_init + 0xe0001130 _mmutr_miss + objs/exceptions.o(.text) + .text 0xe000116c 0x9b4 objs/exceptions.o + 0xe000116c _vec_init + objs/supervisor.o(.text) + .text 0xe0001b20 0x5cc objs/supervisor.o + 0xe0001b20 _privileg_violation + 0xe000209e cpusha + objs/ewf.o(.text) + .text 0xe00020ec 0xe40 objs/ewf.o + 0xe00020f2 ewf + objs/illegal_instruction.o(.text) + .text 0xe0002f2c 0x170 objs/illegal_instruction.o + 0xe0003098 _illegal_instruction + 0xe0003098 _illegal_table_make + objs/last.o(.text) + .text 0xe000309c 0x4 objs/last.o + 0xe000309c copy_end + 0xe000309c _copy_end +LOAD objs/startcf.o +LOAD objs/sysinit.o +LOAD objs/BaS.o +LOAD objs/sd_card.o +LOAD objs/last.o +LOAD objs/mmu.o +LOAD objs/exceptions.o +LOAD objs/supervisor.o +LOAD objs/ewf.o +LOAD objs/illegal_instruction.o +OUTPUT(bas.hex srec) + +.data 0x00000000 0x0 + .data 0x00000000 0x0 objs/startcf.o + .data 0x00000000 0x0 objs/sysinit.o + .data 0x00000000 0x0 objs/BaS.o + .data 0x00000000 0x0 objs/sd_card.o + .data 0x00000000 0x0 objs/mmu.o + .data 0x00000000 0x0 objs/exceptions.o + .data 0x00000000 0x0 objs/supervisor.o + .data 0x00000000 0x0 objs/ewf.o + .data 0x00000000 0x0 objs/illegal_instruction.o + .data 0x00000000 0x0 objs/last.o + +.bss 0x00000000 0x0 + .bss 0x00000000 0x0 objs/startcf.o + .bss 0x00000000 0x0 objs/sysinit.o + .bss 0x00000000 0x0 objs/BaS.o + .bss 0x00000000 0x0 objs/sd_card.o + .bss 0x00000000 0x0 objs/mmu.o + .bss 0x00000000 0x0 objs/exceptions.o + .bss 0x00000000 0x0 objs/supervisor.o + .bss 0x00000000 0x0 objs/ewf.o + .bss 0x00000000 0x0 objs/illegal_instruction.o + .bss 0x00000000 0x0 objs/last.o + +Cross Reference Table + +Symbol File +BaS objs/sysinit.o +MCF_MMU_MMUCR objs/startcf.o +_BaS objs/BaS.o +_MCF_PCICR1_CACHELINESIZE objs/sysinit.o +_MCF_PCICR2_MINGNT objs/sysinit.o +__Bas_base objs/sysinit.o +__MBAR objs/exceptions.o +__MMUBAR objs/exceptions.o +__VRAM objs/sysinit.o +___BOOT_FLASH objs/exceptions.o + objs/startcf.o +___Bas_base objs/exceptions.o + objs/BaS.o +___MBAR objs/exceptions.o + objs/sd_card.o + objs/BaS.o + objs/sysinit.o + objs/startcf.o +___MMUBAR objs/mmu.o + objs/BaS.o + objs/startcf.o +___RAMBAR0 objs/exceptions.o + objs/startcf.o +___RAMBAR1 objs/startcf.o +___SUP_SP objs/exceptions.o + objs/startcf.o +___initialize_hardware objs/sysinit.o +__startup objs/startcf.o +_copy_end objs/last.o +_copy_firetos objs/BaS.o +_illegal_instruction objs/illegal_instruction.o + objs/exceptions.o +_illegal_table_make objs/illegal_instruction.o + objs/BaS.o +_init_PCI objs/sysinit.o +_init_ac97 objs/sysinit.o +_init_ddram objs/sysinit.o +_init_fbcs objs/sysinit.o +_init_fpga objs/sysinit.o +_init_gpio objs/sysinit.o +_init_pll objs/sysinit.o +_init_serial objs/sysinit.o +_init_slt objs/sysinit.o +_init_video_ddr objs/sysinit.o +_initialize_hardware objs/startcf.o +_mmu_init objs/mmu.o + objs/BaS.o +_mmutr_miss objs/mmu.o + objs/exceptions.o +_privileg_violation objs/supervisor.o + objs/exceptions.o +_rt_acr0 objs/mmu.o +_rt_acr1 objs/mmu.o +_rt_acr2 objs/mmu.o +_rt_acr3 objs/mmu.o +_rt_asid objs/mmu.o +_rt_cacr objs/supervisor.o + objs/mmu.o +_rt_mbar objs/startcf.o +_rt_mmubar objs/mmu.o +_rt_mod objs/supervisor.o + objs/exceptions.o +_rt_ssp objs/exceptions.o +_rt_usp objs/exceptions.o +_rt_vbr objs/exceptions.o +_sd_card_idle objs/sd_card.o + objs/BaS.o +_sd_card_init objs/BaS.o +_sd_com objs/sd_card.o +_sd_get_status objs/sd_card.o +_sd_rcv_info objs/sd_card.o +_test_upd720101 objs/sysinit.o +_vdi_on objs/sysinit.o +_vec_init objs/exceptions.o + objs/BaS.o +_video_sbt objs/exceptions.o + objs/mmu.o +_video_tlb objs/exceptions.o + objs/mmu.o +_wait1ms objs/sysinit.o +_wait_100us objs/BaS.o +_wait_10ms objs/BaS.o +_wait_10us objs/BaS.o + objs/sysinit.o +_wait_1ms objs/BaS.o +_wait_1us objs/BaS.o +_wait_50us objs/BaS.o + objs/sysinit.o +_wait_pll objs/sysinit.o +_warte10us objs/sysinit.o +copy_end objs/last.o + objs/sysinit.o +cpusha objs/supervisor.o + objs/exceptions.o + objs/mmu.o +ewf objs/ewf.o + objs/illegal_instruction.o +rt_cacr objs/sysinit.o diff --git a/BaS_GNU/BaS_GNU/flash.lk b/BaS_GNU/BaS_GNU/flash.lk new file mode 100644 index 0000000..5938ddf --- /dev/null +++ b/BaS_GNU/BaS_GNU/flash.lk @@ -0,0 +1,86 @@ +MEMORY { + code (RX) : ORIGIN = 0xE0000000, LENGTH = 0x00200000 +} + +SECTIONS { + __Bas_base = 0x1FE00000; + + /* Board Memory map definitions from linker command files: + * __SDRAM,__SDRAM_SIZE, __CODE_FLASH, __CODE_FLASH_SIZE + * linker symbols must be defined in the linker command file. + */ + + /* Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes) */ + ___BOOT_FLASH = ABSOLUTE(0xE0000000); + ___BOOT_FLASH_SIZE = ABSOLUTE(0x00800000); + /* SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes */ + ___SDRAM = ABSOLUTE(0x00000000); + ___SDRAM_SIZE = ABSOLUTE(0x20000000); + + /* VIDEO RAM BASIS */ + ___VRAM = ABSOLUTE(0x60000000); + + /* + * MCF5475 Derivative Memory map definitions from linker command files: + * __MBAR, __MMUBAR, __RAMBAR0, __RAMBAR0_SIZE, __RAMBAR1, __RAMBAR1_SIZE + * linker symbols must be defined in the linker command file. + */ + + /* Memory mapped registers */ + ___MBAR = ABSOLUTE(0xFF000000); + ___MMUBAR = ABSOLUTE(0xFF040000); + + /* + * 4KB on-chip Core SRAM0: -> exception table and exception stack + */ + ___RAMBAR0 = ABSOLUTE(0xFF100000); + ___RAMBAR0_SIZE = ABSOLUTE(0x00001000); + + ___SUP_SP = ___RAMBAR0 + ___RAMBAR0_SIZE - 4; + + /* 4KB on-chip Core SRAM1: -> modified code */ + ___RAMBAR1 = ABSOLUTE(0xFF101000); + ___RAMBAR1_SIZE = ABSOLUTE(0x00001000); + + /* Systemveriablem:****************************************** */ + /* RAMBAR0 0 bis 0x7FF -> exception vectoren */ + _rt_mod = ___RAMBAR0 + 0x800; + _rt_ssp = ___RAMBAR0 + 0x804; + _rt_usp = ___RAMBAR0 + 0x808; + _rt_vbr = ___RAMBAR0 + 0x80C; /* (8)01 */ + _rt_cacr = ___RAMBAR0 + 0x810; /* 002 */ + _rt_asid = ___RAMBAR0 + 0x814; /* 003 */ + _rt_acr0 = ___RAMBAR0 + 0x818; /* 004 */ + _rt_acr1 = ___RAMBAR0 + 0x81c; /* 005 */ + _rt_acr2 = ___RAMBAR0 + 0x820; /* 006 */ + _rt_acr3 = ___RAMBAR0 + 0x824; /* 007 */ + _rt_mmubar = ___RAMBAR0 + 0x828; /* 008 */ + _rt_sr = ___RAMBAR0 + 0x82c; + _d0_save = ___RAMBAR0 + 0x830; + _a7_save = ___RAMBAR0 + 0x834; + _video_tlb = ___RAMBAR0 + 0x838; + _video_sbt = ___RAMBAR0 + 0x83C; + _rt_mbar = ___RAMBAR0 + 0x844; /* (c)0f */ + +/**********************************************************/ + +/* 32KB on-chip System SRAM */ + __SYS_SRAM = 0xFF010000; + __SYS_SRAM_SIZE = 0x00008000; + + .code : {} > code + + .text : + { + objs/startcf.o(.text) + objs/sysinit.o(.text) + objs/BaS.o(.text) + objs/sd_card.o(.text) + objs/mmu.o(.text) + objs/exceptions.o(.text) + objs/supervisor.o(.text) + objs/ewf.o(.text) + objs/illegal_instruction.o(.text) + objs/last.o(.text) + } > code +} \ No newline at end of file diff --git a/BaS_GNU/BaS_GNU/sources/exceptions.S b/BaS_GNU/BaS_GNU/sources/exceptions.S index 9c2120a..0997fd2 100644 --- a/BaS_GNU/BaS_GNU/sources/exceptions.S +++ b/BaS_GNU/BaS_GNU/sources/exceptions.S @@ -4,10 +4,10 @@ #include "startcf.h" -.extern ___Bas_base -.extern ___SUP_SP -.extern ___BOOT_FLASH -.extern ___RAMBAR0 +.extern __Bas_base +.extern __SUP_SP +.extern __BOOT_FLASH +.extern __RAMBAR0 .extern _rt_cacr .extern _rt_mod .extern _rt_ssp @@ -16,44 +16,44 @@ .extern _illegal_instruction .extern _privileg_violation .extern _mmutr_miss -.extern ___MBAR -.extern ___MMUBAR +.extern __MBAR +.extern __MMUBAR .extern _video_tlb .extern _video_sbt .extern cpusha /* Register read/write macros */ -#define MCF_MMU_MMUCR ___MMUBAR -#define MCF_MMU_MMUOR ___MMUBAR+0x04 -#define MCF_MMU_MMUSR ___MMUBAR+0x08 -#define MCF_MMU_MMUAR ___MMUBAR+0x10 -#define MCF_MMU_MMUTR ___MMUBAR+0x14 -#define MCF_MMU_MMUDR ___MMUBAR+0x18 +#define MCF_MMU_MMUCR __MMUBAR +#define MCF_MMU_MMUOR __MMUBAR+0x04 +#define MCF_MMU_MMUSR __MMUBAR+0x08 +#define MCF_MMU_MMUAR __MMUBAR+0x10 +#define MCF_MMU_MMUTR __MMUBAR+0x14 +#define MCF_MMU_MMUDR __MMUBAR+0x18 -#define MCF_EPORT_EPPAR ___MBAR+0xF00 -#define MCF_EPORT_EPDDR ___MBAR+0xF04 -#define MCF_EPORT_EPIER ___MBAR+0xF05 -#define MCF_EPORT_EPDR ___MBAR+0xF08 -#define MCF_EPORT_EPPDR ___MBAR+0xF09 -#define MCF_EPORT_EPFR ___MBAR+0xF0C +#define MCF_EPORT_EPPAR __MBAR+0xF00 +#define MCF_EPORT_EPDDR __MBAR+0xF04 +#define MCF_EPORT_EPIER __MBAR+0xF05 +#define MCF_EPORT_EPDR __MBAR+0xF08 +#define MCF_EPORT_EPPDR __MBAR+0xF09 +#define MCF_EPORT_EPFR __MBAR+0xF0C -#define MCF_GPIO_PODR_FEC1L ___MBAR+0xA07 +#define MCF_GPIO_PODR_FEC1L __MBAR+0xA07 -#define MCF_PSC0_PSCTB_8BIT ___MBAR+0x860C +#define MCF_PSC0_PSCTB_8BIT __MBAR+0x860C -#define MCF_PSC3_PSCRB_8BIT ___MBAR+0x890C -#define MCF_PSC3_PSCTB_8BIT ___MBAR+0x890C +#define MCF_PSC3_PSCRB_8BIT __MBAR+0x890C +#define MCF_PSC3_PSCTB_8BIT __MBAR+0x890C .global _vec_init //mmu --------------------------------------------------- /* Register read/write macros */ -#define MCF_MMU_MMUCR ___MMUBAR -#define MCF_MMU_MMUOR ___MMUBAR+0x04 -#define MCF_MMU_MMUSR ___MMUBAR+0x08 -#define MCF_MMU_MMUAR ___MMUBAR+0x10 -#define MCF_MMU_MMUTR ___MMUBAR+0x14 -#define MCF_MMU_MMUDR ___MMUBAR+0x18 +#define MCF_MMU_MMUCR __MMUBAR +#define MCF_MMU_MMUOR __MMUBAR+0x04 +#define MCF_MMU_MMUSR __MMUBAR+0x08 +#define MCF_MMU_MMUAR __MMUBAR+0x10 +#define MCF_MMU_MMUTR __MMUBAR+0x14 +#define MCF_MMU_MMUDR __MMUBAR+0x18 /* Bit definitions and macros for MCF_MMU_MMUCR */ @@ -111,7 +111,7 @@ *********************************************************************/ /* Register read/write macros */ -#define MCF_GPT0_GMS ___MBAR+0x800 +#define MCF_GPT0_GMS __MBAR+0x800 /********************************************************************* * @@ -119,7 +119,7 @@ * *********************************************************************/ -#define MCF_SLT0_SCNT ___MBAR+0x908 +#define MCF_SLT0_SCNT __MBAR+0x908 /**********************************************************/ // macros diff --git a/BaS_GNU/BaS_GNU/sources/startcf.c b/BaS_GNU/BaS_GNU/sources/startcf.c index 916295c..1fef820 100644 --- a/BaS_GNU/BaS_GNU/sources/startcf.c +++ b/BaS_GNU/BaS_GNU/sources/startcf.c @@ -3,33 +3,34 @@ void _startup(void) { asm("\n\t" + ".extern _initialize_hardware\n\t" "bra warmstart\n\t" - "jmp __BOOT_FLASH + 8 | ist zugleich reset vector\n\t" + "jmp ___BOOT_FLASH + 8 | ist zugleich reset vector\n\t" "| disable interrupts\n\t" "warmstart:\n\t" "| disable interrupts\n\t" "move.w #0x2700,sr\n\t" "|// Initialize MBAR\n\t" - "MOVE.L #__MBAR,D0\n\t" + "MOVE.L #___MBAR,D0\n\t" "MOVEC D0,MBAR\n\t" - "MOVE.L D0,rt_mbar\n\t" + "MOVE.L D0,_rt_mbar\n\t" "| mmu off\n\t" - "move.l #__MMUBAR+1,d0\n\t" + "move.l #___MMUBAR+1,d0\n\t" "movec d0,MMUBAR | mmubar setzen\n\t" "clr.l d0\n\t" "move.l d0,MCF_MMU_MMUCR\n\t | mmu off" "|/* Initialize RAMBARs: locate SRAM and validate it */\n\t" - "move.l #__RAMBAR0 + 0x7,d0\n\t | supervisor only" + "move.l #___RAMBAR0 + 0x7,d0\n\t | supervisor only" "movec d0,RAMBAR0\n\t" - "move.l #__RAMBAR1 + 0x1,d0\n\t""" + "move.l #___RAMBAR1 + 0x1,d0\n\t""" "movec d0,RAMBAR1\n\t" "| STACKPOINTER AUF ENDE SRAM1\n\t" - "lea __SUP_SP,a7\n\t" + "lea ___SUP_SP,a7\n\t" "| instruction cache on\n\t" "move.l #0x000C8100,d0\n\t" "movec d0,cacr\n\t" "nop\n\t" "| initialize any hardware specific issues\n\t" - "bra __initialize_hardware\n\t" + "bra _initialize_hardware\n\t" ); } diff --git a/BaS_GNU/BaS_GNU/sources/supervisor.S b/BaS_GNU/BaS_GNU/sources/supervisor.S index c9520c9..5e20f85 100644 --- a/BaS_GNU/BaS_GNU/sources/supervisor.S +++ b/BaS_GNU/BaS_GNU/sources/supervisor.S @@ -11,12 +11,12 @@ .extern ___MMUBAR /* Register read/write macros */ -#define MCF_MMU_MMUCR ___MMUBAR -#define MCF_MMU_MMUOR ___MMUBAR+0x04 -#define MCF_MMU_MMUSR ___MMUBAR+0x08 -#define MCF_MMU_MMUAR ___MMUBAR+0x10 -#define MCF_MMU_MMUTR ___MMUBAR+0x14 -#define MCF_MMU_MMUDR ___MMUBAR+0x18 +#define MCF_MMU_MMUCR __MMUBAR +#define MCF_MMU_MMUOR __MMUBAR+0x04 +#define MCF_MMU_MMUSR __MMUBAR+0x08 +#define MCF_MMU_MMUAR __MMUBAR+0x10 +#define MCF_MMU_MMUTR __MMUBAR+0x14 +#define MCF_MMU_MMUDR __MMUBAR+0x18 .global _privileg_violation .global cpusha diff --git a/BaS_GNU/BaS_GNU/sources/sysinit.c b/BaS_GNU/BaS_GNU/sources/sysinit.c index 062f069..c5020d2 100644 --- a/BaS_GNU/BaS_GNU/sources/sysinit.c +++ b/BaS_GNU/BaS_GNU/sources/sysinit.c @@ -14,7 +14,7 @@ static const uint8_t *FPGA_FLASH_DATA = (uint8_t *) 0xe0700000L; static const uint8_t *FPGA_FLASH_DATA_END = (uint8_t *) 0xe0800000L; -extern unsigned long _VRAM; +extern unsigned long __VRAM; extern unsigned long _Bas_base; extern unsigned long BaS; extern unsigned long _BOOT_FLASH[];