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fixed some (minor) warnings

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This commit is contained in:
Markus Fröschle
2013-04-17 05:24:57 +00:00
parent a3c31dff28
commit 460bfeaa8f
3 changed files with 171 additions and 151 deletions
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13
i2cspi_BaS_gcc/include/fifo.h
View File

@@ -12,18 +12,19 @@
#include <inttypes.h>
typedef struct {
typedef struct
{
char * buf;
int head;
int tail;
int size;
} fifo_t;
void fifo_init(fifo_t*,char*,int);
void fifo_advance(fifo_t*,int*);
void fifo_init(fifo_t*, char*, int);
void fifo_advance(fifo_t*, int*);
uint8_t fifo_get(fifo_t*);
void fifo_put(fifo_t*,uint8_t);
void fifo_put(fifo_t*, uint8_t);
void fifo_clear(fifo_t*);
@@ -33,7 +34,7 @@ int fifo_unused(fifo_t*);
int fifo_full(fifo_t*);
int fifo_empty(fifo_t*);
int fifo_read(fifo_t*,char *,int);
int fifo_write(fifo_t*,const char*,int);
int fifo_read(fifo_t*, unsigned char *, int);
int fifo_write(fifo_t*, const unsigned char*, int);
#endif

4
i2cspi_BaS_gcc/sources/fifo.c
View File

@@ -79,7 +79,7 @@ void fifo_advance(fifo_t *f, int *ix)
//This reads at most nbytes bytes from the FIFO
//The number of bytes read is returned
int fifo_read(fifo_t *f, char *buf, int nbytes){
int fifo_read(fifo_t *f, unsigned char *buf, int nbytes){
int n = 0;
while( n < nbytes && !fifo_empty(f) )
@@ -95,7 +95,7 @@ int fifo_read(fifo_t *f, char *buf, int nbytes){
//This writes up to nbytes bytes to the FIFO
//If the head runs in to the tail, not all bytes are written
//The number of bytes written is returned
int fifo_write(fifo_t *f, const char *buf, int nbytes){
int fifo_write(fifo_t *f, const unsigned char *buf, int nbytes){
int n = 0;
while( n < nbytes && !fifo_full(f) )

133
i2cspi_BaS_gcc/sources/i2c_firebee.c
View File

@@ -8,7 +8,8 @@
#include <fifo.h>
static struct {
static struct
{
uint8_t state;
long delay;
uint16_t len;
@@ -32,76 +33,91 @@ void I2C_Init()
{
i2c_param.fifo.buf = local_buf;
i2c_param.fifo.size = BUFSIZ;
i2c_param.delay = 133*10L; // We can safely ignore this
i2c_param.delay = 133 * 10L; // We can safely ignore this
i2c_param.len = 0;
I2C_ioctl(0,0);
I2C_ioctl(0, 0);
}
void __attribute__ ((interrupt)) I2C_InterruptHandler(void)
{
char ch;
clear_bit(MCF_I2C_I2SR,MCF_I2C_I2SR_IIF);
if( MCF_I2C_I2CR & MCF_I2C_I2CR_MSTA )
clear_bit(MCF_I2C_I2SR, MCF_I2C_I2SR_IIF);
if (MCF_I2C_I2CR & MCF_I2C_I2CR_MSTA)
{ // Masters of the known universe
if( MCF_I2C_I2SR & MCF_I2C_I2SR_ICF )
if (MCF_I2C_I2SR & MCF_I2C_I2SR_ICF)
{
switch( i2c_param.state )
switch (i2c_param.state)
{
case I2C_MXRX:
if( fifo_used(&i2c_param.fifo)+1 == i2c_param.len ) {
clear_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_MSTA);
i2c_param.state = I2C_READY;
} else if( fifo_used(&i2c_param.fifo)+2 == i2c_param.len ) {
set_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_TXAK);
if (fifo_used(&i2c_param.fifo) + 1 == i2c_param.len)
{
clear_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_MSTA);
i2c_param.state = I2C_READY;
}
fifo_put(&i2c_param.fifo,MCF_I2C_I2DR);
else if (fifo_used(&i2c_param.fifo) + 2 == i2c_param.len)
{
set_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_TXAK);
i2c_param.state = I2C_READY;
}
fifo_put(&i2c_param.fifo, MCF_I2C_I2DR );
break;
case I2C_ADDR:
if( fifo_empty(&i2c_param.fifo) )
if (fifo_empty(&i2c_param.fifo))
{
i2c_param.state = I2C_MXRX;
clear_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_MTX); // Receive mode
set_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_RSTA);
clear_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_MTX); // Receive mode
set_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_RSTA);
ch = MCF_I2C_I2DR; // Dummy read
break;
}
case I2C_MXTX:
if( fifo_empty(&i2c_param.fifo) || (MCF_I2C_I2SR&MCF_I2C_I2SR_RXAK) ) {
clear_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_MSTA);
if (fifo_empty(&i2c_param.fifo)
|| (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK))
{
clear_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_MSTA);
i2c_param.state = I2C_READY;
} else
}
else
MCF_I2C_I2DR = fifo_get(&i2c_param.fifo);
break;
}
}
} else { // Slave mode.
}
else
{ // Slave mode.
int set;
if( set = (MCF_I2C_I2SR & MCF_I2C_I2SR_IAL) )
clear_bit(MCF_I2C_I2SR,MCF_I2C_I2SR_IAL);
if( MCF_I2C_I2SR & MCF_I2C_I2SR_IAAS )
if ((set = (MCF_I2C_I2SR & MCF_I2C_I2SR_IAL)))
clear_bit(MCF_I2C_I2SR, MCF_I2C_I2SR_IAL);
if (MCF_I2C_I2SR & MCF_I2C_I2SR_IAAS)
{
if( MCF_I2C_I2SR & MCF_I2C_I2SR_SRW )
if (MCF_I2C_I2SR & MCF_I2C_I2SR_SRW)
{
set_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_MTX);
fifo_put(&i2c_param.fifo,MCF_I2C_I2DR);
} else {
clear_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_MTX);
set_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_MTX);
fifo_put(&i2c_param.fifo, MCF_I2C_I2DR );
}
else
{
clear_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_MTX);
ch = MCF_I2C_I2DR;
}
} else if( !set ) {
if( MCF_I2C_I2CR&MCF_I2C_I2CR_MTX )
}
else if (!set)
{
if( MCF_I2C_I2SR&MCF_I2C_I2SR_RXAK )
if (MCF_I2C_I2CR & MCF_I2C_I2CR_MTX)
{
if (MCF_I2C_I2SR & MCF_I2C_I2SR_RXAK)
MCF_I2C_I2DR = fifo_get(&i2c_param.fifo);
else {
clear_bit(MCF_I2C_I2CR,MCF_I2C_I2CR_MTX);
else
{
clear_bit(MCF_I2C_I2CR, MCF_I2C_I2CR_MTX);
ch = MCF_I2C_I2DR;
}
} else {
fifo_put(&i2c_param.fifo,MCF_I2C_I2DR);
}
else
{
fifo_put(&i2c_param.fifo, MCF_I2C_I2DR );
}
}
}
@@ -109,32 +125,34 @@ void __attribute__ ((interrupt)) I2C_InterruptHandler(void)
void I2C_send(unsigned short device, unsigned char *buf, unsigned short len)
{
if( len > i2c_param.fifo.size )
if (len > i2c_param.fifo.size)
return;
i2c_param.len = len;
fifo_clear(&i2c_param.fifo);
if( device > 127 ) // Use I2C 10 bit address
if (device > 127) // Use I2C 10 bit address
{
fifo_put(FIFO,0b11110|((device>>5)&6)|I2C_WRITE);
fifo_put(FIFO,device&255);
} else
fifo_put(FIFO,((device<<1)&0xFE)|I2C_WRITE);
fifo_write(FIFO,buf,len);
fifo_put(FIFO, 0b11110 | ((device >> 5) & 6) | I2C_WRITE);
fifo_put(FIFO, device & 255);
}
else
fifo_put(FIFO, ((device << 1) & 0xFE) | I2C_WRITE);
fifo_write(FIFO, buf, len);
i2c_param.state = I2C_MXTX;
}
void I2C_receive(unsigned short device, unsigned char *buf, unsigned short len)
{
if( len > i2c_param.fifo.size )
if (len > i2c_param.fifo.size)
return;
i2c_param.len = len;
fifo_clear(FIFO);
if( device > 127 ) // Use I2C 10 bit address
if (device > 127) // Use I2C 10 bit address
{
fifo_put(FIFO,0b11110|((device>>5)&6)|I2C_READ);
fifo_put(FIFO,device&255);
} else
fifo_put(FIFO,((device<<1)&0xFE)|I2C_READ);
fifo_put(FIFO, 0b11110 | ((device >> 5) & 6) | I2C_READ);
fifo_put(FIFO, device & 255);
}
else
fifo_put(FIFO, ((device << 1) & 0xFE) | I2C_READ);
i2c_param.state = I2C_ADDR;
}
@@ -144,7 +162,7 @@ int I2C_ioctl(unsigned int index, unsigned long val)
uint8_t temp;
// Set device as slave or
switch( index )
switch (index)
{
case I2CTLINIT: // make me master
/* set the frequency near 400KHz */
@@ -152,33 +170,34 @@ int I2C_ioctl(unsigned int index, unsigned long val)
/* start the module */
MCF_I2C_I2CR = MCF_I2C_I2CR_IIEN | MCF_I2C_I2CR_IEN;
/* if bit busy set, send a stop condition to slave module */
if(MCF_I2C_I2SR & MCF_I2C_I2SR_IBB)
if (MCF_I2C_I2SR & MCF_I2C_I2SR_IBB)
{
MCF_I2C_I2CR = 0; /* clear control register */
MCF_I2C_I2CR = MCF_I2C_I2CR_IIEN|MCF_I2C_I2CR_IEN|MCF_I2C_I2CR_MSTA; /* enable module & send a START condition */
MCF_I2C_I2CR = MCF_I2C_I2CR_IIEN | MCF_I2C_I2CR_IEN
| MCF_I2C_I2CR_MSTA; /* enable module & send a START condition */
temp = MCF_I2C_I2DR; /* dummy read */
MCF_I2C_I2SR = 0; /* clear status register */
MCF_I2C_I2CR = 0; /* clear control register */
MCF_I2C_I2CR = MCF_I2C_I2CR_IIEN|MCF_I2C_I2CR_IEN; /* enable the module again */
MCF_I2C_I2CR = MCF_I2C_I2CR_IIEN | MCF_I2C_I2CR_IEN; /* enable the module again */
}
i2c_param.state = I2C_READY;
i2c_param._buf = 0;
break;
case I2CTLSBUF:
i2c_param._buf = (char *)val;
i2c_param._buf = (unsigned char *) val;
break;
case I2CTLDEV:
i2c_param.device = val;
break;
case I2CTLREAD:
if( i2c_param._buf == 0 || i2c_param.device == 0 )
if (i2c_param._buf == 0 || i2c_param.device == 0)
return -1;
I2C_receive(i2c_param.device,i2c_param._buf,len);
I2C_receive(i2c_param.device, i2c_param._buf, len);
break;
case I2CTLWRITE:
if( i2c_param._buf == 0 || i2c_param.device == 0 )
if (i2c_param._buf == 0 || i2c_param.device == 0)
return -1;
I2C_send(i2c_param.device,i2c_param._buf,len);
I2C_send(i2c_param.device, i2c_param._buf, len);
break;
}
}