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added interface structure to make the MCD DMA available to MiNT (DMAC cookie). MinT's FEC driver works somewhat, but not reliable yet.

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Markus Fröschle
2014-01-01 21:28:17 +00:00
parent 8424a836a1
commit 40c89dd900
15 changed files with 589 additions and 625 deletions
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6
BaS_gcc/include/interrupts.h
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@@ -78,14 +78,12 @@
#define INT_SOURCE_GPT1 61 // GPT1 timer interrupt
#define INT_SOURCE_GPT0 62 // GPT0 timer interrupt
#define DMA_INTC_LVL 6 /* interrupt level for DMA interrupt */
#define DMA_INTC_PRI 0 /* interrupt priority for DMA interrupt */
#define FEC0_INTC_LVL 5 /* interrupt level for FEC0 */
#define FEC0_INTC_PRI 0 /* interrupt priority for FEC0 */
#define FEC0_INTC_PRI 7 /* interrupt priority for FEC0 */
#define FEC1_INTC_LVL 5 /* interrupt level for FEC1 */
#define FEC1_INTC_PRI 1 /* interrupt priority for FEC1 */
#define FEC1_INTC_PRI 7 /* interrupt priority for FEC1 */
#define FEC_INTC_LVL(x) ((x == 0) ? FEC0_INTC_LVL : FEC1_INTC_LVL)
#define FEC_INTC_PRI(x) ((x == 0) ? FEC0_INTC_PRI : FEC1_INTC_PRI)