USB controller detected on FireBee - needs a long wait time for config access there...

2013-11-09 08:33:26 +00:00
parent 4d27bb6f20
commit 3d711e37f2
7 changed files with 34 additions and 21 deletions
--- a/BaS_gcc/.gdbinit
+++ b/BaS_gcc/.gdbinit
@@ -1,7 +1,7 @@
 #set disassemble-next-line on
 define tr
 	# target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
-	target remote | m68k-bdm-gdbserver pipe /dev/bdmcf3
+	target remote | m68k-bdm-gdbserver pipe /dev/tblcf3
 	monitor bdm-reset
 end
 define tbtr
--- a/BaS_gcc/bas_m5484.bdm
+++ b/BaS_gcc/bas_m5484.bdm
@@ -52,4 +52,4 @@ load -v m5484lite/ram.elf
 execute
 # wait is _needed_ here if using the P&E BDM interface. Otherwise 
 # the Coldfire resets after some time!
-#wait
+wait
--- a/BaS_gcc/sources/ehci-hcd.c
+++ b/BaS_gcc/sources/ehci-hcd.c
@@ -270,7 +270,7 @@ static int ehci_reset(void)
 	uint32_t *reg_ptr;
 	int ret = 0;
 	if ((gehci.ent->vendor == PCI_VENDOR_ID_NEC)
-	 && (gehci.ent->device == PCI_DEVICE_ID_NEC_USB_2))
+				&& (gehci.ent->device == PCI_DEVICE_ID_NEC_USB_2))
 	{
 		debug("ehci_reset set 48MHz clock\r\n");
 	 	pci_write_config_longword(gehci.handle, 0xE4, 0x20); // oscillator
--- a/BaS_gcc/sources/mmu.S
+++ b/BaS_gcc/sources/mmu.S
@@ -203,9 +203,10 @@ _mmu_init:
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d2,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
 		move.l	d3,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
-#elif MACHINE_M5484LITE
+#endif
+
 //
-// Instead, we lock PCI address space. Uncached, precise. For now, only for the M5484LITE
+// We lock PCI address space. Uncached, precise.
 //
 		move.l	#0x80000000|std_mmutr,d0
 		move.l	#0x80000000|nocache_precise_mmudr|MCF_MMU_MMUDR_LK,d1
@@ -213,7 +214,6 @@ _mmu_init:
 		move.l	d1,MCF_MMU_MMUDR
 		move.l	d2,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
 		move.l	d3,MCF_MMU_MMUOR						// mapped to ffffxxx, precise,
-#endif /* MACHINE_FIREBEE */

 // maps (locked) the last MB (this is where BaS .data and .bss resides) of physical SDRAM to the same physical address
 		move.l	#(SDRAM_START + SDRAM_SIZE - 0x100000) | std_mmutr, d0	
--- a/BaS_gcc/sources/pci.c
+++ b/BaS_gcc/sources/pci.c
@@ -32,6 +32,8 @@
 #include "util.h"
 #include "wait.h"

+#define pci_config_wait()	wait(10000);	/* FireBee USB not properly detected otherwise */
+
 /*
 * PCI device class descriptions displayed during PCI bus scan
 */
@@ -123,11 +125,15 @@ uint32_t pci_read_config_longword(int32_t handle, int offset)
 			MCF_PCI_PCICAR_FUNCNUM(function) |	/* function number */
 			MCF_PCI_PCICAR_DWORD(offset / 4);
 	
+	pci_config_wait();
+
 	value =  * (volatile uint32_t *) PCI_IO_OFFSET;	/* access device */

 	/* finish PCI configuration access special cycle (allow regular PCI accesses) */
 	MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;

+	pci_config_wait();
+
 	return value;
 }

@@ -165,10 +171,15 @@ int32_t pci_write_config_longword(int32_t handle, int offset, uint32_t value)
 			MCF_PCI_PCICAR_FUNCNUM(function) |		/* function number */
 			MCF_PCI_PCICAR_DWORD(offset / 4);

+	pci_config_wait();
+
 	* (volatile uint32_t *) PCI_IO_OFFSET = value;	/* access device */

+	pci_config_wait();
+
 	/* finish configuration space access cycle */
 	MCF_PCI_PCICAR &= ~MCF_PCI_PCICAR_E;
+	pci_config_wait();

 	return PCI_SUCCESSFUL;
 }
@@ -202,9 +213,9 @@ int32_t pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
 	uint16_t n = 0;
 	int32_t handle;

-	for (bus = 0; bus < 255; bus++)
+	for (bus = 0; bus < 2; bus++)
 	{
-		for (device = 10; device < 32; device++)
+		for (device = 10; device < 31; device++)
 		{
 			uint32_t value;
 			uint8_t htr;
@@ -402,20 +413,21 @@ void pci_scan(void)
 	int16_t index = 0;

 	xprintf("\r\nPCI bus scan...\r\n\r\n");
-	xprintf(" Bus| Dev|Func|Vndr|D-ID|\r\n");
-	xprintf("----+----+----+----+----|\r\n");
+	xprintf(" Bus| Dev|Func|Vndr|D-ID|Hndl|\r\n");
+	xprintf("----+----+----+----+----+----+\r\n");

 	handle = pci_find_device(0x0, 0xFFFF, index);
-	while (handle != PCI_DEVICE_NOT_FOUND)
+	while (handle > 0)
 	{
 		uint32_t value;

-		value = swpl(pci_read_config_longword(handle, PCIIDR));
-		xprintf(" %02x | %02x | %02x |%04x|%04x| %s (0x%02x)\r\n",
+		value = pci_read_config_longword(handle, PCIIDR);
+		xprintf(" %02x | %02x | %02x |%04x|%04x|%04x| %s (0x%02x)\r\n",
 				PCI_BUS_FROM_HANDLE(handle),
 				PCI_DEVICE_FROM_HANDLE(handle),
 				PCI_FUNCTION_FROM_HANDLE(handle),
 				PCI_VENDOR_ID(value), PCI_DEVICE_ID(value),
+				handle,
 				device_class(pci_read_config_byte(handle, PCICCR)),
 				pci_read_config_byte(handle, PCICCR));

@@ -477,6 +489,9 @@ void init_pci(void)

 	xprintf("initializing PCI bridge:");

+	init_eport();
+	init_xlbus_arbiter();
+
 	MCF_PCIARB_PACR = MCF_PCIARB_PACR_INTMPRI
       + MCF_PCIARB_PACR_EXTMPRI(0x1F)
       + MCF_PCIARB_PACR_INTMINTEN
@@ -537,7 +552,7 @@ void init_pci(void)
 	/* initialize handles array */
 	memset(handles, 0, NUM_CARDS * sizeof(uint16_t));

-#if MACHINE_FIREBEE
+#if _NOT_USED_
 	/*
 	 * experimental: leave "old" USB initialization in place for the FireBee USB controller
 	 * which seems to be found on second access only with the new PCI scan routines
@@ -568,7 +583,7 @@ void init_pci(void)
 			MCF_PCI_PCICAR_FUNCNUM(0) +
 			MCF_PCI_PCICAR_DWORD(57);
 	}
-#endif /* MACHINE_FIREBEE */
+#endif /* _NOT_USED_ */

 	/*
 	 * do normal initialization
--- a/BaS_gcc/sources/sysinit.c
+++ b/BaS_gcc/sources/sysinit.c
@@ -517,7 +517,7 @@ void init_usb(void)

 	do
 	{
-		handle = pci_find_device(0x0000, 0xffffL, index++);
+		handle = pci_find_device(0x0000, 0xffff, index++);
 		if (handle > 0)
 		{
 			uint32_t id = 0;
@@ -553,7 +553,7 @@ void init_usb(void)
 					board = ohci_usb_pci_table;
 					while (board->vendor)
 					{
-						if ((board->vendor == (id & 0xffff)) && board->device == PCI_DEVICE_ID(id))
+						if ((board->vendor == PCI_VENDOR_ID(id)) && board->device == PCI_DEVICE_ID(id))
 						{
 							if (usb_init(handle, board) >= 0)
 								usb_found++;
@@ -1030,8 +1030,6 @@ void initialize_hardware(void)
 	dvi_on();
 #endif /* MACHINE_FIREBEE */
 	init_pci();
-	init_eport();
-	init_xlbus_arbiter();
 	/* moved the following line (temporarily) to BaS (after MMU init) to be able to catch adressing errors on USB init */
 	//init_usb();
 #if MACHINE_FIREBEE
--- a/BaS_gcc/sources/usb.c
+++ b/BaS_gcc/sources/usb.c
@@ -160,11 +160,11 @@ int usb_init(int32_t handle, const struct pci_device_id *ent)
 			xprintf("sorry, no uhci driver available\r\n");
 			break;
 		case PCI_CLASS_SERIAL_USB_OHCI:
-			xprintf("initialize ohci interface, ");
+			xprintf("initialize ohci interface\r\n");
 			res = ohci_usb_lowlevel_init(handle, ent, &priv);
 			break;
 		case PCI_CLASS_SERIAL_USB_EHCI:
-			xprintf("initialize ehci interface, ");
+			xprintf("initialize ehci interface\r\n");
 			res = ehci_usb_lowlevel_init(handle, ent, &priv);
 			break;
 		default: res = -1; break;