modified register constraints
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@@ -17,8 +17,8 @@ inline uint32_t set_ipl(uint32_t ipl)
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" move.w d0,sr\n\t" /* put it in place */
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" andi.l #0x0700,%[ret]\r\n" /* mask out ipl bits */
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" lsr.l #8,%[ret]\r\n" /* shift them to position */
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: [ret] "+g" (ret) /* output */
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: [ipl] "r" (ipl) /* input */
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: [ret] "+d" (ret) /* output */
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: [ipl] "d" (ipl) /* input */
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: "d0" /* clobber */
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);
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