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code compiles - not tested yet

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This commit is contained in:
Markus Fröschle
2013-11-03 07:07:43 +00:00
parent 07e730cf9d
commit 3689373d8d
8 changed files with 335 additions and 516 deletions
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2
BaS_gcc/Makefile
View File

@@ -198,7 +198,7 @@ $(foreach DIR,$(TRGTDIRS),$(eval $(call EX_TEMPLATE,$(DIR))))
depend: $(ASRCS) $(CSRCS)
- rm -f depend
for d in $(TRGTDIRS)\
for d in $(TRGTDIRS);\
do $(CC) $(CFLAGS) $(INCLUDE) -M $(ASRCS) $(CSRCS) | sed -e "s#^\(.*\).o:#$$d/objs/\1.o:#" >> depend; \
done

106
BaS_gcc/include/ohci.h
View File

@@ -72,24 +72,24 @@ static const char *cc_to_string[16] = {
/* usb_ohci_ed */
struct ed {
__u32 hwINFO;
__u32 hwTailP;
__u32 hwHeadP;
__u32 hwNextED;
uint32_t hwINFO;
uint32_t hwTailP;
uint32_t hwHeadP;
uint32_t hwNextED;
struct ed *ed_prev;
__u8 int_period;
__u8 int_branch;
__u8 int_load;
__u8 int_interval;
__u8 state;
__u8 type;
__u16 last_iso;
uint8_t int_period;
uint8_t int_branch;
uint8_t int_load;
uint8_t int_interval;
uint8_t state;
uint8_t type;
uint16_t last_iso;
struct ed *ed_rm_list;
struct usb_device *usb_dev;
void *purb;
__u32 unused[2];
uint32_t unused[2];
} __attribute__((aligned(16)));
typedef struct ed ed_t;
@@ -133,21 +133,21 @@ typedef struct ed ed_t;
#define MAXPSW 1
struct td {
__u32 hwINFO;
__u32 hwCBP; /* Current Buffer Pointer */
__u32 hwNextTD; /* Next TD Pointer */
__u32 hwBE; /* Memory Buffer End Pointer */
uint32_t hwINFO;
uint32_t hwCBP; /* Current Buffer Pointer */
uint32_t hwNextTD; /* Next TD Pointer */
uint32_t hwBE; /* Memory Buffer End Pointer */
__u16 hwPSW[MAXPSW];
__u8 unused;
__u8 index;
uint16_t hwPSW[MAXPSW];
uint8_t unused;
uint8_t index;
struct ed *ed;
struct td *next_dl_td;
struct usb_device *usb_dev;
int transfer_len;
__u32 data;
uint32_t data;
__u32 unused2[2];
uint32_t unused2[2];
} __attribute__((aligned(32)));
typedef struct td td_t;
@@ -161,15 +161,15 @@ typedef struct td td_t;
#define NUM_INTS 32 /* part of the OHCI standard */
struct ohci_hcca {
__u32 int_table[NUM_INTS]; /* Interrupt ED table */
uint32_t int_table[NUM_INTS]; /* Interrupt ED table */
#if defined(CONFIG_MPC5200)
__u16 pad1; /* set to 0 on each frame_no change */
__u16 frame_no; /* current frame number */
uint16_t pad1; /* set to 0 on each frame_no change */
uint16_t frame_no; /* current frame number */
#else
__u16 frame_no; /* current frame number */
__u16 pad1; /* set to 0 on each frame_no change */
uint16_t frame_no; /* current frame number */
uint16_t pad1; /* set to 0 on each frame_no change */
#endif
__u32 done_head; /* info returned for an interrupt */
uint32_t done_head; /* info returned for an interrupt */
u8 reserved_for_hc[116];
} __attribute__((aligned(256)));
@@ -180,32 +180,32 @@ struct ohci_hcca {
*/
struct ohci_regs {
/* control and status registers */
__u32 revision;
__u32 control;
__u32 cmdstatus;
__u32 intrstatus;
__u32 intrenable;
__u32 intrdisable;
uint32_t revision;
uint32_t control;
uint32_t cmdstatus;
uint32_t intrstatus;
uint32_t intrenable;
uint32_t intrdisable;
/* memory pointers */
__u32 hcca;
__u32 ed_periodcurrent;
__u32 ed_controlhead;
__u32 ed_controlcurrent;
__u32 ed_bulkhead;
__u32 ed_bulkcurrent;
__u32 donehead;
uint32_t hcca;
uint32_t ed_periodcurrent;
uint32_t ed_controlhead;
uint32_t ed_controlcurrent;
uint32_t ed_bulkhead;
uint32_t ed_bulkcurrent;
uint32_t donehead;
/* frame counters */
__u32 fminterval;
__u32 fmremaining;
__u32 fmnumber;
__u32 periodicstart;
__u32 lsthresh;
uint32_t fminterval;
uint32_t fmremaining;
uint32_t fmnumber;
uint32_t periodicstart;
uint32_t lsthresh;
/* Root hub ports */
struct ohci_roothub_regs {
__u32 a;
__u32 b;
__u32 status;
__u32 portstatus[USB_OHCI_MAX_ROOT_PORTS];
uint32_t a;
uint32_t b;
uint32_t status;
uint32_t portstatus[USB_OHCI_MAX_ROOT_PORTS];
} roothub;
} __attribute__((aligned(32)));
@@ -365,8 +365,8 @@ struct virt_root_hub {
typedef struct
{
ed_t *ed;
__u16 length; /* number of tds associated with this request */
__u16 td_cnt; /* number of tds already serviced */
uint16_t length; /* number of tds associated with this request */
uint16_t td_cnt; /* number of tds already serviced */
struct usb_device *dev;
int state;
unsigned long pipe;
@@ -425,8 +425,8 @@ typedef struct ohci {
ed_t *ed_bulktail; /* last endpoint of bulk list */
ed_t *ed_controltail; /* last endpoint of control list */
int intrstatus;
__u32 hc_control; /* copy of the hc control reg */
__u32 ndp; /* copy NDP from roothub_a */
uint32_t hc_control; /* copy of the hc control reg */
uint32_t ndp; /* copy NDP from roothub_a */
struct virt_root_hub rh;
const char *slot_name;

19
BaS_gcc/include/pci.h
View File

@@ -200,6 +200,25 @@ extern void init_xlbus_arbiter(void);
extern void init_pci(void);
extern int pci_find_device(uint16_t device_id, uint16_t vendor_id, int index);
/* FIXME: parameters missing */
extern uint32_t pci_read_config_longword(uint16_t handle, uint16_t offset);
extern uint16_t pci_read_config_word(uint16_t handle, uint16_t offset);
extern uint8_t pci_read_config_byte(uint16_t handle, uint16_t offset);
extern void pci_write_config_longword(uint16_t handle, uint16_t offset, uint32_t value);
extern void pci_write_config_word(uint16_t handle, uint16_t offset, uint16_t value);
extern void pci_write_config_byte(uint16_t handle, uint16_t offset, uint8_t value);
extern void *pci_get_resource();
extern void pci_hook_interrupt();
extern void pci_unhook_interrupt();
#define PCI_HANDLE(bus, slot, function) (0 | ((bus & 0xff) << 8 | (slot & 0x1f) << 3 | (function & 7)))
#define PCI_BUS_FROM_HANDLE(h) (((h) & 0xff00) >> 8)
#define PCI_SLOT_FROM_HANDLE(h) (((h) & 0xf8) >> 3)
#define PCI_FUNCTION_FROM_HANDLE(h) (((h) & 0x7))
#endif /* _PCI_H_ */

61
BaS_gcc/include/usb.h
View File

@@ -233,28 +233,16 @@ int ohci_usb_lowlevel_stop(void *priv);
int ohci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len);
int ohci_submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, struct devrequest *setup);
int ohci_submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, int interval);
#ifdef CONFIG_USB_INTERRUPT_POLLING
void ohci_usb_event_poll(int interrupt);
#else
void ohci_usb_enable_interrupt(int enable);
#endif /* CONFIG_USB_INTERRUPT_POLLING */
int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **priv);
int ehci_usb_lowlevel_stop(void *priv);
int ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len);
int ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, struct devrequest *setup);
int ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, int transfer_len, int interval);
#ifdef CONFIG_USB_INTERRUPT_POLLING
void ehci_usb_event_poll(int interrupt);
#else
void ehci_usb_enable_interrupt(int enable);
#endif /* CONFIG_USB_INTERRUPT_POLLING */
#ifdef CONFIG_USB_INTERRUPT_POLLING
void usb_event_poll(int interrupt);
#else
void usb_enable_interrupt(int enable);
#endif /* CONFIG_USB_INTERRUPT_POLLING */
#define USB_MAX_STOR_DEV 5
block_dev_desc_t *usb_stor_get_dev(int index);
@@ -302,55 +290,6 @@ int usb_clear_halt(struct usb_device *dev, int pipe);
int usb_string(struct usb_device *dev, int index, char *buf, size_t size);
int usb_set_interface(struct usb_device *dev, int interface, int alternate);
extern unsigned short swap_short(unsigned short val);
extern unsigned long swap_long(unsigned long val);
#if 1
#define __swap_16(x) swap_short(x)
#define __swap_32(x) swap_long(x)
#else
/* big endian -> little endian conversion */
/* some CPUs are already little endian e.g. the ARM920T */
#define __swap_16(x) \
({ unsigned short x_ = (unsigned short)x; \
(unsigned short)( \
((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8)); \
})
#define __swap_32(x) \
({ unsigned long x_ = (unsigned long)x; \
(unsigned long)( \
((x_ & 0x000000FFUL) << 24) | \
((x_ & 0x0000FF00UL) << 8) | \
((x_ & 0x00FF0000UL) >> 8) | \
((x_ & 0xFF000000UL) >> 24)); \
})
#endif
#define swap_16(x) __swap_16(x)
#define swap_32(x) __swap_32(x)
#define le16_to_cpu cpu_to_le16
#define le32_to_cpu cpu_to_le32
#define cpu_to_be32(a) a
static inline unsigned short cpu_to_le16(unsigned short val)
{
return(swap_short(val));
}
static inline unsigned long cpu_to_le32(unsigned long val)
{
return(swap_long(val));
}
static inline void le16_to_cpus(unsigned short *val)
{
*val = le16_to_cpu(*val);
}
static inline void le32_to_cpus(unsigned long *val)
{
*val = le32_to_cpu(*val);
}
/*
* Calling this entity a "pipe" is glorifying it. A USB pipe
* is something embarrassingly simple: it basically consists

70
BaS_gcc/include/util.h
View File

@@ -25,47 +25,53 @@
#ifndef UTIL_H_
#define UTIL_H_
#include <stdint.h>
/*
* WORD swpw(WORD val);
* uint16_t swpw(uint16_t val);
* swap endianess of val, 16 bits only.
*/
#define swpw(a) \
__extension__ \
({long _tmp; \
__asm__ __volatile__ \
("move.w %0,%1\n\t" \
"lsl.l #8,%0\n\t" \
"lsr.l #8,%1\n\t" \
"move.b %1,%0" \
: "=d"(a), "=d"(_tmp) /* outputs */ \
: "0"(a) /* inputs */ \
: "cc" /* clobbered */ \
); \
})
inline uint16_t swpw(uint16_t w)
{
register uint32_t result asm("d0");
__asm__ __volatile__
(
"lea %[input],a0\n\t" \
"mvz.b 3(a0),%[output]\n\t" \
"lsl.l #8,%[output]\n\t" \
"move.b 2(a0),%[output]\n\t" \
: [output] "=d" (result) /* output */
: [input] "o" (w) /* input */
: "cc", "a0", "memory" /* clobbered */
);
return result;
}
/*
* WORD swpl(LONG val);
* uint32_t swpl(uint32_t val);
* swap endianess of val, 32 bits only.
* e.g. ABCD => DCBA
*/
inline uint32_t swpl(uint32_t l)
{
register uint32_t result asm("d0");
#define swpl(a) \
__extension__ \
({long _tmp; \
__asm__ __volatile__ \
("move.b (%1),%0\n\t" \
"move.b 3(%1),(%1)\n\t" \
"move.b %0,3(%1)\n\t" \
"move.b 1(%1),%0\n\t" \
"move.b 2(%1),1(%1)\n\t" \
"move.b %0,2(%1)" \
: "=d"(_tmp) /* outputs */ \
: "a"(&a) /* inputs */ \
: "cc", "memory" /* clobbered */ \
); \
})
__asm__ __volatile__
(
"lea %[input],a0\n\t" \
"mvz.b 3(a0),%[output]\n\t" \
"lsl.l #8,%[output]\n\t" \
"move.b 2(a0),%[output]\n\t" \
"lsl.l #8,%[output]\n\t" \
"move.b 1(a0),%[output]\n\t" \
"lsl.l #8,%[output]\n\t" \
"move.b (a0),%[output]\n\t" \
: [output] "=d" (result) /* output */
: [input] "o" (l) /* input */
: "cc", "a0", "memory" /* clobbered */
);
return result;
}
/*

197
BaS_gcc/sources/ehci-hcd.c
View File

@@ -1,4 +1,4 @@
/*-
/*
* Copyright (c) 2007-2008, Juniper Networks, Inc.
* Copyright (c) 2008, Excito Elektronik i Skåne AB
* Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
@@ -21,18 +21,12 @@
* MA 02111-1307 USA
*/
#include "config.h"
#ifdef CONFIG_USB_EHCI
#include "util.h" /* for endian conversions */
#include "usb.h"
#include "ehci.h"
#if (defined(COLDFIRE) && defined(LWIP)) || defined (FREERTOS)
#include "../freertos/FreeRTOS.h"
#include "../freertos/queue.h"
extern xQueueHandle queue_poll_hub;
#endif
//extern xQueueHandle queue_poll_hub;
#undef DEBUG
#undef SHOW_INFO
@@ -114,11 +108,36 @@ static struct descriptor rom_descriptor = {
#define ehci_is_TDI() (0)
#endif
struct pci_device_id ehci_usb_pci_table[] = {
{ PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB_2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_SERIAL_USB_EHCI, 0, 0 }, /* NEC PCI OHCI module ids */
{ PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_ISP1561_2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_SERIAL_USB_EHCI, 0, 0 }, /* Philips 1561 PCI OHCI module ids */
struct pci_device_id ehci_usb_pci_table[] =
{
{
PCI_VENDOR_ID_NEC,
PCI_DEVICE_ID_NEC_USB_2,
PCI_ANY_ID,
PCI_ANY_ID,
PCI_CLASS_SERIAL_USB_EHCI,
0,
0
}, /* NEC PCI OHCI module ids */
{
PCI_VENDOR_ID_PHILIPS,
PCI_DEVICE_ID_PHILIPS_ISP1561_2,
PCI_ANY_ID,
PCI_ANY_ID,
PCI_CLASS_SERIAL_USB_EHCI,
0,
0
}, /* Philips 1561 PCI OHCI module ids */
/* Please add supported PCI OHCI controller ids here */
{ 0, 0, 0, 0, 0, 0, 0 }
{
0,
0,
0,
0,
0,
0,
0
}
};
static struct ehci {
@@ -140,10 +159,6 @@ static struct ehci {
int irq;
unsigned long dma_offset;
const char *slot_name;
#ifndef COLDFIRE
/* CTPCI anti-freeze */
long (*ctpci_dma_lock)(long mode);
#endif
} gehci;
#ifdef DEBUG
@@ -158,72 +173,23 @@ static struct ehci {
#define info(format, arg...) do {} while (0)
#endif
#ifdef COLDFIRE
static inline void flush_dcache_range(void *begin, void *end)
{
#ifndef CONFIG_USB_MEM_NO_CACHE
#ifdef LWIP
extern unsigned long pxCurrentTCB, tid_TOS;
extern void flush_dc(void);
if(begin);
if(end);
if(pxCurrentTCB != tid_TOS)
flush_dc();
else
#endif /* LWIP */
#if (__GNUC__ > 3)
asm volatile (" .chip 68060\n\t cpusha DC\n\t .chip 5485\n\t"); /* from CF68KLIB */
#else
asm volatile (" .chip 68060\n\t cpusha DC\n\t .chip 5200\n\t"); /* from CF68KLIB */
#endif
#endif /* CONFIG_USB_MEM_NO_CACHE */
}
#define invalidate_dcache_range flush_dcache_range
#else /* !COLDFIRE */
extern void cpush_dc(void *base, long size);
#define flush_dcache_range(begin, end) cpush_dc((void *)begin, (long)(end-begin))
#define invalidate_dcache_range flush_dcache_range
#endif /* COLDFIRE */
extern void udelay(long usec);
extern void ltoa(char *buf, long n, unsigned long base);
#if defined(CONFIG_EHCI_DCACHE)
/*
* Routines to handle (flush/invalidate) the dcache for the QH and qTD
* structures and data buffers. This is needed on platforms using this
* EHCI support with dcache enabled.
*/
static void flush_invalidate(u32 addr, int size, int flush)
{
#ifndef COLDFIRE
if(addr >= *ramtop) /* memory above ramtop is uncached memory */
return;
#endif
if(flush)
flush_dcache_range(addr, addr + size);
else
invalidate_dcache_range(addr, addr + size);
}
static void cache_qtd(struct qTD *qtd, int flush)
{
u32 *ptr = (u32 *)hc32_to_cpu(qtd->qt_buffer[0]);
uint32_t *ptr = (uint32_t *) swpl(qtd->qt_buffer[0]);
int len = (qtd->qt_token & 0x7fff0000) >> 16;
flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
flush_invalidate((uint32_t)qtd, sizeof(struct qTD), flush);
if((ptr != NULL) && len)
{
ptr += gehci.dma_offset;
flush_invalidate((u32)ptr, len, flush);
flush_invalidate((uint32_t)ptr, len, flush);
}
}
static inline struct QH *qh_addr(struct QH *qh)
{
return (struct QH *)((u32)qh & 0xffffffe0);
return (struct QH *)((uint32_t)qh & 0xffffffe0);
}
static void cache_qh(struct QH *qh, int flush)
@@ -234,8 +200,8 @@ static void cache_qh(struct QH *qh, int flush)
/* Walk the QH list and flush/invalidate all entries */
while(1)
{
flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
if((u32)qh & QH_LINK_TYPE_QH)
flush_invalidate((uint32_t)qh_addr(qh), sizeof(struct QH), flush);
if((uint32_t)qh & QH_LINK_TYPE_QH)
break;
qh = qh_addr(qh);
qh = (struct QH *)(hc32_to_cpu(qh->qh_link) + gehci.dma_offset);
@@ -244,9 +210,9 @@ static void cache_qh(struct QH *qh, int flush)
/* Save first qTD pointer, needed for invalidating pass on this QH */
if(flush)
{
qtd = (struct qTD *)(hc32_to_cpu(*(u32 *)&qh->qh_overlay) & 0xffffffe0);
qtd = (struct qTD *)(hc32_to_cpu(*(uint32_t *)&qh->qh_overlay) & 0xffffffe0);
if(qtd != NULL)
qtd = (struct qTD *)(gehci.dma_offset + (u32)qtd);
qtd = (struct qTD *)(gehci.dma_offset + (uint32_t)qtd);
first_qtd = qtd;
}
else
@@ -257,9 +223,9 @@ static void cache_qh(struct QH *qh, int flush)
if(qtd == NULL)
break;
cache_qtd(qtd, flush);
next = (struct qTD *)((u32)hc32_to_cpu(qtd->qt_next) & 0xffffffe0);
next = (struct qTD *)((uint32_t)hc32_to_cpu(qtd->qt_next) & 0xffffffe0);
if(next != NULL)
next = (struct qTD *)(gehci.dma_offset + (u32)next);
next = (struct qTD *)(gehci.dma_offset + (uint32_t)next);
if(next == qtd)
break;
qtd = next;
@@ -276,84 +242,20 @@ static inline void ehci_invalidate_dcache(struct QH *qh)
cache_qh(qh, 0);
}
#else /* !CONFIG_EHCI_DCACHE */
static inline void ehci_flush_dcache(struct QH *qh)
{
/* not need to flush cache with STRAM in writethough */
}
static inline void ehci_invalidate_dcache(struct QH *qh)
{
#ifdef COLDFIRE /* no bus snooping on Coldfire */
#ifdef LWIP
extern unsigned long pxCurrentTCB, tid_TOS;
extern void flush_dc(void);
if(pxCurrentTCB != tid_TOS)
flush_dc();
else
#endif /* LWIP */
#if (__GNUC__ > 3)
asm volatile (" .chip 68060\n\t cpusha DC\n\t .chip 5485\n\t"); /* from CF68KLIB */
#else
asm volatile (" .chip 68060\n\t cpusha DC\n\t .chip 5200\n\t"); /* from CF68KLIB */
#endif
#endif /* COLDFIRE */
}
#endif /* CONFIG_EHCI_DCACHE */
static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
{
uint32_t result;
#ifndef COLDFIRE
extern void mdelay(long msec);
if(gehci.ctpci_dma_lock == NULL)
{
mdelay(10);
usec -= 10000; /* try to fix CTPCI freezes */
}
#endif
do
{
#ifndef COLDFIRE
if(gehci.ctpci_dma_lock != NULL)
{
int i = 0;
while((i <= 10000) && gehci.ctpci_dma_lock(1))
{
udelay(1); /* try to fix CTPCI freezes */
i++;
}
if(i > 10000)
err("EHCI fail to lock DMA");
}
#endif
result = ehci_readl(ptr);
#ifndef COLDFIRE
if(gehci.ctpci_dma_lock != NULL)
gehci.ctpci_dma_lock(0);
#endif
if(result == ~(uint32_t)0)
return -1;
result &= mask;
if(result == done)
return 0;
#ifdef COLDFIRE
udelay(1);
usec--;
#else /* !COLDFIRE */
if(gehci.ctpci_dma_lock != NULL)
{
udelay(10);
usec -= 10;
}
else
{
mdelay(10);
usec -= 10000; /* try to fix CTPCI freezes */
}
#endif /* COLDFIRE */
}
while(usec > 0);
return -1;
@@ -679,14 +581,14 @@ static int ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *b
fail:
td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
if(td != (void *)QT_NEXT_TERMINATE)
td = (struct qTD *)(gehci.dma_offset + (u32)td);
td = (struct qTD *)(gehci.dma_offset + (uint32_t)td);
while(td != (void *)QT_NEXT_TERMINATE)
{
qh->qh_overlay.qt_next = td->qt_next;
ehci_free(td, sizeof(*td));
td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
if(td != (void *)QT_NEXT_TERMINATE)
td = (struct qTD *)(gehci.dma_offset + (u32)td);
td = (struct qTD *)(gehci.dma_offset + (uint32_t)td);
}
ehci_free(qh, sizeof(*qh));
if(ehci_readl(&gehci.hcor->or_usbsts) & STS_HSE) /* Host System Error */
@@ -1146,11 +1048,7 @@ int ehci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
}
gehci.hcor = (struct ehci_hcor *)((uint32_t)gehci.hccr + HC_LENGTH(ehci_readl(&gehci.hccr->cr_capbase)));
kprint("EHCI usb-%s, regs address 0x%08X, PCI handle 0x%X\r\n", gehci.slot_name, gehci.hccr, handle);
#ifndef COLDFIRE
tmp = dma_lock(-1); /* CTPCI */
if((tmp == 0) || (tmp == 1))
gehci.ctpci_dma_lock = (void *)dma_lock(-2); /* function exist */
#endif
/* EHCI spec section 4.1 */
if(ehci_reset() != 0)
{
@@ -1269,4 +1167,3 @@ int ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer
return -1;
}
#endif /* CONFIG_USB_EHCI */

333
BaS_gcc/sources/ohci-hcd.c
View File

@@ -45,6 +45,7 @@
#include "usb.h"
#include "ohci.h"
#include "util.h" /* for endian conversions */
//extern xQueueHandle queue_poll_hub;
@@ -65,11 +66,11 @@
* e.g. PCI controllers need this
*/
#ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
# define readl(a) __swap_32(*((volatile u32 *)(a)))
# define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
# define readl(a) swpl(*((volatile uint32_t *)(a)))
# define writel(a, b) (*((volatile uint32_t *)(b)) = swpl((volatile uint32_t)a))
#else
# define readl(a) (*((volatile u32 *)(a)))
# define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
# define readl(a) (*((volatile uint32_t *)(a)))
# define writel(a, b) (*((volatile uint32_t *)(b)) = ((volatile uint32_t)a))
#endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */
#define min_t(type, x, y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
@@ -103,10 +104,10 @@ extern void udelay(long usec);
static ohci_t gohci[2];
char ohci_inited;
static inline u32 roothub_a(ohci_t *ohci) { return readl(&ohci->regs->roothub.a); }
static inline u32 roothub_b(ohci_t *ohci) { return readl(&ohci->regs->roothub.b); }
static inline u32 roothub_status(ohci_t *ohci) { return readl(&ohci->regs->roothub.status); }
static inline u32 roothub_portstatus(ohci_t *ohci, int i) { return readl(&ohci->regs->roothub.portstatus[i]); }
static inline uint32_t roothub_a(ohci_t *ohci) { return readl(&ohci->regs->roothub.a); }
static inline uint32_t roothub_b(ohci_t *ohci) { return readl(&ohci->regs->roothub.b); }
static inline uint32_t roothub_status(ohci_t *ohci) { return readl(&ohci->regs->roothub.status); }
static inline uint32_t roothub_portstatus(ohci_t *ohci, int i) { return readl(&ohci->regs->roothub.portstatus[i]); }
/* forward declaration */
static void flush_data_cache(ohci_t *ohci);
@@ -171,7 +172,7 @@ static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
{
board_printf(__FILE__ ": cmd(8):");
for(i = 0; i < 8 ; i++)
board_printf(" %02x", ((__u8 *)setup)[i]);
board_printf(" %02x", ((uint8_t *)setup)[i]);
board_printf("\r\n");
}
if(transfer_len > 0 && buffer)
@@ -179,7 +180,7 @@ static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
board_printf(__FILE__ ": data(%d/%d):", (purb ? purb->actual_length : 0), transfer_len);
len = usb_pipeout(pipe)? transfer_len : (purb ? purb->actual_length : 0);
for(i = 0; i < 16 && i < len; i++)
board_printf(" %02x", ((__u8 *)buffer)[i]);
board_printf(" %02x", ((uint8_t *)buffer)[i]);
board_printf("%s\r\n", i < len? "...": "");
}
}
@@ -191,7 +192,7 @@ static void pkt_print(ohci_t *ohci, urb_priv_t *purb, struct usb_device *dev,
static void ep_print_int_eds(ohci_t *ohci, char *str)
{
int i, j;
__u32 *ed_p;
uint32_t *ed_p;
for(i = 0; i < 32; i++)
{
j = 5;
@@ -209,7 +210,7 @@ static void ep_print_int_eds(ohci_t *ohci, char *str)
}
}
static void ohci_dump_intr_mask(char *label, __u32 mask)
static void ohci_dump_intr_mask(char *label, uint32_t mask)
{
dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
label,
@@ -226,7 +227,7 @@ static void ohci_dump_intr_mask(char *label, __u32 mask)
);
}
static void maybe_print_eds(ohci_t *controller, char *label, __u32 value)
static void maybe_print_eds(ohci_t *controller, char *label, uint32_t value)
{
ed_t *edp;
value += controller->dma_offset;
@@ -257,7 +258,7 @@ static char *hcfs2string(int state)
static void ohci_dump_status(ohci_t *controller)
{
struct ohci_regs *regs = controller->regs;
__u32 temp = readl(&regs->revision) & 0xff;
uint32_t temp = readl(&regs->revision) & 0xff;
if(temp != 0x10)
dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
temp = readl(&regs->control);
@@ -292,7 +293,7 @@ static void ohci_dump_status(ohci_t *controller)
static void ohci_dump_roothub(ohci_t *controller, int verbose)
{
__u32 temp, ndp, i;
uint32_t temp, ndp, i;
temp = roothub_a(controller);
// ndp = (temp & RH_A_NDP);
ndp = controller->ndp;
@@ -551,7 +552,7 @@ static int ep_link(ohci_t *ohci, ed_t *edi)
int inter;
int interval;
int load;
__u32 *ed_p;
uint32_t *ed_p;
ed->state = ED_OPER;
ed->int_interval = 0;
switch(ed->type)
@@ -561,7 +562,8 @@ static int ep_link(ohci_t *ohci, ed_t *edi)
if(ohci->ed_controltail == NULL)
writel(ed - ohci->dma_offset, &ohci->regs->ed_controlhead);
else
ohci->ed_controltail->hwNextED = m32_swap((unsigned long)ed - ohci->dma_offset);
ohci->ed_controltail->hwNextED = swpl((unsigned long)ed - ohci->dma_offset);
ed->ed_prev = ohci->ed_controltail;
if(!ohci->ed_controltail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping)
{
@@ -575,7 +577,7 @@ static int ep_link(ohci_t *ohci, ed_t *edi)
if(ohci->ed_bulktail == NULL)
writel(ed - ohci->dma_offset, &ohci->regs->ed_bulkhead);
else
ohci->ed_bulktail->hwNextED = m32_swap((unsigned long)ed - ohci->dma_offset);
ohci->ed_bulktail->hwNextED = swpl((unsigned long)ed - ohci->dma_offset);
ed->ed_prev = ohci->ed_bulktail;
if(!ohci->ed_bulktail && !ohci->ed_rm_list[0] && !ohci->ed_rm_list[1] && !ohci->sleeping)
{
@@ -598,7 +600,7 @@ static int ep_link(ohci_t *ohci, ed_t *edi)
ed_p = &(((ed_t *)ed_p)->hwNextED))
inter = ep_rev(6, ((ed_t *)ed_p)->int_interval);
ed->hwNextED = *ed_p;
*ed_p = m32_swap((unsigned long)ed - ohci->dma_offset);
*ed_p = swpl((unsigned long)ed - ohci->dma_offset);
}
break;
}
@@ -612,11 +614,11 @@ static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed, unsigned
{
for( ;index < NUM_INTS; index += period)
{
__u32 *ed_p = &ohci->hcca->int_table[index];
uint32_t *ed_p = &ohci->hcca->int_table[index];
/* ED might have been unlinked through another path */
while(*ed_p != 0)
{
if((unsigned long)*ed_p == m32_swap((unsigned long)ed - ohci->dma_offset)) /* changed */
if((unsigned long)*ed_p == swpl((unsigned long)ed - ohci->dma_offset)) /* changed */
{
*ed_p = ed->hwNextED;
break;
@@ -635,7 +637,7 @@ static int ep_unlink(ohci_t *ohci, ed_t *edi)
{
volatile ed_t *ed = edi;
int i;
ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
ed->hwINFO |= swpl(OHCI_ED_SKIP);
switch(ed->type)
{
case PIPE_CONTROL:
@@ -646,14 +648,14 @@ static int ep_unlink(ohci_t *ohci, ed_t *edi)
ohci->hc_control &= ~OHCI_CTRL_CLE;
writel(ohci->hc_control, &ohci->regs->control);
}
writel(m32_swap(*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
writel(m32_swap(*((uint32_t *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
}
else
ed->ed_prev->hwNextED = ed->hwNextED;
if(ohci->ed_controltail == ed)
ohci->ed_controltail = ed->ed_prev;
else
((ed_t *)(m32_swap(*((__u32 *)&ed->hwNextED)) + ohci->dma_offset))->ed_prev = ed->ed_prev;
((ed_t *)(m32_swap(*((uint32_t *)&ed->hwNextED)) + ohci->dma_offset))->ed_prev = ed->ed_prev;
break;
case PIPE_BULK:
if(ed->ed_prev == NULL)
@@ -663,14 +665,14 @@ static int ep_unlink(ohci_t *ohci, ed_t *edi)
ohci->hc_control &= ~OHCI_CTRL_BLE;
writel(ohci->hc_control, &ohci->regs->control);
}
writel(m32_swap(*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
writel(m32_swap(*((uint32_t *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
}
else
ed->ed_prev->hwNextED = ed->hwNextED;
if(ohci->ed_bulktail == ed)
ohci->ed_bulktail = ed->ed_prev;
else
((ed_t *)(m32_swap(*((__u32 *)&ed->hwNextED)) + ohci->dma_offset))->ed_prev = ed->ed_prev;
((ed_t *)(m32_swap(*((uint32_t *)&ed->hwNextED)) + ohci->dma_offset))->ed_prev = ed->ed_prev;
break;
case PIPE_INTERRUPT:
periodic_unlink(ohci, ed, 0, 1);
@@ -755,7 +757,7 @@ static void td_fill(ohci_t *ohci, unsigned int info, void *data, int len,
td->ed = urb_priv->ed;
td->next_dl_td = NULL;
td->index = index;
td->data = (__u32)data;
td->data = (uint32_t)data;
#ifdef OHCI_FILL_TRACE
if(usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe))
{
@@ -806,7 +808,7 @@ static void td_submit_job(ohci_t *ohci, struct usb_device *dev, unsigned long pi
int data_len = transfer_len;
void *data;
int cnt = 0;
__u32 info = 0;
uint32_t info = 0;
unsigned int toggle = 0;
/* OHCI handles the DATA-toggles itself, we just use the USB-toggle
* bits for reseting */
@@ -871,7 +873,7 @@ static void td_submit_job(ohci_t *ohci, struct usb_device *dev, unsigned long pi
static void dl_transfer_length(ohci_t *ohci, td_t *td)
{
__u32 tdINFO, tdBE, tdCBP;
uint32_t tdINFO, tdBE, tdCBP;
urb_priv_t *lurb_priv = td->ed->purb;
tdINFO = m32_swap(td->hwINFO);
tdBE = m32_swap(td->hwBE);
@@ -897,7 +899,7 @@ static void check_status(ohci_t *ohci, td_t *td_list)
{
urb_priv_t *lurb_priv = td_list->ed->purb;
int urb_len = lurb_priv->length;
__u32 *phwHeadP = &td_list->ed->hwHeadP;
uint32_t *phwHeadP = &td_list->ed->hwHeadP;
int cc = TD_CC_GET(m32_swap(td_list->hwINFO));
if(cc)
{
@@ -922,7 +924,7 @@ static void check_status(ohci_t *ohci, td_t *td_list)
* we reverse the reversed done-list */
static td_t *dl_reverse_done_list(ohci_t *ohci)
{
__u32 td_list_hc;
uint32_t td_list_hc;
td_t *td_rev = NULL;
td_t *td_list = NULL;
td_list_hc = m32_swap(ohci->hcca->done_head) & ~0xf;
@@ -966,7 +968,7 @@ static int takeback_td(ohci_t *ohci, td_t *td_list)
int stat = 0;
/* urb_t *urb; */
urb_priv_t *lurb_priv;
__u32 tdINFO, edHeadP, edTailP;
uint32_t tdINFO, edHeadP, edTailP;
tdINFO = m32_swap(td_list->hwINFO);
ed = td_list->ed;
if(ed == NULL)
@@ -1021,101 +1023,101 @@ static int dl_done_list(ohci_t *ohci)
*-------------------------------------------------------------------------*/
/* Device descriptor */
static __u8 root_hub_dev_des[] =
static uint8_t root_hub_dev_des[] =
{
0x12, /* __u8 bLength; */
0x01, /* __u8 bDescriptorType; Device */
0x10, /* __u16 bcdUSB; v1.1 */
0x12, /* uint8_t bLength; */
0x01, /* uint8_t bDescriptorType; Device */
0x10, /* uint16_t bcdUSB; v1.1 */
0x01,
0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
0x00, /* __u8 bDeviceSubClass; */
0x00, /* __u8 bDeviceProtocol; */
0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
0x00, /* __u16 idVendor; */
0x09, /* uint8_t bDeviceClass; HUB_CLASSCODE */
0x00, /* uint8_t bDeviceSubClass; */
0x00, /* uint8_t bDeviceProtocol; */
0x08, /* uint8_t bMaxPacketSize0; 8 Bytes */
0x00, /* uint16_t idVendor; */
0x00,
0x00, /* __u16 idProduct; */
0x00, /* uint16_t idProduct; */
0x00,
0x00, /* __u16 bcdDevice; */
0x00, /* uint16_t bcdDevice; */
0x00,
0x00, /* __u8 iManufacturer; */
0x01, /* __u8 iProduct; */
0x00, /* __u8 iSerialNumber; */
0x01 /* __u8 bNumConfigurations; */
0x00, /* uint8_t iManufacturer; */
0x01, /* uint8_t iProduct; */
0x00, /* uint8_t iSerialNumber; */
0x01 /* uint8_t bNumConfigurations; */
};
/* Configuration descriptor */
static __u8 root_hub_config_des[] =
static uint8_t root_hub_config_des[] =
{
0x09, /* __u8 bLength; */
0x02, /* __u8 bDescriptorType; Configuration */
0x19, /* __u16 wTotalLength; */
0x09, /* uint8_t bLength; */
0x02, /* uint8_t bDescriptorType; Configuration */
0x19, /* uint16_t wTotalLength; */
0x00,
0x01, /* __u8 bNumInterfaces; */
0x01, /* __u8 bConfigurationValue; */
0x00, /* __u8 iConfiguration; */
0x40, /* __u8 bmAttributes;
0x01, /* uint8_t bNumInterfaces; */
0x01, /* uint8_t bConfigurationValue; */
0x00, /* uint8_t iConfiguration; */
0x40, /* uint8_t bmAttributes;
Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
0x00, /* __u8 MaxPower; */
0x00, /* uint8_t MaxPower; */
/* interface */
0x09, /* __u8 if_bLength; */
0x04, /* __u8 if_bDescriptorType; Interface */
0x00, /* __u8 if_bInterfaceNumber; */
0x00, /* __u8 if_bAlternateSetting; */
0x01, /* __u8 if_bNumEndpoints; */
0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
0x00, /* __u8 if_bInterfaceSubClass; */
0x00, /* __u8 if_bInterfaceProtocol; */
0x00, /* __u8 if_iInterface; */
0x09, /* uint8_t if_bLength; */
0x04, /* uint8_t if_bDescriptorType; Interface */
0x00, /* uint8_t if_bInterfaceNumber; */
0x00, /* uint8_t if_bAlternateSetting; */
0x01, /* uint8_t if_bNumEndpoints; */
0x09, /* uint8_t if_bInterfaceClass; HUB_CLASSCODE */
0x00, /* uint8_t if_bInterfaceSubClass; */
0x00, /* uint8_t if_bInterfaceProtocol; */
0x00, /* uint8_t if_iInterface; */
/* endpoint */
0x07, /* __u8 ep_bLength; */
0x05, /* __u8 ep_bDescriptorType; Endpoint */
0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
0x03, /* __u8 ep_bmAttributes; Interrupt */
0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
0x07, /* uint8_t ep_bLength; */
0x05, /* uint8_t ep_bDescriptorType; Endpoint */
0x81, /* uint8_t ep_bEndpointAddress; IN Endpoint 1 */
0x03, /* uint8_t ep_bmAttributes; Interrupt */
0x02, /* uint16_t ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
0x00,
0xff /* __u8 ep_bInterval; 255 ms */
0xff /* uint8_t ep_bInterval; 255 ms */
};
static unsigned char root_hub_str_index0[] =
{
0x04, /* __u8 bLength; */
0x03, /* __u8 bDescriptorType; String-descriptor */
0x09, /* __u8 lang ID */
0x04, /* __u8 lang ID */
0x04, /* uint8_t bLength; */
0x03, /* uint8_t bDescriptorType; String-descriptor */
0x09, /* uint8_t lang ID */
0x04, /* uint8_t lang ID */
};
static unsigned char root_hub_str_index1[] =
{
28, /* __u8 bLength; */
0x03, /* __u8 bDescriptorType; String-descriptor */
'O', /* __u8 Unicode */
0, /* __u8 Unicode */
'H', /* __u8 Unicode */
0, /* __u8 Unicode */
'C', /* __u8 Unicode */
0, /* __u8 Unicode */
'I', /* __u8 Unicode */
0, /* __u8 Unicode */
' ', /* __u8 Unicode */
0, /* __u8 Unicode */
'R', /* __u8 Unicode */
0, /* __u8 Unicode */
'o', /* __u8 Unicode */
0, /* __u8 Unicode */
'o', /* __u8 Unicode */
0, /* __u8 Unicode */
't', /* __u8 Unicode */
0, /* __u8 Unicode */
' ', /* __u8 Unicode */
0, /* __u8 Unicode */
'H', /* __u8 Unicode */
0, /* __u8 Unicode */
'u', /* __u8 Unicode */
0, /* __u8 Unicode */
'b', /* __u8 Unicode */
0, /* __u8 Unicode */
28, /* uint8_t bLength; */
0x03, /* uint8_t bDescriptorType; String-descriptor */
'O', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'H', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'C', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'I', /* uint8_t Unicode */
0, /* uint8_t Unicode */
' ', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'R', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'o', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'o', /* uint8_t Unicode */
0, /* uint8_t Unicode */
't', /* uint8_t Unicode */
0, /* uint8_t Unicode */
' ', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'H', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'u', /* uint8_t Unicode */
0, /* uint8_t Unicode */
'b', /* uint8_t Unicode */
0, /* uint8_t Unicode */
};
/* Hub class-specific descriptor is constructed dynamically */
@@ -1137,7 +1139,7 @@ static unsigned char root_hub_str_index1[] =
int rh_check_port_status(ohci_t *controller)
{
__u32 temp, ndp, i;
uint32_t temp, ndp, i;
int res = -1;
temp = roothub_a(controller);
// ndp = (temp & RH_A_NDP);
@@ -1168,12 +1170,12 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, unsigned lon
int leni = transfer_len;
int len = 0;
int stat = 0;
__u32 datab[4];
__u8 *data_buf = (__u8 *)datab;
__u16 bmRType_bReq;
__u16 wValue;
__u16 wIndex;
__u16 wLength;
uint32_t datab[4];
uint8_t *data_buf = (uint8_t *)datab;
uint16_t bmRType_bReq;
uint16_t wValue;
uint16_t wIndex;
uint16_t wLength;
#ifdef DEBUG
pkt_print(ohci, NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
#else
@@ -1186,9 +1188,9 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, unsigned lon
return 0;
}
bmRType_bReq = cmd->requesttype | (cmd->request << 8);
wValue = le16_to_cpu(cmd->value);
wIndex = le16_to_cpu(cmd->index);
wLength = le16_to_cpu(cmd->length);
wValue = swpw(cmd->value);
wIndex = swpw(cmd->index);
wLength = swpw(cmd->length);
info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x", dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
switch(bmRType_bReq)
{
@@ -1200,19 +1202,19 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, unsigned lon
RH_OTHER | RH_CLASS almost ever means HUB_PORT here
*/
case RH_GET_STATUS:
*(__u16 *)data_buf = cpu_to_le16(1);
*(uint16_t *)data_buf = swpw(1);
OK(2);
case RH_GET_STATUS | RH_INTERFACE:
*(__u16 *)data_buf = cpu_to_le16(0);
*(uint16_t *)data_buf = swpw(0);
OK(2);
case RH_GET_STATUS | RH_ENDPOINT:
*(__u16 *)data_buf = cpu_to_le16(0);
*(uint16_t *)data_buf = swpw(0);
OK(2);
case RH_GET_STATUS | RH_CLASS:
*(__u32 *)data_buf = cpu_to_le32(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
*(uint32_t *)data_buf = swpl(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
OK(4);
case RH_GET_STATUS | RH_OTHER | RH_CLASS:
*(__u32 *)data_buf = cpu_to_le32(RD_RH_PORTSTAT);
*(uint32_t *)data_buf = swpl(RD_RH_PORTSTAT);
OK(4);
case RH_CLEAR_FEATURE | RH_ENDPOINT:
switch(wValue)
@@ -1293,11 +1295,11 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, unsigned lon
break;
case RH_GET_DESCRIPTOR | RH_CLASS:
{
__u32 temp = roothub_a(ohci);
uint32_t temp = roothub_a(ohci);
data_buf[0] = 9; /* min length; */
data_buf[1] = 0x29;
// data_buf[2] = temp & RH_A_NDP;
data_buf[2] = (__u8)ohci->ndp;
data_buf[2] = (uint8_t)ohci->ndp;
data_buf[3] = 0;
if(temp & RH_A_PSM) /* per-port power switching? */
data_buf[3] |= 0x1;
@@ -1321,7 +1323,7 @@ static int ohci_submit_rh_msg(ohci_t *ohci, struct usb_device *dev, unsigned lon
len = min_t(unsigned int, leni, min_t(unsigned int, data_buf [0], wLength));
OK(len);
}
case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK(1);
case RH_GET_CONFIGURATION: *(uint8_t *) data_buf = 0x01; OK(1);
case RH_SET_CONFIGURATION: WR_RH_STAT(0x10000); OK(0);
default:
dbg("unsupported root hub command");
@@ -1510,9 +1512,8 @@ static int hc_reset(ohci_t *ohci)
int timeout = 30;
int smm_timeout = 50; /* 0,5 sec */
dbg("%s\r\n", __FUNCTION__);
#ifndef CONFIG_USB_EHCI
if((ohci->ent->vendor == PCI_VENDOR_ID_PHILIPS)
&& (ohci->ent->device == PCI_DEVICE_ID_PHILIPS_ISP1561))
&& (ohci->ent->device == PCI_DEVICE_ID_PHILIPS_ISP1561))
{
#define EHCI_USBCMD_OFF 0x20
#define EHCI_USBCMD_HCRESET (1 << 1)
@@ -1522,27 +1523,18 @@ static int hc_reset(ohci_t *ohci)
long handle;
do
{
handle = pci_find_device(0x0, 0xffff, index++)
handle = pci_find_device(0x0, 0xffff, index++);
if (handle >= 0)
{
unsigned long id = 0;
#ifdef PCI_XBIOS
long error = read_config_longword(handle, PCIIDR, &id);
#else
long error = Read_config_longword(handle, PCIIDR, &id);
#endif
if((error >= 0) && (PCI_VENDOR_ID_PHILIPS == (id & 0xFFFF))
&& (PCI_DEVICE_ID_PHILIPS_ISP1561_2 == (id >> 16)))
id = pci_read_config_longword(handle, PCIIDR);
if ((PCI_VENDOR_ID_PHILIPS == (id & 0xFFFF)) && (PCI_DEVICE_ID_PHILIPS_ISP1561_2 == (id >> 16)))
{
int timeout = 1000;
unsigned long usb_base_addr = 0xFFFFFFFF;
PCI_RSC_DESC *pci_rsc_desc;
#ifdef PCI_XBIOS
pci_rsc_desc = (PCI_RSC_DESC *)get_resource(handle); /* USB OHCI */
#else
pci_rsc_desc = (PCI_RSC_DESC *)Get_resource(handle); /* USB OHCI */
#endif
if((long)pci_rsc_desc >= 0)
pci_rsc_desc = (PCI_RSC_DESC *) pci_get_resource(handle); /* USB OHCI */
if ((long)pci_rsc_desc >= 0)
{
unsigned short flags;
do
@@ -1586,26 +1578,11 @@ static int hc_reset(ohci_t *ohci)
}
else
{
pci_write_config_longword(ohci->handle, 0xE4, fast_read_config_longword(ohci->handle, 0xE4) | 0x01); // disable ehci
pci_write_config_longword(ohci->handle, 0xE4, pci_read_config_longword(ohci->handle, 0xE4) | 0x01); // disable ehci
wait_ms(10);
}
}
#else /* CONFIG_USB_EHCI */
#ifdef MCF547X
if((ohci->controller == 0) && (ohci->ent->vendor == PCI_VENDOR_ID_NEC)
&& (ohci->ent->device == PCI_DEVICE_ID_NEC_USB)
&& (ohci->handle == 1)) /* NEC on motherboard has FPGA clock */
{
dbg("USB OHCI set 48MHz clock\r\n");
#ifdef PCI_XBIOS
write_config_longword(ohci->handle, 0xE4, 0x20); // oscillator
#else
Write_config_longword(ohci->handle, 0xE4, 0x20); // oscillator
#endif
wait_ms(10);
}
#endif /* MCF547X */
#endif /* CONFIG_USB_EHCI */
if(readl(&ohci->regs->control) & OHCI_CTRL_IR)
{
/* SMM owns the HC */
@@ -1650,14 +1627,14 @@ static int hc_reset(ohci_t *ohci)
static int hc_start(ohci_t *ohci)
{
__u32 mask;
uint32_t mask;
unsigned int fminterval;
ohci->disabled = 1;
/* Tell the controller where the control and bulk lists are
* The lists are empty now. */
writel(0, &ohci->regs->ed_controlhead);
writel(0, &ohci->regs->ed_bulkhead);
writel((__u32)ohci->hcca - ohci->dma_offset, &ohci->regs->hcca); /* a reset clears this */
writel((uint32_t)ohci->hcca - ohci->dma_offset, &ohci->regs->hcca); /* a reset clears this */
fminterval = 0x2edf;
writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
@@ -1736,7 +1713,7 @@ static int hc_interrupt(ohci_t *ohci)
else
{
ints = readl(&regs->intrstatus);
if(ints == ~(u32)0)
if(ints == ~(uint32_t)0)
{
ohci->disabled++;
err("OHCI usb-%s-%c device removed!", ohci->slot_name, (char)ohci->controller + '0');
@@ -1770,13 +1747,10 @@ static int hc_interrupt(ohci_t *ohci)
#endif /* USB_POLL_HUB */
stat = 0xff;
}
if(ints & OHCI_INTR_UE) /* e.g. due to PCI Master/Target Abort */
if (ints & OHCI_INTR_UE) /* e.g. due to PCI Master/Target Abort */
{
#ifdef PCI_XBIOS
unsigned short status = fast_read_config_word(ohci->handle, PCISR);
#else
unsigned short status = Fast_read_config_word(ohci->handle, PCISR);
#endif
unsigned short status = pci_read_config_word(ohci->handle, PCISR);
err("OHCI Unrecoverable Error, controller usb-%s-%c disabled\r\n(SR:0x%04X%s%s%s%s%s%s)", ohci->slot_name, (char)ohci->controller + '0', status & 0xFFFF,
status & 0x8000 ? ", Parity error" : "", status & 0x4000 ? ", Signaled system error" : "", status & 0x2000 ? ", Received master abort" : "",
status & 0x1000 ? ", Received target abort" : "", status & 0x800 ? ", Signaled target abort" : "", status & 0x100 ? ", Data parity error" : "");
@@ -1896,18 +1870,8 @@ int ohci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
{
unsigned long usb_base_addr = 0xFFFFFFFF;
ohci_t *ohci = &gohci[(handle >> 16) & 1]; // function & 1
#ifdef PCI_XBIOS
PCI_RSC_DESC *pci_rsc_desc = (PCI_RSC_DESC *)get_resource(handle); /* USB OHCI */
#else
PCI_RSC_DESC *pci_rsc_desc;
USB_COOKIE *p = usb_get_cookie('_PCI');
PCI_COOKIE *bios_cookie = (PCI_COOKIE *)p->v.l;
if(bios_cookie == NULL) /* faster than XBIOS calls */
return(-1);
tab_funcs_pci = &bios_cookie->routine[0];
pci_rsc_desc = (PCI_RSC_DESC *)Get_resource(handle); /* USB OHCI */
#endif
if(handle && (ent != NULL))
PCI_RSC_DESC *pci_rsc_desc = (PCI_RSC_DESC *) pci_get_resource(handle); /* USB OHCI */
if (handle && (ent != NULL))
{
memset(ohci, 0, sizeof(ohci_t));
ohci->handle = handle;
@@ -2018,13 +1982,7 @@ int ohci_usb_lowlevel_init(long handle, const struct pci_device_id *ent, void **
#ifdef DEBUG
ohci_dump(ohci, 1);
#endif
#ifndef CONFIG_USB_INTERRUPT_POLLING
#ifdef PCI_XBIOS
hook_interrupt(handle, handle_usb_interrupt, ohci);
#else
Hook_interrupt(handle, (void *)handle_usb_interrupt, (unsigned long *)ohci);
#endif /* PCI_BIOS */
#endif /* CONFIG_USB_INTERRUPT_POLLING */
pci_hook_interrupt(handle, handle_usb_interrupt, ohci);
if(priv != NULL)
*priv = (void *)ohci;
ohci_inited = 1;
@@ -2040,13 +1998,8 @@ int ohci_usb_lowlevel_stop(void *priv)
return(0);
if(ohci == NULL)
ohci = &gohci[0];
#ifndef CONFIG_USB_INTERRUPT_POLLING
#ifdef PCI_XBIOS
unhook_interrupt(ohci->handle);
#else
Unhook_interrupt(ohci->handle);
#endif /* PCI_BIOS */
#endif /* CONFIG_USB_INTERRUPT_POLLING */
pci_unhook_interrupt(ohci->handle);
hc_reset(ohci);
hc_free_buffers(ohci);
/* This driver is no longer initialised. It needs a new low-level
@@ -2055,5 +2008,3 @@ int ohci_usb_lowlevel_stop(void *priv)
return(0);
}
#endif /* CONFIG_USB_OHCI */

61
BaS_gcc/sources/pci.c
View File

@@ -73,9 +73,12 @@ static char *device_class(int classcode)
return "not found";
}
uint32_t pci_read_config_longword(uint16_t bus, uint16_t slot, uint16_t function, uint16_t offset)
uint32_t pci_read_config_longword(uint16_t handle, uint16_t offset)
{
uint32_t value;
uint16_t bus = PCI_BUS_FROM_HANDLE(handle);
uint16_t slot = PCI_SLOT_FROM_HANDLE(handle);
uint16_t function = PCI_FUNCTION_FROM_HANDLE(handle);
/* clear PCI status/command register */
MCF_PCI_PCISCR = MCF_PCI_PCISCR_PE | /* clear parity error bit */
@@ -100,31 +103,33 @@ uint32_t pci_read_config_longword(uint16_t bus, uint16_t slot, uint16_t function
wait(1000);
value = * (volatile uint32_t *) PCI_IO_OFFSET; /* access device */
//xprintf("pci_read_config_longword(%d (bus=%d, slot=%d, function=%d), %d) = %d\r\n", handle, bus, slot, function, offset, swpl(value));
swpl(value);
//xprintf("PCISCR after config cycle: %lx\r\n", MCF_PCI_PCISCR);
return value;
return swpl(value);
}
uint16_t pci_read_config_word(uint16_t bus, uint16_t slot, uint16_t function, uint16_t offset)
uint16_t pci_read_config_word(uint16_t handle, uint16_t offset)
{
uint32_t value;
value = pci_read_config_longword(bus, slot, function, offset / 2);
value = pci_read_config_longword(handle, offset / 2);
return((value >> (1 - offset % 2) * 8) & 0xffff);
}
uint8_t pci_read_config_byte(uint16_t bus, uint16_t slot, uint16_t function, uint16_t offset)
uint8_t pci_read_config_byte(uint16_t handle, uint16_t offset)
{
uint32_t value;
value = pci_read_config_longword(bus, slot, function, offset / 4);
value = pci_read_config_longword(handle, offset / 4);
return ((value >> (3 - offset % 4) * 8) & 0xff);
}
void pci_write_config_longword(uint16_t bus, uint16_t slot, uint16_t function, uint16_t offset, uint32_t value)
void pci_write_config_longword(uint16_t handle, uint16_t offset, uint32_t value)
{
uint16_t bus = PCI_BUS_FROM_HANDLE(handle);
uint16_t slot = PCI_SLOT_FROM_HANDLE(handle);
uint16_t function = PCI_FUNCTION_FROM_HANDLE(handle);
/* clear PCI status/command register */
MCF_PCI_PCISCR = MCF_PCI_PCISCR_PE | /* clear parity error bit */
MCF_PCI_PCISCR_SE | /* clear system error */
@@ -147,8 +152,7 @@ void pci_write_config_longword(uint16_t bus, uint16_t slot, uint16_t function, u
MCF_PCI_PCICAR_DWORD(offset / 4);
wait(1000);
swpl(value);
* (volatile uint32_t *) PCI_IO_OFFSET = value; /* access device */
* (volatile uint32_t *) PCI_IO_OFFSET = swpl(value); /* access device */
}
int pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
@@ -167,8 +171,8 @@ int pci_find_device(uint16_t device_id, uint16_t vendor_id, int index)
{
uint32_t value;
value = pci_read_config_longword(bus, slot, function, 0);
handle = bus << 16 | slot << 8 | function;
handle = PCI_HANDLE(bus, slot, function);
value = pci_read_config_longword(handle, 0);
if (value != 0xffffffff) /* we have a device at this position */
{
if (vendor_id == 0xffff) /* ignore vendor id */
@@ -195,15 +199,17 @@ static uint32_t io_address = PCI_IO_OFFSET;
void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
{
uint32_t address;
uint16_t handle;
int i;
for (i = 0; i < 6; i++) /* for all bars */
{
uint32_t value;
value = pci_read_config_longword(bus, slot, function, 0x10 + i); /* read BAR value */
pci_write_config_longword(bus, slot, function, 0x10 + i, 0xffffffff); /* write all bits */
address = pci_read_config_longword(bus, slot, function, 0x10 + i); /* read back value */
handle = bus << 8 | slot << 5 | function;
value = pci_read_config_longword(handle, 0x10 + i); /* read BAR value */
pci_write_config_longword(handle, 0x10 + i, 0xffffffff); /* write all bits */
address = pci_read_config_longword(handle, 0x10 + i); /* read back value */
if (address) /* is bar in use? */
{
@@ -218,9 +224,9 @@ void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
int size = ~(address & 0xfffffff0) + 1;
mem_address = (mem_address + size - 1) & ~(size - 1);
pci_write_config_longword(bus, slot, function, 0x10 + i, mem_address);
value = pci_read_config_longword(bus, slot, function, 0x10 + i);
xprintf("BAR[%d] configured to %08x, size %x\r\n", i, value, size);
pci_write_config_longword(handle, 0x10 + i, mem_address);
value = pci_read_config_longword(handle, 0x10 + i);
//xprintf("BAR[%d] configured to %08x, size %x\r\n", i, value, size);
mem_address += size;
}
else if (IS_PCI_IO_BAR(value))
@@ -228,9 +234,9 @@ void pci_device_config(uint16_t bus, uint16_t slot, uint16_t function)
int size = ~(address & 0xfffffffc) + 1;
io_address = (io_address + size - 1) & ~(size - 1);
pci_write_config_longword(bus, slot, function, 0x10 + i, io_address);
value = pci_read_config_longword(bus, slot, function, 0x10 + i);
xprintf("BAR[%d] mapped to %08x, size %x\r\n", i, value, size);
pci_write_config_longword(handle, 0x10 + i, io_address);
value = pci_read_config_longword(handle, 0x10 + i);
//xprintf("BAR[%d] mapped to %08x, size %x\r\n", i, value, size);
io_address += size;
}
}
@@ -254,14 +260,15 @@ void pci_scan(void)
for (function = 0; function < 8; function++)
{
uint32_t value;
uint16_t handle = 0 | bus << 8 | slot << 5 | function;
value = pci_read_config_longword(bus, slot, function, 0);
value = pci_read_config_longword(handle, 0);
if (value != 0xffffffff)
{
xprintf(" %02x | %02x | %02x |%04x|%04x| %s\r\n", bus, slot, function,
PCI_VENDOR_ID(value),
PCI_DEVICE_ID(value),
device_class(pci_read_config_longword(bus, slot, function, 0x08) >> 24 & 0xff));
device_class(pci_read_config_longword(handle, 0x08) >> 24 & 0xff));
if (PCI_VENDOR_ID(value) != 0x1057 && PCI_DEVICE_ID(value) != 0x5806) /* do not configure bridge */
{
@@ -270,11 +277,11 @@ void pci_scan(void)
for (i = 0; i < 0x40; i += 4)
{
value = pci_read_config_longword(bus, slot, function, i);
value = pci_read_config_longword(handle, i);
//xprintf("register %02x value= %08x\r\n", i, value);
}
/* test for multi-function device to avoid ghost device detects */
value = pci_read_config_longword(bus, slot, function, 0x0c);
value = pci_read_config_longword(handle, 0x0c);
if (function == 0 && !(PCI_HEADER_TYPE(value) & 0x80)) /* no multi function device */
function = 8;
}