Fixed ACRs for running BaS in flash (hang on MMU enable)
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@@ -39,7 +39,7 @@
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#error "unknown machine!"
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#error "unknown machine!"
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#endif /* MACHINE_FIREBEE */
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#endif /* MACHINE_FIREBEE */
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#define DBG_DMA
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//#define DBG_DMA
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#ifdef DBG_DMA
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#ifdef DBG_DMA
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#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
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#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
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#else
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#else
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21
sys/mmu.c
21
sys/mmu.c
@@ -63,12 +63,12 @@
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#error "unknown machine!"
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#error "unknown machine!"
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#endif /* MACHINE_FIREBEE */
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#endif /* MACHINE_FIREBEE */
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// #define DEBUG_MMU
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//#define DBG_MMU
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#ifdef DEBUG_MMU
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#ifdef DBG_MMU
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#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
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#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
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#else
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#else
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#define dbg(format, arg...) do {;} while (0)
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#define dbg(format, arg...) do {;} while (0)
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#endif /* DEBUG_MMU */
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#endif /* DBG_MMU */
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#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); xprintf("system halted\r\n"); } while(0); while(1)
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#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); xprintf("system halted\r\n"); } while(0); while(1)
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/*
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/*
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@@ -505,11 +505,14 @@ void mmu_init(void)
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#endif /* MACHINE_FIREBEE */
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#endif /* MACHINE_FIREBEE */
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// set_acr1(0x601fc000);
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// set_acr1(0x601fc000);
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/* data access attributes for BaS in flash */
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set_acr1(ACR_W(0) |
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set_acr1(ACR_W(0) |
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ACR_SP(0) |
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ACR_SP(0) |
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ACR_CM(0) |
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ACR_CM(0) |
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#if defined(MACHINE_FIREBEE)
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#if defined(MACHINE_FIREBEE)
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ACR_CM(ACR_CM_CACHEABLE_WT) | /* video RAM on the Firebee */
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ACR_CM(ACR_CM_CACHEABLE_WT) | /* flash on the Firebee */
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#elif defined(MACHINE_M5484LITE)
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#elif defined(MACHINE_M5484LITE)
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ACR_CM(ACR_CM_CACHE_INH_PRECISE) | /* Compact Flash on the M548xLITE */
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ACR_CM(ACR_CM_CACHE_INH_PRECISE) | /* Compact Flash on the M548xLITE */
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#elif defined(MACHINE_M54455)
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#elif defined(MACHINE_M54455)
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@@ -521,11 +524,14 @@ void mmu_init(void)
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ACR_S(ACR_S_ALL) |
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ACR_S(ACR_S_ALL) |
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ACR_E(1) |
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ACR_E(1) |
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ACR_ADMSK(0x1f) |
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ACR_ADMSK(0x1f) |
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ACR_BA(0x60000000));
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ACR_BA(0xe0000000));
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/* set instruction access attributes in ACR2 and ACR3 */
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/* set instruction access attributes in ACR2 and ACR3 */
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//set_acr2(0xe007c400);
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//set_acr2(0xe007c400);
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/* instruction access attribute for BaS in flash */
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set_acr2(ACR_W(0) |
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set_acr2(ACR_W(0) |
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ACR_SP(0) |
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ACR_SP(0) |
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ACR_CM(0) |
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ACR_CM(0) |
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@@ -537,8 +543,7 @@ void mmu_init(void)
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ACR_BA(0xe0000000));
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ACR_BA(0xe0000000));
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/* disable ACR1 - 3, essentially disabling all of the above */
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/* disable ACR1 - 3, essentially disabling all of the above */
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set_acr1(0x0);
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set_acr2(0x0);
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set_acr3(0x0);
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set_acr3(0x0);
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set_mmubar(MMUBAR + 1); /* set and enable MMUBAR */
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set_mmubar(MMUBAR + 1); /* set and enable MMUBAR */
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@@ -630,7 +635,7 @@ uint32_t mmutr_miss(uint32_t mmu_sr, uint32_t fault_address, uint32_t pc,
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{
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{
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uint32_t fault = format_status & 0xc030000;
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uint32_t fault = format_status & 0xc030000;
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dbg("MMU TLB MISS accessing 0x%08x\r\nFS = 0x%08x\r\nPC = 0x%08x\r\n", address, format_status, pc);
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dbg("MMU TLB MISS accessing 0x%08x\r\nFS = 0x%08x\r\nPC = 0x%08x\r\n", fault_address, format_status, pc);
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// flush_and_invalidate_caches();
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// flush_and_invalidate_caches();
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switch (fault)
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switch (fault)
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