implemented PHY, but still only occasionly transmitted packets. Obviously, there's a bug somewhere ;)

sys/BaS.c

@@ -263,6 +263,7 @@ void network_init(void)
 	vector = 103;
 
 	isr_init();		/* need to call that explicitely, otherwise isr table might be full */
+
 	if (!isr_register_handler(ISR_DBUG_ISR, vector, handler, NULL, (void *) &nif1))
 	{
 		dbg("%s: unable to register handler for vector %d\r\n", __FUNCTION__, vector);
@@ -281,7 +282,6 @@ void network_init(void)
 		return;
 	}
 
-#ifdef _NOT_USED_
 	nif_init(&nif1);
 	nif1.mtu = ETH_MTU;
 	nif1.send = fec0_send;
@@ -295,7 +295,6 @@ void network_init(void)
 
 	ip_init(&ip_info, myip, gateway, netmask);
 	nif_bind_protocol(&nif1, ETH_FRM_IP, ip_handler, (void *) &ip_info);
-#endif
 	dma_irq_enable(6, 6);
 	//set_ipl(0);
 

sys/driver_mem.c

@@ -32,7 +32,6 @@
 #define dbg(fmt, args...)
 #endif
 
-extern void *info_fvdi;
 extern long offscren_reserved(void);
 
 extern uint8_t driver_mem_buffer[DRIVER_MEM_BUFFER_SIZE];	/* defined in linker control file */
@@ -231,7 +230,7 @@ static void freeit(MD *m, MPB *mp)
 	}
 }
 
-int driver_mem_free(void *addr)
+int32_t driver_mem_free(void *addr)
 {
 	int level;
 	MD *p, **q;
@@ -262,7 +261,7 @@ int driver_mem_free(void *addr)
 	return(0);
 }
 
-void *driver_mem_alloc(long amount)
+void *driver_mem_alloc(uint32_t amount)
 {
 	void *ret = NULL;
 	int level;

sys/exceptions.S

@@ -295,24 +295,27 @@ init_vec_loop:
 		lea		handler_psc3(pc),a1
 		// PSC3 interrupt source = 32
 		move.l	a1,(INT_SOURCE_PSC3 + 64) * 4(a0)
+
 // timer vectors (triggers when vbashi gets changed, used for video page copy)
 		lea		handler_gpt0(pc),a1
 		// GPT0 interrupt source = 62
 		move.l	a1,(INT_SOURCE_GPT0 + 64) * 4(a0)
 #endif /* MACHINE_FIREBEE */
 
-		// install isr handlers for the three GPT timers,
-		// the FEC interrupts and the DMA task interrupts
-		// (used by network driver in BaS and MiNT)
-		lea		_lowlevel_isr_handler,a1
+// install lowlevel_isr_handler for the three GPT timers
+		lea		_lowlevel_isr_handler(pc),a1
 		move.l	a1,(INT_SOURCE_GPT1 + 64) * 4(a0)
 		move.l	a1,(INT_SOURCE_GPT2 + 64) * 4(a0)
 		move.l	a1,(INT_SOURCE_GPT3 + 64) * 4(a0)
+
+// install lowlevel_isr_handler for the FEC0  interrupt
 		move.l	a1,(INT_SOURCE_FEC0 + 64) * 4(a0)
 #ifndef MACHINE_FIREBEE
-		// second FEC not wired on the FireBee
+// FEC1 not wired on the FireBee
 		move.l	a1,(INT_SOURCE_FEC1 + 64) * 4(a0)
 #endif
+
+// install lowlevel_isr_handler for DMA interrupts
 		move.l	a1,(INT_SOURCE_DMA + 64) * 4(a0)
 
 		move.l	(sp)+,a2			// Restore registers
@@ -990,24 +993,16 @@ video_chg_end:
 		.extern	_isr_execute_handler
 
 _lowlevel_isr_handler:
-		move.w	#0x2700,sr
-		link	a6,#-4*4
-		movem.l	d0-d1/a0-a1,(sp)
+		move.w	#0x2700,sr			// disable interrupts
+		link	a6,#-4*4			// make room for
+		movem.l	d0-d1/a0-a1,(sp)	// gcc scratch registers and save them
 
-		move.w	4(a6),d0
-		lsr.l	#2,d0
-		andi.l	#0x0000ff,d0
-		move.l	d0,-(sp)
-		jsr		_isr_execute_handler
-		lea		4(sp),sp
-		cmp.l	#1,d0
-		//beq		handled			// this is probably not a too bright idea for hw interrupts not known to TOS
-		bra		handled
-nothandled:
-		movem.l	(sp),d0-d1/a0-a1
-		unlk	a6
-		jmp		std_exc_vec
-handled:
-		movem.l	(sp),d0-d1/a0-a1
-		unlk	a6
+		move.w	4(a6),d0			// fetch vector number from stack
+		lsr.l	#2,d0				// move it in place
+		andi.l	#0x000000ff,d0		// mask it out
+		move.l	d0,-(sp)			// push it
+		jsr		_isr_execute_handler	// call the C handler
+		lea		4(sp),sp			// adjust stack
+		movem.l	(sp),d0-d1/a0-a1	// restore registers
+		unlk	a6					// cleanup stack
 		rte