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conversion finished -> compiles

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This commit is contained in:
Markus Fröschle
2012-10-11 19:55:28 +00:00
parent 15e91aa70f
commit 2f736b27dd
1 changed files with 98 additions and 137 deletions
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231
sources/BaS.c
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@@ -8,15 +8,12 @@
#include "MCF5475_SLT.h" #include "MCF5475_SLT.h"
#include "startcf.h" #include "startcf.h"
extern unsigned long far __SP_AFTER_RESET[]; extern unsigned long __Bas_base[];
extern unsigned long far __Bas_base[];
/* imported routines */ /* imported routines */
extern int mmu_init(); extern int mmu_init();
extern int mmutr_miss();
extern int vec_init(); extern int vec_init();
extern int illegal_table_make(); extern int illegal_table_make();
extern int cf68k_initialize();
/* /*
* warte_routinen * warte_routinen
@@ -70,6 +67,8 @@ void BaS(void)
int sd_status,i; int sd_status,i;
uint8_t *src; uint8_t *src;
uint8_t *dst; uint8_t *dst;
uint32_t *adr;
az_sectors = sd_card_init(); az_sectors = sd_card_init();
if(az_sectors>0) if(az_sectors>0)
@@ -98,7 +97,7 @@ void BaS(void)
{ {
/* copy EMUTOS */ /* copy EMUTOS */
src = (uint8_t *) 0xe0600000L; src = (uint8_t *) 0xe0600000L;
while (src < 0xe0700000L) while (src < (uint8_t *) 0xe0700000L)
{ {
*dst++ = *src++; *dst++ = *src++;
} }
@@ -106,159 +105,121 @@ void BaS(void)
else else
{ {
/* copy FireTOS */ /* copy FireTOS */
src = 0xe0400000L; src = (uint8_t *) 0xe0400000L;
while (src < 0xe0500000L) while (src < (uint8_t *) 0xe0500000L)
{ {
*dst++ = *src++; *dst++ = *src++;
} }
} }
if (!DIP_SWITCH & (1 << 6)) if (!DIP_SWITCH & (1 << 6)) /* switch #6 on ? */
{ {
if (MCF_PSC3_PSCRB_8BIT == 0x81)
{
for (i = 0; i < 64; i++)
{
* (uint8_t *) 0xffff8963 = MCF_PSC3_PSCRB_8BIT; /* TODO: what are we doing here ? */
}
}
} }
/***************************************************************/ #ifdef _NOT_USED_
/* div inits /*
/***************************************************************/ * set the NVRAM checksum as invalid
div_inits: */
move.b DIP_SWITCH,d0 // dip schalter adresse
btst.b #6,d0
beq video_setup
// rtc daten, mmu set, etc nur wenn switch 6 = off
lea 0xffff8961,a0
clr.l d1
moveq #64,d2
move.b (a4),d0
cmp.b #0x81,d0
bne not_rtc
loop_sr:
move.b (a4),d0
move.b d1,(a0)
move.b d0,2(a0)
addq.l #1,d1
cmp.b d1,d2
bne loop_sr
/*
// Set the NVRAM checksum as invalid // Set the NVRAM checksum as invalid
move.b #63,(a0) move.b #63,(a0)
move.b 2(a0),d0 move.b 2(a0),d0
add #1,d0 add #1,d0
move.b d0,2(a0) move.b d0,2(a0)
*/ #endif /* NOT_USED */
not_rtc:
bsr mmu_init
bsr vec_init
bsr illegal_table_make
// interrupts mmu_init();
clr.l 0xf0010004 // disable all interrupts vec_init();
lea MCF_EPORT_EPPAR,a0 illegal_table_make();
move.w #0xaaa8,(a0) // falling edge all,
// timer 0 on mit int -> video change ------------------------------------------- /* interrupts */
move.l #MCF_GPT_GMS_ICT(1)|MCF_GPT_GMS_IEN|MCF_GPT_GMS_TMS(1),d0 //caputre mit int on rising edge
move.l d0,MCF_GPT0_GMS
moveq.l #0x3f,d0 // max prority interrutp
move.b d0,MCF_INTC_ICR62 // setzen
// -------------------------------------------------
move.b #0xfe,d0
move.b d0,0xf0010004 // enable int 1-7
nop
lea MCF_EPORT_EPIER,a0
move.b #0xfe,(a0) // int 1-7 on
nop
lea MCF_EPORT_EPFR,a0
move.b #0xff,(a0) // alle pending interrupts l<>schen
nop
lea MCF_INTC_IMRL,a0
move.l #0xFFFFFF00,(a0) // int 1-7 on
lea MCF_INTC_IMRH,a0
move.l #0xBFFFFFFE,(a0) // psc3 and timer 0 int on
move.l #MCF_MMU_MMUCR_EN,d0 * (uint32_t *) 0xf0010004 = 0L; /* disable all interrupts */
move.l d0,MCF_MMU_MMUCR // mmu on MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */
nop
nop MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) | /* timer 0 on, video change capture on rising edge */
/********************************************************************/ MCF_GPT_GMS_IEN |
/* IDE reset MCF_GPT_GMS(1);
/********************************************************************/ MCF_INTC_ICR62 = 0x3f;
lea 0xffff8802,a0
move.b #14,-2(a0) * (uint8_t *) 0xf0010004 = 0xfe; /* enable int 1-7 */
move.b #0x80,(a0) MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */
bsr warte_1ms MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */
clr.b (a0) MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */
/********************************************************************/ MCF_INTC_IMRH = 0x9ffffffe; /* psc3 and timer 0 int on */
/* video setup
/********************************************************************/ MCF_MMU_MMUCR = MCF_MMU_MMUCR_EN; /* MMU on */
video_setup:
lea 0xf0000410,a0 /* IDE reset */
// 25MHz * (uint8_t *) (0xffff8802 - 2) = 14;
move.l #0x032002ba,(a0)+ // horizontal 640x480 * (uint8_t *) (0xffff8802 - 0) = 0x80;
move.l #0x020c020a,(a0)+ // vertikal 640x480 warte_1ms();
move.l #0x0190015d,(a0)+ // horizontal 320x240
move.l #0x020C020A,(a0)+ // vertikal 320x240 */ * (uint8_t *) (0xffff8802 - 0) = 0;
/*
/*
* video setup (25MHz)
*/
* (uint32_t *) (0xf0000410 + 0) = 0x032002ba; /* horizontal 640x480 */
* (uint32_t *) (0xf0000410 + 4) = 0x020c020a; /* vertical 640x480 */
* (uint32_t *) (0xf0000410 + 8) = 0x0190015d; /* horizontal 320x240 */
* (uint32_t *) (0xf0000410 + 12) = 0x020C020A; /* vertical 320x230 */
#ifdef _NOT_USED_
// 32MHz // 32MHz
move.l #0x037002ba,(a0)+ // horizontal 640x480 move.l #0x037002ba,(a0)+ // horizontal 640x480
move.l #0x020d020a,(a0)+ // vertikal 640x480 move.l #0x020d020a,(a0)+ // vertikal 640x480
move.l #0x02A001e0,(a0)+ // horizontal 320x240 move.l #0x02A001e0,(a0)+ // horizontal 320x240
move.l #0x05a00160,(a0)+ // vertikal 320x240 move.l #0x05a00160,(a0)+ // vertikal 320x240
*/ #endif /* _NOT_USED_ */
lea -0x20(a0),a0
move.l #0x01070002,(a0) // fifo on, refresh on, ddrcs und cke on, video dac on,
/********************************************************************/
/* memory setup
/********************************************************************/
lea 0x400,a0
lea 0x800,a1
mem_clr_loop:
clr.l (a0)+
clr.l (a0)+
clr.l (a0)+
clr.l (a0)+
cmp.l a0,a1
bgt mem_clr_loop
moveq #0x48,d0 /* fifo on, refresh on, ddrcs and cke on, video dac on */
move.b d0,0xffff8007 * (uint32_t *) (0xf0000410 - 0x20) = 0x01070002;
// stram
move.l #0xe00000,d0 // ende stram
move.l d0,0x42e
move.l #0x752019f3,d0 // memvalid
move.l d0,0x420
move.l #0x237698aa,d0 // memval2
move.l d0,0x43a
move.l #0x5555aaaa,d0 // memval3
move.l d0,0x51a
// ttram
move.l #__Bas_base,d0 // ende ttram
move.l d0,0x5a4
move.l #0x1357bd13,d0 // ramvalid
move.l d0,0x5a8
// init acia /*
moveq #3,d0 * memory setup
move.b d0,0xfffffc00 */
nop for (adr = 0x400; adr < 0x800; adr += 32) {
move.b d0,0xfffffc04 *adr = 0x0L;
nop *adr = 0x0L;
moveq #0x96,d0 *adr = 0x0L;
move.b d0,0xfffffc00 *adr = 0x0L;
moveq #-1,d0 }
nop
move.b d0,0xfffffa0f
nop
move.b d0,0xfffffa11
nop
// test auf protect mode --------------------- * (uint8_t *) 0xffff8007 = 0x48; /* FIXME: what's that ? */
move.b DIP_SWITCH,d0
btst #7,d0
beq no_protect // nein->
move.w #0x0700,sr
no_protect:
jmp 0xe00030
} /* ST RAM */
* (uint32_t *) 0x42e = 0xe00000; /* phystop TOS system variable */
* (uint32_t *) 0x420 = 0x752019f3; /* memvalid TOS system variable */
* (uint32_t *) 0x43a = 0x237698aa; /* memval2 TOS system variable */
* (uint32_t *) 0x51a = 0x5555aaaa; /* memval3 TOS system variable */
/* TT-RAM */
* (uint32_t *) 0x5a4 = __Bas_base; /* ramtop TOS system variable */
* (uint32_t *) 0x5a8 = 0x1357bd13; /* ramvalid TOS system variable */
/* init ACIA */
* (uint8_t *) 0xfffffc00 = 3;
asm("nop");
* (uint8_t *) 0xfffffc04 = 3;
asm("nop");
* (uint8_t *) 0xfffffc00 = 0x96;
asm("nop");
* (uint8_t *) 0xfffffa0f = 0;
asm("nop");
* (uint8_t *) 0xfffffa11 = 0;
asm("nop");
if (DIP_SWITCH & (1 << 7)) {
asm("move.w #0x0700,sr");
}
asm("jmp 0xe00030");
} }