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add more Radeon functionality

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This commit is contained in:
Markus Fröschle
2016-11-02 06:26:04 +00:00
parent f2ed9ccece
commit 2d1f0e8121
22 changed files with 774 additions and 273 deletions
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39
BaS_gcc/x86emu/x86biosemu.c
View File

@@ -10,7 +10,7 @@
#include "pci_ids.h"
#include "x86pcibios.h"
// #define DEBUG
#define DEBUG
#include "debug.h"
#define USE_SDRAM
@@ -112,6 +112,9 @@ static uint16_t inw(struct X86EMU *emu, uint16_t port)
return val;
}
#define PC_PCI_INDEX_PORT 0xcf8
#define PC_PCI_DATA_PORT 0xcfc
static uint32_t inl(struct X86EMU *emu, uint16_t port)
{
uint32_t val = 0;
@@ -120,13 +123,12 @@ static uint32_t inl(struct X86EMU *emu, uint16_t port)
{
val = swpl(*(uint32_t *)(offset_io + (uint32_t) port));
}
else if (port == 0xCF8)
else if (port == PC_PCI_INDEX_PORT)
{
val = config_address_reg;
}
else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) != 0))
else if ((port == PC_PCI_DATA_PORT) && ((config_address_reg & 0x80000000) != 0))
{
dbg("PCI BIOS access to register %x\r\n", config_address_reg);
switch (config_address_reg & 0xFC)
{
case PCIIDR:
@@ -141,7 +143,7 @@ static uint32_t inl(struct X86EMU *emu, uint16_t port)
val = pci_read_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC);
break;
}
dbg("inl(0x%x) = 0x%x\r\n", port, val);
// dbg("PCI inl from register %x, value = 0x%08x\r\n", config_address_reg, val);
}
return val;
@@ -169,19 +171,19 @@ static void outl(struct X86EMU *emu, uint16_t port, uint32_t val)
{
*(uint32_t *)(offset_io + (uint32_t) port) = swpl(val);
}
else if (port == 0xCF8)
else if (port == PC_PCI_INDEX_PORT)
{
config_address_reg = val;
}
else if ((port == 0xCFC) && ((config_address_reg & 0x80000000) !=0))
else if ((port == PC_PCI_DATA_PORT) && ((config_address_reg & 0x80000000) !=0))
{
dbg("outl(0x%x, 0x%x) to PCI config space\r\n", port, val);
if ((config_address_reg & 0xFC) == PCIBAR1)
{
offset_port = (uint16_t) val & 0xFFFC;
}
else
{
dbg("outl(0x%x, 0x%x) to PCI config space\r\n", port, val);
pci_write_config_longword(rinfo_biosemu->handle, config_address_reg & 0xFC, val);
}
}
@@ -195,7 +197,6 @@ static void do_int(struct X86EMU *emu, int num)
switch (num)
{
#ifndef _PC
case 0x10:
/* video interrupt */
/* fall through intentional */
@@ -207,7 +208,23 @@ static void do_int(struct X86EMU *emu, int num)
case 0x6d:
/* VGA internal interrupt */
dbg("int %02xh, AH=0x%02x, AL=0x%02x\r\n", num, emu->x86.register_a.I8_reg.h_reg, emu->x86.register_a.I8_reg.l_reg);
dbg("int %02xh, AH=0x%02x, AL=0x%02x\r\n", num,
emu->x86.register_a.I8_reg.h_reg,
emu->x86.register_a.I8_reg.l_reg);
if (emu->x86.register_a.I8_reg.h_reg == 0x13) /* VGA write string */
{
int num_chars = emu->x86.register_c.I16_reg.x_reg;
int seg = emu->x86.register_es;
int off = emu->x86.register_bp.I16_reg.x_reg;
int str = (seg << 4) + off;
int i;
dbg("string to output at 0x%04x:0x%04x length=0x%04x\r\n", seg, off, num_chars);
for (i = 0; i < num_chars; i++)
xprintf("%c", * (char *)(0x0100000 + str + i));
}
if (getIntVect(emu, num) == 0x0000)
err("uninitialised int vector\r\n");
@@ -218,7 +235,7 @@ static void do_int(struct X86EMU *emu, int num)
ret = 1;
}
break;
#endif
case 0x15:
//ret = int15_handler();
ret = 1;

7
BaS_gcc/x86emu/x86pcibios.c
View File

@@ -4,9 +4,10 @@
#include "x86pcibios.h"
#include "x86emu_regs.h"
#include "bas_printf.h"
extern unsigned short offset_port;
// #define DEBUG
#define DEBUG
#include "debug.h"
int x86_pcibios_handler(struct X86EMU *emu)
@@ -77,7 +78,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7);
emu->x86.R_CL = pci_read_config_byte(dev, emu->x86.R_DI);
dbg("value = %x\r\n", emu->x86.R_CL);
dbg("dev=0x%04x value = 0x%04x\r\n", emu->x86.R_CL);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
@@ -91,7 +92,7 @@ int x86_pcibios_handler(struct X86EMU *emu)
emu->x86.R_CX = offset_port + 1;
else
emu->x86.R_CX = pci_read_config_word(dev, emu->x86.R_DI);
dbg("value = %x\r\n", emu->x86.R_CX);
dbg("offset_port=0x%04x dev=0x%04x, value = %x\r\n", offset_port, dev, emu->x86.R_CX);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;