Merge pci_BaS_gcc branch from trunk (new attempt)
This commit is contained in:
@@ -17,21 +17,24 @@
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#include "bas_string.h"
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#include "bas_printf.h"
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#include "util.h"
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#include "wait.h"
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#include "am79c874.h"
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#include "bcm5222.h"
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//#include "bcm5222.h"
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#include <stdbool.h>
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#if defined(MACHINE_FIREBEE)
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#include "firebee.h"
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#elif defined(MACHINE_M5484LITE)
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#include "m5484l.h"
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#elif defined(MACHINE_M54455)
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#include "m54455.h"
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#else
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#error Unknown machine!
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#endif
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//#define DBG_FEC
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// #define DBG_FEC
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#ifdef DBG_FEC
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#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0)
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#define dbg(format, arg...) do { xprintf("DEBUG: %s(): " format, __FUNCTION__, ##arg); } while (0)
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#else
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#define dbg(format, arg...) do { ; } while (0)
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#endif /* DBG_FEC */
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@@ -91,11 +94,12 @@ int fec_mii_write(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
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*/
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for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
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{
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wait(1);
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if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII)
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break;
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}
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if(timeout == FEC_MII_TIMEOUT)
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if (timeout == FEC_MII_TIMEOUT)
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return 0;
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/*
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@@ -156,11 +160,12 @@ int fec_mii_read(uint8_t ch, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
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*/
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for (timeout = 0; timeout < FEC_MII_TIMEOUT; timeout++)
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{
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wait(1);
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if (MCF_FEC_EIR(ch) & MCF_FEC_EIR_MII)
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break;
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}
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if(timeout == FEC_MII_TIMEOUT)
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if (timeout == FEC_MII_TIMEOUT)
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return 0;
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/*
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@@ -232,33 +237,33 @@ void fec_log_init(uint8_t ch)
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*/
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void fec_log_dump(uint8_t ch)
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{
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dbg("%s: \r\n FEC%d Log\r\n", __FUNCTION__, ch);
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dbg("%s: ---------------\r\n", __FUNCTION__);
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dbg("%s: Total: %4d\r\n", __FUNCTION__, fec_log[ch].total);
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dbg("%s: hberr: %4d\r\n", __FUNCTION__, fec_log[ch].hberr);
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dbg("%s: babr: %4d\r\n", __FUNCTION__, fec_log[ch].babr);
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dbg("%s: babt: %4d\r\n", __FUNCTION__, fec_log[ch].babt);
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dbg("%s: gra: %4d\r\n", __FUNCTION__, fec_log[ch].gra);
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dbg("%s: txf: %4d\r\n", __FUNCTION__, fec_log[ch].txf);
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dbg("%s: mii: %4d\r\n", __FUNCTION__, fec_log[ch].mii);
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dbg("%s: lc: %4d\r\n", __FUNCTION__, fec_log[ch].lc);
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dbg("%s: rl: %4d\r\n", __FUNCTION__, fec_log[ch].rl);
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dbg("%s: xfun: %4d\r\n", __FUNCTION__, fec_log[ch].xfun);
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dbg("%s: xferr: %4d\r\n", __FUNCTION__, fec_log[ch].xferr);
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dbg("%s: rferr: %4d\r\n", __FUNCTION__, fec_log[ch].rferr);
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dbg("%s: dtxf: %4d\r\n", __FUNCTION__, fec_log[ch].dtxf);
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dbg("%s: drxf: %4d\r\n", __FUNCTION__, fec_log[ch].drxf);
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dbg("%s: \r\nRFSW:\r\n", __FUNCTION__);
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dbg("%s: inv: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_inv);
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dbg("%s: m: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_m);
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dbg("%s: bc: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_bc);
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dbg("%s: mc: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_mc);
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dbg("%s: lg: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_lg);
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dbg("%s: no: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_no);
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dbg("%s: cr: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_cr);
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dbg("%s: ov: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_ov);
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dbg("%s: tr: %4d\r\n", __FUNCTION__, fec_log[ch].rfsw_tr);
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dbg("%s: ---------------\r\n\r\n", __FUNCTION__);
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dbg("\r\n FEC%d Log\r\n", __FUNCTION__, ch);
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dbg(" ---------------\r\n", __FUNCTION__);
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dbg(" Total: %4d\r\n", fec_log[ch].total);
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dbg(" hberr: %4d\r\n", fec_log[ch].hberr);
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dbg(" babr: %4d\r\n", fec_log[ch].babr);
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dbg(" babt: %4d\r\n", fec_log[ch].babt);
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dbg(" gra: %4d\r\n", fec_log[ch].gra);
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dbg(" txf: %4d\r\n", fec_log[ch].txf);
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dbg(" mii: %4d\r\n", fec_log[ch].mii);
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dbg(" lc: %4d\r\n", fec_log[ch].lc);
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dbg(" rl: %4d\r\n", fec_log[ch].rl);
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dbg(" xfun: %4d\r\n", fec_log[ch].xfun);
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dbg(" xferr: %4d\r\n", fec_log[ch].xferr);
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dbg(" rferr: %4d\r\n", fec_log[ch].rferr);
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dbg(" dtxf: %4d\r\n", fec_log[ch].dtxf);
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dbg(" drxf: %4d\r\n", fec_log[ch].drxf);
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dbg(" \r\nRFSW:\r\n");
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dbg(" inv: %4d\r\n", fec_log[ch].rfsw_inv);
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dbg(" m: %4d\r\n", fec_log[ch].rfsw_m);
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dbg(" bc: %4d\r\n", fec_log[ch].rfsw_bc);
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dbg(" mc: %4d\r\n", fec_log[ch].rfsw_mc);
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dbg(" lg: %4d\r\n", fec_log[ch].rfsw_lg);
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dbg(" no: %4d\r\n", fec_log[ch].rfsw_no);
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dbg(" cr: %4d\r\n", fec_log[ch].rfsw_cr);
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dbg(" ov: %4d\r\n", fec_log[ch].rfsw_ov);
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dbg(" tr: %4d\r\n", fec_log[ch].rfsw_tr);
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dbg(" ---------------\r\n\r\n");
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}
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/*
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@@ -481,9 +486,7 @@ void fec_init(uint8_t ch, uint8_t mode, const uint8_t *pa)
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*/
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MCF_FEC_RCR(ch) = 0
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| MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM)
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//#ifdef FEC_PROMISCUOUS
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| MCF_FEC_RCR_PROM
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//#endif
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| MCF_FEC_RCR_FCE;
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if (mode == FEC_MODE_MII)
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@@ -535,19 +538,26 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
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{
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uint32_t initiator;
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int channel;
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#ifdef DBG_FEC
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int res;
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#endif
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/*
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* Make the initiator assignment
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*/
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res = dma_set_initiator(DMA_FEC_RX(ch));
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dbg("%s: dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", __FUNCTION__, ch, res);
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#if defined(DBG_FEC)
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res =
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#else
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(void)
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#endif
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dma_set_initiator(DMA_FEC_RX(ch));
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dbg("dma_set_initiator(DMA_FEC_RX(%d)): %d\r\n", ch, res);
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/*
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* Grab the initiator number
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*/
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initiator = dma_get_initiator(DMA_FEC_RX(ch));
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dbg("%s: dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", __FUNCTION__, ch, initiator);
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dbg("dma_get_initiator(DMA_FEC_RX(%d)) = %d\r\n", ch, initiator);
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/*
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* Determine the DMA channel running the task for the
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@@ -555,7 +565,7 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
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*/
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channel = dma_set_channel(DMA_FEC_RX(ch),
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(ch == 0) ? fec0_rx_frame : fec1_rx_frame);
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dbg("%s: DMA channel for FEC%1d: %d\r\n", __FUNCTION__, ch, channel);
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dbg("DMA channel for FEC%1d: %d\r\n", ch, channel);
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/*
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* Start the Rx DMA task
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@@ -569,18 +579,18 @@ void fec_rx_start(uint8_t ch, int8_t *rxbd)
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0,
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initiator,
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FECRX_DMA_PRI(ch),
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0
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| MCD_FECRX_DMA
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0
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| MCD_FECRX_DMA
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| MCD_INTERRUPT
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| MCD_TT_FLAGS_CW
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| MCD_TT_FLAGS_CW
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| MCD_TT_FLAGS_RL
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| MCD_TT_FLAGS_SP
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,
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0
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0
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| MCD_NO_CSUM
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| MCD_NO_BYTE_SWAP
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);
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dbg("%s: Rx DMA task for FEC%1d started\r\n", __FUNCTION__, ch);
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dbg("Rx DMA task for FEC%1d started\r\n", ch);
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}
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/*
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@@ -604,13 +614,13 @@ void fec_rx_continue(uint8_t ch)
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*/
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channel = dma_get_channel(DMA_FEC_RX(ch));
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dbg("%s: RX DMA channel for FEC%1d is %d\r\n", __FUNCTION__, ch, channel);
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dbg("RX DMA channel for FEC%1d is %d\r\n", ch, channel);
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/*
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* Continue/restart the DMA task
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*/
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MCD_continDma(channel);
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dbg("%s: RX dma on channel %d continued\r\n", __FUNCTION__, channel);
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dbg("RX dma on channel %d continued\r\n", channel);
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}
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/*
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@@ -639,9 +649,9 @@ void fec_rx_stop (uint8_t ch)
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/* Kill the FEC Rx DMA task */
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MCD_killDma(channel);
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/*
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* Free up the FEC requestor from the software maintained
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* initiator list
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/*
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* Free up the FEC requestor from the software maintained
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* initiator list
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*/
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dma_free_initiator(DMA_FEC_RX(ch));
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@@ -653,7 +663,7 @@ void fec_rx_stop (uint8_t ch)
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}
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/*
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* Receive Frame interrupt handler - this handler is called by the
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* Receive Frame interrupt handler - this handler is called by the
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* DMA interrupt handler indicating that a packet was successfully
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* transferred out of the Rx FIFO.
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*
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@@ -668,7 +678,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
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NBUF *cur_nbuf, *new_nbuf;
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int keep;
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dbg("%s: started\r\n", __FUNCTION__);
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dbg("started\r\n");
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while ((pRxBD = fecbd_rx_alloc(ch)) != NULL)
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{
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@@ -681,7 +691,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
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* - No undefined bits should be set
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* - The upper 5 bits of the length should be cleared
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*/
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if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
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if (!(pRxBD->status & RX_BD_L) || (pRxBD->status & 0x0608)
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|| (pRxBD->length & 0xF800))
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{
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keep = false;
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@@ -713,8 +723,8 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
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if (keep)
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{
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/*
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* Pull the network buffer off the Rx ring queue
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/*
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* Pull the network buffer off the Rx ring queue
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*/
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cur_nbuf = nbuf_remove(NBUF_RX_RING);
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@@ -730,7 +740,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
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new_nbuf = nbuf_alloc();
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if (new_nbuf == NULL)
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{
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dbg("%s: nbuf_alloc() failed\n", __FUNCTION__);
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dbg("nbuf_alloc() failed\n");
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/*
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* Can't allocate a new network buffer, so we
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@@ -764,7 +774,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
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/*
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* Let the DMA know that there is a new Rx BD (in case the
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* Let the DMA know that there is a new Rx BD (in case the
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* ring was full and the DMA was waiting for an empty one)
|
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*/
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fec_rx_continue(ch);
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@@ -775,7 +785,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
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eth_hdr = (ETH_HDR *) cur_nbuf->data;
|
||||
|
||||
/*
|
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* Pass the received packet up the network stack if the
|
||||
* Pass the received packet up the network stack if the
|
||||
* protocol is supported in our network interface (NIF)
|
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*/
|
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if (nif_protocol_exist(nif, eth_hdr->type))
|
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@@ -786,12 +796,12 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
|
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else
|
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{
|
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nbuf_free(cur_nbuf);
|
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dbg("%s: got unsupported packet %d, trashed it\r\n", __FUNCTION__, eth_hdr->type);
|
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dbg("got unsupported packet %d, trashed it\r\n", eth_hdr->type);
|
||||
}
|
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}
|
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else
|
||||
else
|
||||
{
|
||||
/*
|
||||
/*
|
||||
* This frame isn't a keeper
|
||||
* Reset the status and length, but don't need to get another
|
||||
* buffer since we are trashing the data in the current one
|
||||
@@ -801,7 +811,7 @@ void fec_rx_frame(uint8_t ch, NIF *nif)
|
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pRxBD->status |= RX_BD_E;
|
||||
|
||||
/*
|
||||
* Move the current buffer from the beginning to the end of the
|
||||
* Move the current buffer from the beginning to the end of the
|
||||
* Rx ring queue
|
||||
*/
|
||||
cur_nbuf = nbuf_remove(NBUF_RX_RING);
|
||||
@@ -841,22 +851,28 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
|
||||
{
|
||||
uint32_t initiator;
|
||||
int channel;
|
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int result;
|
||||
void fec0_tx_frame(void);
|
||||
void fec1_tx_frame(void);
|
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#ifdef DBG_FEC
|
||||
int res;
|
||||
#endif
|
||||
|
||||
/*
|
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* Make the initiator assignment
|
||||
*/
|
||||
res = dma_set_initiator(DMA_FEC_TX(ch));
|
||||
dbg("%s: dma_set_initiator(%d) = %d\r\n", __FUNCTION__, ch, res);
|
||||
#ifdef DBG_FEC
|
||||
res =
|
||||
#else
|
||||
(void)
|
||||
#endif
|
||||
dma_set_initiator(DMA_FEC_TX(ch));
|
||||
dbg("dma_set_initiator(%d) = %d\r\n", ch, res);
|
||||
|
||||
/*
|
||||
* Grab the initiator number
|
||||
*/
|
||||
initiator = dma_get_initiator(DMA_FEC_TX(ch));
|
||||
dbg("%s: dma_get_initiator(%d) = %d\r\n", __FUNCTION__, ch, initiator);
|
||||
dbg("dma_get_initiator(%d) = %d\r\n", ch, initiator);
|
||||
|
||||
|
||||
/*
|
||||
@@ -865,7 +881,7 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
|
||||
*/
|
||||
channel = dma_set_channel(DMA_FEC_TX(ch),
|
||||
(ch == 0) ? fec0_tx_frame : fec1_tx_frame);
|
||||
dbg("%s: dma_set_channel(%d, ...) = %d\r\n", __FUNCTION__, ch, channel);
|
||||
dbg("dma_set_channel(%d, ...) = %d\r\n", ch, channel);
|
||||
|
||||
/*
|
||||
* Start the Tx DMA task
|
||||
@@ -879,18 +895,18 @@ void fec_tx_start(uint8_t ch, int8_t *txbd)
|
||||
0,
|
||||
initiator,
|
||||
FECTX_DMA_PRI(ch),
|
||||
0
|
||||
| MCD_FECTX_DMA
|
||||
0
|
||||
| MCD_FECTX_DMA
|
||||
| MCD_INTERRUPT
|
||||
| MCD_TT_FLAGS_CW
|
||||
| MCD_TT_FLAGS_CW
|
||||
| MCD_TT_FLAGS_RL
|
||||
| MCD_TT_FLAGS_SP
|
||||
,
|
||||
0
|
||||
0
|
||||
| MCD_NO_CSUM
|
||||
| MCD_NO_BYTE_SWAP
|
||||
);
|
||||
dbg("%s: DMA tx task started\r\n", __FUNCTION__);
|
||||
dbg("DMA tx task started\r\n");
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -913,14 +929,13 @@ void fec_tx_continue(uint8_t ch)
|
||||
* selected FEC
|
||||
*/
|
||||
channel = dma_get_channel(DMA_FEC_TX(ch));
|
||||
dbg("%s: dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n",
|
||||
__FUNCTION__, ch, channel);
|
||||
dbg("dma_get_channel(DMA_FEC_TX(%d)) = %d\r\n", ch, channel);
|
||||
|
||||
/*
|
||||
* Continue/restart the DMA task
|
||||
*/
|
||||
MCD_continDma(channel);
|
||||
dbg("%s: DMA TX task continue\r\n", __FUNCTION__);
|
||||
dbg("DMA TX task continue\r\n");
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -967,9 +982,9 @@ void fec_tx_stop(uint8_t ch)
|
||||
/* Kill the FEC Tx DMA task */
|
||||
MCD_killDma(channel);
|
||||
|
||||
/*
|
||||
* Free up the FEC requestor from the software maintained
|
||||
* initiator list
|
||||
/*
|
||||
* Free up the FEC requestor from the software maintained
|
||||
* initiator list
|
||||
*/
|
||||
dma_free_initiator(DMA_FEC_TX(ch));
|
||||
|
||||
@@ -981,7 +996,7 @@ void fec_tx_stop(uint8_t ch)
|
||||
}
|
||||
|
||||
/*
|
||||
* Trasmit Frame interrupt handler - this handler is called by the
|
||||
* Trasmit Frame interrupt handler - this handler is called by the
|
||||
* DMA interrupt handler indicating that a packet was successfully
|
||||
* transferred to the Tx FIFO.
|
||||
*
|
||||
@@ -994,7 +1009,7 @@ void fec_tx_frame(uint8_t ch)
|
||||
NBUF *pNbuf;
|
||||
bool is_empty = true;
|
||||
|
||||
dbg("%s:\r\n", __FUNCTION__);
|
||||
dbg("\r\n");
|
||||
while ((pTxBD = fecbd_tx_free(ch)) != NULL)
|
||||
{
|
||||
fec_log[ch].dtxf++;
|
||||
@@ -1008,7 +1023,7 @@ void fec_tx_frame(uint8_t ch)
|
||||
* Free up the network buffer that was just transmitted
|
||||
*/
|
||||
nbuf_free(pNbuf);
|
||||
dbg("%s: free buffer %p from TX ring\r\n", __FUNCTION__, pNbuf);
|
||||
dbg("free buffer %p from TX ring\r\n", pNbuf);
|
||||
|
||||
/*
|
||||
* Re-initialize the Tx BD
|
||||
@@ -1017,9 +1032,9 @@ void fec_tx_frame(uint8_t ch)
|
||||
pTxBD->length = 0;
|
||||
is_empty = false;
|
||||
|
||||
}
|
||||
}
|
||||
if (is_empty)
|
||||
dbg("%s: transmit queue was empty!\r\n", __FUNCTION__);
|
||||
dbg("transmit queue was empty!\r\n");
|
||||
}
|
||||
|
||||
void fec0_tx_frame(void)
|
||||
@@ -1042,7 +1057,7 @@ void fec1_tx_frame(void)
|
||||
* dst Destination MAC Address
|
||||
* src Source MAC Address
|
||||
* type Ethernet Frame Type
|
||||
* length Number of bytes to be transmitted (doesn't include type,
|
||||
* length Number of bytes to be transmitted (doesn't include type,
|
||||
* src, or dest byte count)
|
||||
* pkt Pointer packet network buffer
|
||||
*
|
||||
@@ -1057,14 +1072,14 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
|
||||
/* Check the length */
|
||||
if ((nbuf->length + ETH_HDR_LEN) > ETH_MTU)
|
||||
{
|
||||
dbg("%s: nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
|
||||
__FUNCTION__, nbuf->length, ETH_HDR_LEN, ETH_MTU);
|
||||
dbg("nbuf->length (%d) + ETH_HDR_LEN (%d) exceeds ETH_MTU (%d)\r\n",
|
||||
nbuf->length, ETH_HDR_LEN, ETH_MTU);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Copy the destination address, source address, and Ethernet
|
||||
* type into the packet
|
||||
/*
|
||||
* Copy the destination address, source address, and Ethernet
|
||||
* type into the packet
|
||||
*/
|
||||
memcpy(&nbuf->data[0], dst, 6);
|
||||
memcpy(&nbuf->data[6], src, 6);
|
||||
@@ -1080,7 +1095,7 @@ int fec_send(uint8_t ch, NIF *nif, uint8_t *dst, uint8_t *src, uint16_t type, NB
|
||||
*/
|
||||
nbuf_add(NBUF_TX_RING, nbuf);
|
||||
|
||||
/*
|
||||
/*
|
||||
* Setup the buffer descriptor for transmission
|
||||
*/
|
||||
pTxBD->data = nbuf->data;
|
||||
@@ -1190,7 +1205,7 @@ static void fec_irq_handler(uint8_t ch)
|
||||
event = eir & MCF_FEC_EIMR(ch);
|
||||
|
||||
if (event != eir)
|
||||
dbg("%s: pending but not enabled: 0x%08x\r\n", __FUNCTION__, (event ^ eir));
|
||||
dbg("pending but not enabled: 0x%08x\r\n", (event ^ eir));
|
||||
|
||||
/*
|
||||
* Clear the event(s) in the EIR immediately
|
||||
@@ -1201,8 +1216,8 @@ static void fec_irq_handler(uint8_t ch)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].rferr++;
|
||||
dbg("%s: RFERR\r\n", __FUNCTION__);
|
||||
dbg("%s: FECRFSR%d = 0x%08x\r\n", __FUNCTION__, ch, MCF_FEC_FECRFSR(ch));
|
||||
dbg("RFERR\r\n");
|
||||
dbg("FECRFSR%d = 0x%08x\r\n", ch, MCF_FEC_FECRFSR(ch));
|
||||
//fec_eth_stop(ch);
|
||||
}
|
||||
|
||||
@@ -1210,14 +1225,14 @@ static void fec_irq_handler(uint8_t ch)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].xferr++;
|
||||
dbg("%s: XFERR\r\n", __FUNCTION__);
|
||||
dbg("XFERR\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_XFUN)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].xfun++;
|
||||
dbg("%s: XFUN\r\n", __FUNCTION__);
|
||||
dbg("XFUN\r\n");
|
||||
//fec_eth_stop(ch);
|
||||
}
|
||||
|
||||
@@ -1225,54 +1240,54 @@ static void fec_irq_handler(uint8_t ch)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].rl++;
|
||||
dbg("%s: RL\r\n", __FUNCTION__);
|
||||
dbg("RL\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_LC)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].lc++;
|
||||
dbg("%s: LC\r\n", __FUNCTION__);
|
||||
dbg("LC\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_MII)
|
||||
{
|
||||
fec_log[ch].mii++;
|
||||
dbg("%s: MII\r\n", __FUNCTION__);
|
||||
dbg("MII\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_TXF)
|
||||
{
|
||||
fec_log[ch].txf++;
|
||||
dbg("%s: TXF\r\n", __FUNCTION__);
|
||||
dbg("TXF\r\n");
|
||||
fec_log_dump(0);
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_GRA)
|
||||
{
|
||||
fec_log[ch].gra++;
|
||||
dbg("%s: GRA\r\n", __FUNCTION__);
|
||||
dbg("GRA\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_BABT)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].babt++;
|
||||
dbg("%s: BABT\r\n", __FUNCTION__);
|
||||
dbg("BABT\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_BABR)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].babr++;
|
||||
dbg("%s: BABR\r\n", __FUNCTION__);
|
||||
dbg("BABR\r\n");
|
||||
}
|
||||
|
||||
if (event & MCF_FEC_EIR_HBERR)
|
||||
{
|
||||
fec_log[ch].total++;
|
||||
fec_log[ch].hberr++;
|
||||
dbg("%s: HBERR\r\n", __FUNCTION__);
|
||||
dbg("HBERR\r\n");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1282,7 +1297,7 @@ static void fec_irq_handler(uint8_t ch)
|
||||
*/
|
||||
int fec0_interrupt_handler(void* arg1, void* arg2)
|
||||
{
|
||||
(void) arg1;
|
||||
(void) arg1; /* not used */
|
||||
(void) arg2;
|
||||
|
||||
fec_irq_handler(0);
|
||||
@@ -1292,7 +1307,7 @@ int fec0_interrupt_handler(void* arg1, void* arg2)
|
||||
|
||||
int fec1_interrupt_handler(void* arg1, void* arg2)
|
||||
{
|
||||
(void) arg1;
|
||||
(void) arg1; /* not used */
|
||||
(void) arg2;
|
||||
|
||||
fec_irq_handler(1);
|
||||
@@ -1342,9 +1357,9 @@ void fec_eth_setup(uint8_t ch, uint8_t trcvr, uint8_t speed, uint8_t duplex, con
|
||||
*/
|
||||
#if defined(MACHINE_FIREBEE)
|
||||
if (am79c874_init(0, 0, speed, duplex))
|
||||
dbg("%s: PHY init completed\r\n", __FUNCTION__);
|
||||
dbg("PHY init completed\r\n");
|
||||
else
|
||||
dbg("%s: PHY init failed\r\n", __FUNCTION__);
|
||||
dbg("PHY init failed\r\n");
|
||||
#elif defined(MACHINE_M548X)
|
||||
bcm_5222_init(0, 0, speed, duplex);
|
||||
#else
|
||||
@@ -1397,7 +1412,7 @@ void fec_eth_stop(uint8_t ch)
|
||||
*/
|
||||
level = set_ipl(7);
|
||||
|
||||
dbg("%s: fec %d stopped\r\n", __FUNCTION__, ch);
|
||||
dbg("fec %d stopped\r\n", ch);
|
||||
/*
|
||||
* Gracefully disable the receiver and transmitter
|
||||
*/
|
||||
@@ -1419,12 +1434,12 @@ void fec_eth_stop(uint8_t ch)
|
||||
fec_log_dump(ch);
|
||||
#endif
|
||||
|
||||
/*
|
||||
/*
|
||||
* Flush the network buffers
|
||||
*/
|
||||
nbuf_flush();
|
||||
|
||||
/*
|
||||
/*
|
||||
* Restore interrupt level
|
||||
*/
|
||||
set_ipl(level);
|
||||
|
||||
Reference in New Issue
Block a user