finally, we reach the BaS() code which dies when enabling interrupts (exception routine bad?)
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@@ -60,21 +60,21 @@ void BaS(void)
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//MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */
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//MCF_PSC3_PSCTB_8BIT = 0x01; /* request RTC data */
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* (uint8_t *) &_MBAR[0x890C] = 0x01;
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* (volatile uint8_t *) &_MBAR[0x890C] = 0x01;
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//if (MCF_PSC3_PSCRB_8BIT == 0x81)
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//if (MCF_PSC3_PSCRB_8BIT == 0x81)
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if (* (uint8_t *) &_MBAR[0X890C] == 0x81)
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if (* (volatile uint8_t *) &_MBAR[0X890C] == 0x81)
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{
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{
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for (i = 0; i < 64; i++)
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for (i = 0; i < 64; i++)
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{
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{
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* (uint8_t *) 0xffff8963 = (uint8_t) MCF_PSC3_PSCRB_8BIT; /* Copy the NVRAM data from the PIC to the FPGA */
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* (volatile int8_t *) 0xffff8963 = (uint8_t) MCF_PSC3_PSCRB_8BIT; /* Copy the NVRAM data from the PIC to the FPGA */
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}
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}
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}
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}
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xprintf("copy EmuTOS: ");
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xprintf("copy EmuTOS: ");
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/* copy EMUTOS */
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/* copy EMUTOS */
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src = (uint8_t *)EMUTOS;
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src = (uint8_t *) EMUTOS;
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while (src < (uint8_t *)(EMUTOS + EMUTOS_SIZE))
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while (src < (uint8_t *)(EMUTOS + EMUTOS_SIZE))
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{
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{
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*dst++ = *src++;
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*dst++ = *src++;
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@@ -97,7 +97,7 @@ void BaS(void)
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/* interrupts */
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/* interrupts */
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xprintf("enable interrupts: ");
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xprintf("enable interrupts: ");
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* (uint32_t *) 0xf0010004 = 0L; /* disable all interrupts */
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* (volatile uint32_t *) 0xf0010004 = 0L; /* disable all interrupts */
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MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */
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MCF_EPORT_EPPAR = 0xaaa8; /* all interrupts on falling edge */
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MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) | /* timer 0 on, video change capture on rising edge */
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MCF_GPT0_GMS = MCF_GPT_GMS_ICT(1) | /* timer 0 on, video change capture on rising edge */
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@@ -105,7 +105,7 @@ void BaS(void)
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MCF_GPT_GMS_TMS(1);
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MCF_GPT_GMS_TMS(1);
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MCF_INTC_ICR62 = 0x3f;
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MCF_INTC_ICR62 = 0x3f;
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* (uint8_t *) 0xf0010004 = 0xfe; /* enable int 1-7 */
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* (volatile uint8_t *) 0xf0010004 = 0xfe; /* enable int 1-7 */
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MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */
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MCF_EPORT_EPIER = 0xfe; /* int 1-7 on */
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MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */
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MCF_EPORT_EPFR = 0xff; /* clear all pending interrupts */
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MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */
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MCF_INTC_IMRL = 0xffffff00; /* int 1-7 on */
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@@ -116,21 +116,21 @@ void BaS(void)
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xprintf("IDE reset: ");
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xprintf("IDE reset: ");
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/* IDE reset */
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/* IDE reset */
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* (uint8_t *) (0xffff8802 - 2) = 14;
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* (volatile uint8_t *) (0xffff8802 - 2) = 14;
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* (uint8_t *) (0xffff8802 - 0) = 0x80;
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* (volatile uint8_t *) (0xffff8802 - 0) = 0x80;
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wait_1ms();
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wait_1ms();
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* (uint8_t *) (0xffff8802 - 0) = 0;
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* (volatile uint8_t *) (0xffff8802 - 0) = 0;
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xprintf("finished\r\n");
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xprintf("finished\r\n");
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/*
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/*
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* video setup (25MHz)
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* video setup (25MHz)
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*/
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*/
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* (uint32_t *) (0xf0000410 + 0) = 0x032002ba; /* horizontal 640x480 */
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* (volatile uint32_t *) (0xf0000410 + 0) = 0x032002ba; /* horizontal 640x480 */
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* (uint32_t *) (0xf0000410 + 4) = 0x020c020a; /* vertical 640x480 */
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* (volatile uint32_t *) (0xf0000410 + 4) = 0x020c020a; /* vertical 640x480 */
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* (uint32_t *) (0xf0000410 + 8) = 0x0190015d; /* horizontal 320x240 */
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* (volatile uint32_t *) (0xf0000410 + 8) = 0x0190015d; /* horizontal 320x240 */
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* (uint32_t *) (0xf0000410 + 12) = 0x020C020A; /* vertical 320x230 */
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* (volatile uint32_t *) (0xf0000410 + 12) = 0x020C020A; /* vertical 320x230 */
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#ifdef _NOT_USED_
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#ifdef _NOT_USED_
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// 32MHz
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// 32MHz
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@@ -141,7 +141,7 @@ void BaS(void)
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#endif /* _NOT_USED_ */
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#endif /* _NOT_USED_ */
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/* fifo on, refresh on, ddrcs and cke on, video dac on */
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/* fifo on, refresh on, ddrcs and cke on, video dac on */
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* (uint32_t *) (0xf0000410 - 0x20) = 0x01070002;
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* (volatile uint32_t *) (0xf0000410 - 0x20) = 0x01070002;
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/*
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/*
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* memory setup
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* memory setup
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@@ -153,7 +153,7 @@ void BaS(void)
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*adr++ = 0x0L;
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*adr++ = 0x0L;
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}
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}
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* (uint8_t *) 0xffff8007 = 0x48; /* FIXME: what's that ? */
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* (volatile uint8_t *) 0xffff8007 = 0x48; /* FIXME: what's that ? */
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/* ST RAM */
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/* ST RAM */
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