diff --git a/BaS_gcc/BaS_gcc.files b/BaS_gcc/BaS_gcc.files index 4608d31..cc1783c 100644 --- a/BaS_gcc/BaS_gcc.files +++ b/BaS_gcc/BaS_gcc.files @@ -198,3 +198,6 @@ util/wait.c bas.lk.in i2c/i2c.c Makefile +x86emu/x86biosemu.c +x86emu/x86emu.c +x86emu/x86pcibios.c diff --git a/BaS_gcc/Makefile b/BaS_gcc/Makefile index 0d9a7ec..d3ff0c3 100644 --- a/BaS_gcc/Makefile +++ b/BaS_gcc/Makefile @@ -131,15 +131,7 @@ CSRCS= \ radeon_monitor.c \ fnt_st_8x16.c \ \ - x86decode.c \ - x86sys.c \ - x86debug.c \ - x86prim_ops.c \ - x86ops.c \ - x86ops2.c \ - x86fpu.c \ - x86biosemu.c \ - x86pcibios.c \ + x86emu.c \ \ basflash.c \ basflash_start.c diff --git a/BaS_gcc/bas.lk.in b/BaS_gcc/bas.lk.in index 749104b..35c854a 100644 --- a/BaS_gcc/bas.lk.in +++ b/BaS_gcc/bas.lk.in @@ -93,15 +93,7 @@ SECTIONS OBJDIR/fbmodedb.o(.text) OBJDIR/offscreen.o(.text) - OBJDIR/x86decode.o(.text) - OBJDIR/x86ops.o(.text) - OBJDIR/x86ops2.o(.text) - OBJDIR/x86fpu.o(.text) - OBJDIR/x86sys.o(.text) - OBJDIR/x86biosemu.o(.text) - OBJDIR/x86debug.o(.text) - OBJDIR/x86prim_ops.o(.text) - OBJDIR/x86pcibios.o(.text) + OBJDIR/x86emu.o(.text) OBJDIR/radeon_base.o(.text) OBJDIR/radeon_accel.o(.text) diff --git a/BaS_gcc/include/x86debug.h b/BaS_gcc/include/x86debug.h deleted file mode 100644 index f2fbea1..0000000 --- a/BaS_gcc/include/x86debug.h +++ /dev/null @@ -1,241 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for debug definitions. -* -****************************************************************************/ -/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/debug.h,v 1.4 2000/11/21 23:10:27 tsi Exp $ */ - -#include -#include "bas_printf.h" - -/* - * for the X86 emulator, debug cannot be enabled and disabled on a per-file mode - * as with all the other modules. It must be centrally enabled here. - */ - -#define DBG_X86EMU - -#ifdef DBG_X86EMU -#define dbg(format, arg...) do { xprintf("DEBUG: " format, ##arg); } while (0) -#else -#define dbg(format, arg...) do { ; } while (0) -#endif /* DBG_X86EMU */ - -#ifndef __X86EMU_DEBUG_H -#define __X86EMU_DEBUG_H - -/*---------------------- Macros and type definitions ----------------------*/ - -/* checks to be enabled for "runtime" */ - -#define CHECK_IP_FETCH_F 0x1 -#define CHECK_SP_ACCESS_F 0x2 -#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */ -#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/ - -#ifdef DBG_X86EMU -# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F) -# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F) -# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F) -# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F) -#else -# define CHECK_IP_FETCH() -# define CHECK_SP_ACCESS() -# define CHECK_MEM_ACCESS() -# define CHECK_DATA_ACCESS() -#endif - -#ifdef DBG_X86EMU -# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F) -# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F) -# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F) -# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F) -# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F) -# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F) -# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F) -# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_IP_CS_F) - -# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F) -# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F) -# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F) -# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F) -# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F) -# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F) -# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F) -# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F) -# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F) -#else -# define DEBUG_INSTRUMENT() 0 -# define DEBUG_DECODE() 0 -# define DEBUG_TRACE() 0 -# define DEBUG_STEP() 0 -# define DEBUG_DISASSEMBLE() 0 -# define DEBUG_BREAK() 0 -# define DEBUG_SVC() 0 -# define DEBUG_SAVE_IP_CS() 0 -# define DEBUG_FS() 0 -# define DEBUG_PROC() 0 -# define DEBUG_SYSINT() 0 -# define DEBUG_TRACECALL() 0 -# define DEBUG_TRACECALLREGS() 0 -# define DEBUG_SYS() 0 -# define DEBUG_MEM_TRACE() 0 -# define DEBUG_IO_TRACE() 0 -# define DEBUG_DECODE_NOPRINT() 0 -#endif - -#ifdef DBG_X86EMU - -# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \ - x86emu_decode_printf(x) -# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \ - x86emu_decode_printf2(x,y) - -/* - * The following allow us to look at the bytes of an instruction. The - * first INCR_INSTRN_LEN, is called everytime bytes are consumed in - * the decoding process. The SAVE_IP_CS is called initially when the - * major opcode of the instruction is accessed. - */ -#define INC_DECODED_INST_LEN(x) \ - if (DEBUG_DECODE()) \ - x86emu_inc_decoded_inst_len(x) - -#define SAVE_IP_CS(x,y) \ - if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \ - | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \ - M.x86.saved_cs = x; \ - M.x86.saved_ip = y; \ - } -#else -# define INC_DECODED_INST_LEN(x) -# define DECODE_PRINTF(x) -# define DECODE_PRINTF2(x,y) -# define SAVE_IP_CS(x,y) -#endif - -#ifdef DBG_X86EMU -#define TRACE_REGS() \ - if (DEBUG_DISASSEMBLE()) { \ - x86emu_just_disassemble(); \ - goto EndOfTheInstructionProcedure; \ - } \ - if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs() -#else -# define TRACE_REGS() -#endif - -#ifdef DBG_X86EMU -# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step() -#else -# define SINGLE_STEP() -#endif - -#define TRACE_AND_STEP() \ - TRACE_REGS(); \ - SINGLE_STEP() - -#ifdef DBG_X86EMU -# define START_OF_INSTR() -# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr(); -# define END_OF_INSTR_NO_TRACE() x86emu_end_instr(); -#else -# define START_OF_INSTR() -# define END_OF_INSTR() -# define END_OF_INSTR_NO_TRACE() -#endif - -#ifdef DBG_X86EMU -# define CALL_TRACE(u,v,w,x,s) \ - if (DEBUG_TRACECALLREGS()) \ - x86emu_dump_regs(); \ - if (DEBUG_TRACECALL()) { \ - xprintf("%x", u); \ - xprintf(":%x", v); \ - xprintf(": CALL "); \ - xprintf("%x", s); \ - xprintf(" %x", w); \ - xprintf(":%x", x); \ - xprintf("%s", "\r\n"); \ - } - -# define RETURN_TRACE(n,u,v) \ - if (DEBUG_TRACECALLREGS()) \ - x86emu_dump_regs(); \ - if (DEBUG_TRACECALL()) \ - { \ - xprintf("%x", (unsigned long)u); \ - xprintf(":%x", (unsigned long)v); \ - xprintf(": CALL "); \ - xprintf("%x", n); \ - xprintf("\r\n"); \ - } -#else -# define CALL_TRACE(u,v,w,x,s) -# define RETURN_TRACE(n,u,v) -#endif - -#ifdef DBG_X86EMU -#define DB(x) x -#else -#define DB(x) -#endif - -/*-------------------------- Function Prototypes --------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -extern void x86emu_inc_decoded_inst_len (int x); -extern void x86emu_decode_printf (char *x); -extern void x86emu_decode_printf2 (char *x, int y); -extern void x86emu_just_disassemble (void); -extern void x86emu_single_step (void); -extern void x86emu_end_instr (void); -extern void x86emu_dump_regs (void); -extern void x86emu_dump_xregs (void); -extern void x86emu_print_int_vect (uint16_t iv); -extern void x86emu_instrument_instruction (void); -extern void x86emu_check_ip_access (void); -extern void x86emu_check_sp_access (void); -extern void x86emu_check_mem_access (uint32_t p); -extern void x86emu_check_data_access (unsigned int s, unsigned int o); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_DEBUG_H */ diff --git a/BaS_gcc/include/x86decode.h b/BaS_gcc/include/x86decode.h deleted file mode 100644 index d3ce488..0000000 --- a/BaS_gcc/include/x86decode.h +++ /dev/null @@ -1,89 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for instruction decoding logic. -* -****************************************************************************/ - -#ifndef __X86EMU_DECODE_H -#define __X86EMU_DECODE_H - -/*---------------------- Macros and type definitions ----------------------*/ - -/* Instruction Decoding Stuff */ - -#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl) -#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r) -#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r) -#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r) -#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK - -/*-------------------------- Function Prototypes --------------------------*/ - -#include "bas_types.h" - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -void x86emu_intr_raise(uint8_t type); -void fetch_decode_modrm(int *mod, int *regh, int *regl); -uint8_t fetch_byte_imm(void); -uint16_t fetch_word_imm(void); -uint32_t fetch_long_imm(void); -uint8_t fetch_data_byte(unsigned int offset); -uint8_t fetch_data_byte_abs(unsigned int segment, unsigned int offset); -uint16_t fetch_data_word(unsigned int offset); -uint16_t fetch_data_word_abs(unsigned int segment, unsigned int offset); -uint32_t fetch_data_long(unsigned int offset); -uint32_t fetch_data_long_abs(unsigned int segment, unsigned int offset); -void store_data_byte(unsigned int offset, uint8_t val); -void store_data_byte_abs(unsigned int segment, unsigned int offset, uint8_t val); -void store_data_word(unsigned int offset, uint16_t val); -void store_data_word_abs(unsigned int segment, unsigned int offset, uint16_t val); -void store_data_long(unsigned int offset, uint32_t val); -void store_data_long_abs(unsigned int segment, unsigned int offset, uint32_t val); -uint8_t *decode_rm_byte_register(int reg); -uint16_t *decode_rm_word_register(int reg); -uint32_t *decode_rm_long_register(int reg); -uint16_t *decode_rm_seg_register(int reg); -unsigned decode_rm00_address(int rm); -unsigned decode_rm01_address(int rm); -unsigned decode_rm10_address(int rm); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_DECODE_H */ diff --git a/BaS_gcc/include/x86emu.h b/BaS_gcc/include/x86emu.h index 7bd2f1d..f0bb529 100644 --- a/BaS_gcc/include/x86emu.h +++ b/BaS_gcc/include/x86emu.h @@ -1,192 +1,159 @@ +/* $NetBSD: x86emu.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */ + /**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1996-1999 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: Header file for public specific functions. - * Any application linking against us should only - * include this header - * - ****************************************************************************/ -/* $XFree86: xc/extras/x86emu/include/x86emu.h,v 1.2 2000/11/21 23:10:25 tsi Exp $ */ +* +* Realmode X86 Emulator Library +* +* Copyright (C) 1996-1999 SciTech Software, Inc. +* Copyright (C) David Mosberger-Tang +* Copyright (C) 1999 Egbert Eich +* Copyright (C) 2007 Joerg Sonnenberger +* +* ======================================================================== +* +* Permission to use, copy, modify, distribute, and sell this software and +* its documentation for any purpose is hereby granted without fee, +* provided that the above copyright notice appear in all copies and that +* both that copyright notice and this permission notice appear in +* supporting documentation, and that the name of the authors not be used +* in advertising or publicity pertaining to distribution of the software +* without specific, written prior permission. The authors makes no +* representations about the suitability of this software for any purpose. +* It is provided "as is" without express or implied warranty. +* +* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO +* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR +* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF +* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR +* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +* PERFORMANCE OF THIS SOFTWARE. +* +****************************************************************************/ #ifndef __X86EMU_X86EMU_H #define __X86EMU_X86EMU_H #include "bas_types.h" -#define X86API -#define X86APIP * -#include "x86regs.h" -typedef uint16_t X86EMU_pioAddr; -/*---------------------- Macros and type definitions ----------------------*/ +/* + * General EAX, EBX, ECX, EDX type registers. Note that for + * portability, and speed, the issue of byte swapping is not addressed + * in the registers. All registers are stored in the default format + * available on the host machine. The only critical issue is that the + * registers should line up EXACTLY in the same manner as they do in + * the 386. That is: + * + * EAX & 0xff === AL + * EAX & 0xffff == AX + * + * etc. The result is that alot of the calculations can then be + * done using the native instruction set fully. + */ -//#pragma pack(1) -/**************************************************************************** -REMARKS: -Data structure containing ponters to programmed I/O functions used by the -emulator. This is used so that the user program can hook all programmed -I/O for the emulator to handled as necessary by the user program. By -default the emulator contains simple functions that do not do access the -hardware in any way. To allow the emualtor access the hardware, you will -need to override the programmed I/O functions using the X86EMU_setupPioFuncs -function. +struct X86EMU_register32 { + uint32_t e_reg; +}; -HEADER: -x86emu.h +struct X86EMU_register16 { + uint16_t filler0; + uint16_t x_reg; +}; -MEMBERS: -inb - Function to read a byte from an I/O port -inw - Function to read a word from an I/O port -inl - Function to read a dword from an I/O port -outb - Function to write a byte to an I/O port -outw - Function to write a word to an I/O port -outl - Function to write a dword to an I/O port - ****************************************************************************/ -typedef struct -{ - uint8_t (X86APIP inb)(X86EMU_pioAddr addr); - uint16_t (X86APIP inw)(X86EMU_pioAddr addr); - uint32_t (X86APIP inl)(X86EMU_pioAddr addr); - void (X86APIP outb)(X86EMU_pioAddr addr, uint8_t val); - void (X86APIP outw)(X86EMU_pioAddr addr, uint16_t val); - void (X86APIP outl)(X86EMU_pioAddr addr, uint32_t val); -} X86EMU_pioFuncs; +struct X86EMU_register8 { + uint8_t filler0, filler1; + uint8_t h_reg, l_reg; +}; -/**************************************************************************** -REMARKS: -Data structure containing ponters to memory access functions used by the -emulator. This is used so that the user program can hook all memory -access functions as necessary for the emulator. By default the emulator -contains simple functions that only access the internal memory of the -emulator. If you need specialised functions to handle access to different -types of memory (ie: hardware framebuffer accesses and BIOS memory access -etc), you will need to override this using the X86EMU_setupMemFuncs -function. -HEADER: -x86emu.h +union X86EMU_register { + struct X86EMU_register32 I32_reg; + struct X86EMU_register16 I16_reg; + struct X86EMU_register8 I8_reg; +}; -MEMBERS: -rdb - Function to read a byte from an address -rdw - Function to read a word from an address -rdl - Function to read a dword from an address -wrb - Function to write a byte to an address -wrw - Function to write a word to an address -wrl - Function to write a dword to an address - ****************************************************************************/ -typedef struct { - uint8_t (X86APIP rdb)(uint32_t addr); - uint16_t (X86APIP rdw)(uint32_t addr); - uint32_t (X86APIP rdl)(uint32_t addr); - void (X86APIP wrb)(uint32_t addr, uint8_t val); - void (X86APIP wrw)(uint32_t addr, uint16_t val); - void (X86APIP wrl)(uint32_t addr, uint32_t val); -} X86EMU_memFuncs; +struct X86EMU_regs { + uint16_t register_cs; + uint16_t register_ds; + uint16_t register_es; + uint16_t register_fs; + uint16_t register_gs; + uint16_t register_ss; + uint32_t register_flags; + union X86EMU_register register_a; + union X86EMU_register register_b; + union X86EMU_register register_c; + union X86EMU_register register_d; -/**************************************************************************** - Here are the default memory read and write - function in case they are needed as fallbacks. - ***************************************************************************/ -extern uint8_t X86API rdb(uint32_t addr); -extern uint16_t X86API rdw(uint32_t addr); -extern uint32_t X86API rdl(uint32_t addr); -extern void X86API wrb(uint32_t addr, uint8_t val); -extern void X86API wrw(uint32_t addr, uint16_t val); -extern void X86API wrl(uint32_t addr, uint32_t val); + union X86EMU_register register_sp; + union X86EMU_register register_bp; + union X86EMU_register register_si; + union X86EMU_register register_di; + union X86EMU_register register_ip; -//#pragma pack() + /* + * MODE contains information on: + * REPE prefix 2 bits repe,repne + * SEGMENT overrides 5 bits normal,DS,SS,CS,ES + * Delayed flag set 3 bits (zero, signed, parity) + * reserved 6 bits + * interrupt # 8 bits instruction raised interrupt + * BIOS video segregs 4 bits + * Interrupt Pending 1 bits + * Extern interrupt 1 bits + * Halted 1 bits + */ + uint32_t mode; + volatile int intr; /* mask of pending interrupts */ + uint8_t intno; + uint8_t __pad[3]; +}; -/*--------------------- type definitions -----------------------------------*/ +typedef uint32_t label_t; -typedef void (X86APIP X86EMU_intrFuncs)(int num); -extern X86EMU_intrFuncs _X86EMU_intrTab[256]; +struct X86EMU { + char *mem_base; + size_t mem_size; + void *sys_private; + struct X86EMU_regs x86; -/*-------------------------- Function Prototypes --------------------------*/ + label_t exec_state; -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif + uint64_t cur_cycles; - void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs); - void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs); - void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]); - void X86EMU_prepareForInt(int num); + unsigned int cur_mod:2; + unsigned int cur_rl:3; + unsigned int cur_rh:3; + uint32_t cur_offset; - /* decode.c */ + uint8_t (*emu_rdb)(struct X86EMU *, uint32_t addr); + uint16_t (*emu_rdw)(struct X86EMU *, uint32_t addr); + uint32_t (*emu_rdl)(struct X86EMU *, uint32_t addr); + void (*emu_wrb)(struct X86EMU *, uint32_t addr,uint8_t val); + void (*emu_wrw)(struct X86EMU *, uint32_t addr, uint16_t val); + void (*emu_wrl)(struct X86EMU *, uint32_t addr, uint32_t val); - void X86EMU_exec(void); - void X86EMU_halt_sys(void); + uint8_t (*emu_inb)(struct X86EMU *, uint16_t addr); + uint16_t (*emu_inw)(struct X86EMU *, uint16_t addr); + uint32_t (*emu_inl)(struct X86EMU *, uint16_t addr); + void (*emu_outb)(struct X86EMU *, uint16_t addr, uint8_t val); + void (*emu_outw)(struct X86EMU *, uint16_t addr, uint16_t val); + void (*emu_outl)(struct X86EMU *, uint16_t addr, uint32_t val); -#ifdef DBG_X86EMU -#define HALT_SYS() \ - dbg("%s: halt_sys: file %s line %d\r\n", __FUNCTION__, __FILE__, __LINE__);\ - X86EMU_halt_sys(); -#else -#define HALT_SYS() X86EMU_halt_sys() -#endif + void (*_X86EMU_intrTab[256])(struct X86EMU *, int); +}; - /* Debug options */ -#define DEBUG_DECODE_F 0x000001 /* print decoded instruction */ -#define DEBUG_TRACE_F 0x000002 /* dump regs before/after execution */ -#define DEBUG_STEP_F 0x000004 -#define DEBUG_DISASSEMBLE_F 0x000008 -#define DEBUG_BREAK_F 0x000010 -#define DEBUG_SVC_F 0x000020 -#define DEBUG_FS_F 0x000080 -#define DEBUG_PROC_F 0x000100 -#define DEBUG_SYSINT_F 0x000200 /* bios system interrupts. */ -#define DEBUG_TRACECALL_F 0x000400 -#define DEBUG_INSTRUMENT_F 0x000800 -#define DEBUG_MEM_TRACE_F 0x001000 -#define DEBUG_IO_TRACE_F 0x002000 -#define DEBUG_TRACECALL_REGS_F 0x004000 -#define DEBUG_DECODE_NOPRINT_F 0x008000 -#define DEBUG_SAVE_IP_CS_F 0x010000 -#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F) +void X86EMU_init_default(struct X86EMU *); - void X86EMU_trace_regs(void); - void X86EMU_trace_xregs(void); - void X86EMU_dump_memory(uint16_t seg, uint16_t off, uint32_t amt); - int X86EMU_trace_on(void); - int X86EMU_trace_off(void); - int X86EMU_set_debug(int debug); - void X86EMU_setMemBase(void *base, unsigned long size); +/* decode.c */ + +void X86EMU_exec(struct X86EMU *); +void X86EMU_exec_call(struct X86EMU *, uint16_t, uint16_t); +void X86EMU_exec_intr(struct X86EMU *, uint8_t); +void X86EMU_halt_sys(struct X86EMU *); -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif #endif /* __X86EMU_X86EMU_H */ diff --git a/BaS_gcc/include/x86emu_regs.h b/BaS_gcc/include/x86emu_regs.h new file mode 100644 index 0000000..6d6b871 --- /dev/null +++ b/BaS_gcc/include/x86emu_regs.h @@ -0,0 +1,169 @@ +/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */ + +/**************************************************************************** +* +* Realmode X86 Emulator Library +* +* Copyright (C) 1996-1999 SciTech Software, Inc. +* Copyright (C) David Mosberger-Tang +* Copyright (C) 1999 Egbert Eich +* Copyright (C) 2007 Joerg Sonnenberger +* +* ======================================================================== +* +* Permission to use, copy, modify, distribute, and sell this software and +* its documentation for any purpose is hereby granted without fee, +* provided that the above copyright notice appear in all copies and that +* both that copyright notice and this permission notice appear in +* supporting documentation, and that the name of the authors not be used +* in advertising or publicity pertaining to distribution of the software +* without specific, written prior permission. The authors makes no +* representations about the suitability of this software for any purpose. +* It is provided "as is" without express or implied warranty. +* +* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO +* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR +* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF +* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR +* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +* PERFORMANCE OF THIS SOFTWARE. +* +****************************************************************************/ + +#ifndef __X86EMU_REGS_H +#define __X86EMU_REGS_H + +/*---------------------- Macros and type definitions ----------------------*/ + +/* 8 bit registers */ +#define R_AH register_a.I8_reg.h_reg +#define R_AL register_a.I8_reg.l_reg +#define R_BH register_b.I8_reg.h_reg +#define R_BL register_b.I8_reg.l_reg +#define R_CH register_c.I8_reg.h_reg +#define R_CL register_c.I8_reg.l_reg +#define R_DH register_d.I8_reg.h_reg +#define R_DL register_d.I8_reg.l_reg + +/* 16 bit registers */ +#define R_AX register_a.I16_reg.x_reg +#define R_BX register_b.I16_reg.x_reg +#define R_CX register_c.I16_reg.x_reg +#define R_DX register_d.I16_reg.x_reg + +/* 32 bit extended registers */ +#define R_EAX register_a.I32_reg.e_reg +#define R_EBX register_b.I32_reg.e_reg +#define R_ECX register_c.I32_reg.e_reg +#define R_EDX register_d.I32_reg.e_reg + +/* special registers */ +#define R_SP register_sp.I16_reg.x_reg +#define R_BP register_bp.I16_reg.x_reg +#define R_SI register_si.I16_reg.x_reg +#define R_DI register_di.I16_reg.x_reg +#define R_IP register_ip.I16_reg.x_reg +#define R_FLG register_flags + +/* special registers */ +#define R_ESP register_sp.I32_reg.e_reg +#define R_EBP register_bp.I32_reg.e_reg +#define R_ESI register_si.I32_reg.e_reg +#define R_EDI register_di.I32_reg.e_reg +#define R_EIP register_ip.I32_reg.e_reg +#define R_EFLG register_flags + +/* segment registers */ +#define R_CS register_cs +#define R_DS register_ds +#define R_SS register_ss +#define R_ES register_es +#define R_FS register_fs +#define R_GS register_gs + +/* flag conditions */ +#define FB_CF 0x0001 /* CARRY flag */ +#define FB_PF 0x0004 /* PARITY flag */ +#define FB_AF 0x0010 /* AUX flag */ +#define FB_ZF 0x0040 /* ZERO flag */ +#define FB_SF 0x0080 /* SIGN flag */ +#define FB_TF 0x0100 /* TRAP flag */ +#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ +#define FB_DF 0x0400 /* DIR flag */ +#define FB_OF 0x0800 /* OVERFLOW flag */ + +/* 80286 and above always have bit#1 set */ +#define F_ALWAYS_ON (0x0002) /* flag bits always on */ + +/* + * Define a mask for only those flag bits we will ever pass back + * (via PUSHF) + */ +#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) + +/* following bits masked in to a 16bit quantity */ + +#define F_CF 0x0001 /* CARRY flag */ +#define F_PF 0x0004 /* PARITY flag */ +#define F_AF 0x0010 /* AUX flag */ +#define F_ZF 0x0040 /* ZERO flag */ +#define F_SF 0x0080 /* SIGN flag */ +#define F_TF 0x0100 /* TRAP flag */ +#define F_IF 0x0200 /* INTERRUPT ENABLE flag */ +#define F_DF 0x0400 /* DIR flag */ +#define F_OF 0x0800 /* OVERFLOW flag */ + +#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag)) +#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag)) +#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag)) +#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0) + +#define CONDITIONAL_SET_FLAG(COND,FLAG) \ + if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) + +#define F_PF_CALC 0x010000 /* PARITY flag has been calced */ +#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ +#define F_SF_CALC 0x040000 /* SIGN flag has been calced */ + +#define F_ALL_CALC 0xff0000 /* All have been calced */ + +/* + * Emulator machine state. + * Segment usage control. + */ +#define SYSMODE_SEG_DS_SS 0x00000001 +#define SYSMODE_SEGOVR_CS 0x00000002 +#define SYSMODE_SEGOVR_DS 0x00000004 +#define SYSMODE_SEGOVR_ES 0x00000008 +#define SYSMODE_SEGOVR_FS 0x00000010 +#define SYSMODE_SEGOVR_GS 0x00000020 +#define SYSMODE_SEGOVR_SS 0x00000040 +#define SYSMODE_PREFIX_REPE 0x00000080 +#define SYSMODE_PREFIX_REPNE 0x00000100 +#define SYSMODE_PREFIX_DATA 0x00000200 +#define SYSMODE_PREFIX_ADDR 0x00000400 +#define SYSMODE_INTR_PENDING 0x10000000 +#define SYSMODE_EXTRN_INTR 0x20000000 +#define SYSMODE_HALTED 0x40000000 + +#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ + SYSMODE_SEGOVR_CS | \ + SYSMODE_SEGOVR_DS | \ + SYSMODE_SEGOVR_ES | \ + SYSMODE_SEGOVR_FS | \ + SYSMODE_SEGOVR_GS | \ + SYSMODE_SEGOVR_SS) +#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ + SYSMODE_SEGOVR_CS | \ + SYSMODE_SEGOVR_DS | \ + SYSMODE_SEGOVR_ES | \ + SYSMODE_SEGOVR_FS | \ + SYSMODE_SEGOVR_GS | \ + SYSMODE_SEGOVR_SS | \ + SYSMODE_PREFIX_DATA | \ + SYSMODE_PREFIX_ADDR) + +#define INTR_SYNCH 0x1 + +#endif /* __X86EMU_REGS_H */ diff --git a/BaS_gcc/include/x86emui.h b/BaS_gcc/include/x86emui.h deleted file mode 100644 index 33d8e82..0000000 --- a/BaS_gcc/include/x86emui.h +++ /dev/null @@ -1,99 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for system specific functions. These functions -* are always compiled and linked in the OS depedent libraries, -* and never in a binary portable driver. -* -****************************************************************************/ - -/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/x86emui.h,v 1.4 2001/04/01 13:59:58 tsi Exp $ */ - -#ifndef __X86EMU_X86EMUI_H -#define __X86EMU_X86EMUI_H - -/* - * If we are compiling in C++ mode, we can compile some functions as - * inline to increase performance (however the code size increases quite - * dramatically in this case). - */ - -#if defined(__cplusplus) && !defined(_NO_INLINE) -#define _INLINE inline -#else -#define _INLINE static -#endif - -/* Get rid of unused parameters in C++ compilation mode */ - -#ifdef __cplusplus -#define X86EMU_UNUSED(v) -#else -#define X86EMU_UNUSED(v) v -#endif - -#include "radeonfb.h" - -#include "x86emu.h" -#include "x86regs.h" -#include "x86decode.h" -#include "x86ops.h" -#include "x86prim_ops.h" -#include "x86fpu.h" - -/*--------------------------- Inline Functions ----------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -extern uint8_t (X86APIP sys_rdb)(uint32_t addr); -extern uint16_t (X86APIP sys_rdw)(uint32_t addr); -extern uint32_t (X86APIP sys_rdl)(uint32_t addr); -extern void (X86APIP sys_wrb)(uint32_t addr,uint8_t val); -extern void (X86APIP sys_wrw)(uint32_t addr,uint16_t val); -extern void (X86APIP sys_wrl)(uint32_t addr,uint32_t val); - -extern uint8_t (X86APIP sys_inb)(X86EMU_pioAddr addr); -extern uint16_t (X86APIP sys_inw)(X86EMU_pioAddr addr); -extern uint32_t (X86APIP sys_inl)(X86EMU_pioAddr addr); -extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,uint8_t val); -extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,uint16_t val); -extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,uint32_t val); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_X86EMUI_H */ diff --git a/BaS_gcc/include/x86fpu.h b/BaS_gcc/include/x86fpu.h deleted file mode 100644 index 8bf98e1..0000000 --- a/BaS_gcc/include/x86fpu.h +++ /dev/null @@ -1,61 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for FPU instruction decoding. -* -****************************************************************************/ - -#ifndef __X86EMU_FPU_H -#define __X86EMU_FPU_H - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -/* these have to be defined, whether 8087 support compiled in or not. */ - -extern void x86emuOp_esc_coprocess_d8 (uint8_t op1); -extern void x86emuOp_esc_coprocess_d9 (uint8_t op1); -extern void x86emuOp_esc_coprocess_da (uint8_t op1); -extern void x86emuOp_esc_coprocess_db (uint8_t op1); -extern void x86emuOp_esc_coprocess_dc (uint8_t op1); -extern void x86emuOp_esc_coprocess_dd (uint8_t op1); -extern void x86emuOp_esc_coprocess_de (uint8_t op1); -extern void x86emuOp_esc_coprocess_df (uint8_t op1); - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_FPU_H */ diff --git a/BaS_gcc/include/x86fpu_regs.h b/BaS_gcc/include/x86fpu_regs.h deleted file mode 100644 index 89402c4..0000000 --- a/BaS_gcc/include/x86fpu_regs.h +++ /dev/null @@ -1,116 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for FPU register definitions. -* -****************************************************************************/ - -#ifndef __X86EMU_FPU_REGS_H -#define __X86EMU_FPU_REGS_H - -#ifdef X86_FPU_SUPPORT - -#pragma pack(1) - -/* Basic 8087 register can hold any of the following values: */ - -union x86_fpu_reg_u { - s8 tenbytes[10]; - double dval; - float fval; - s16 sval; - s32 lval; - }; - -struct x86_fpu_reg { - union x86_fpu_reg_u reg; - char tag; - }; - -/* - * Since we are not going to worry about the problems of aliasing - * registers, every time a register is modified, its result type is - * set in the tag fields for that register. If some operation - * attempts to access the type in a way inconsistent with its current - * storage format, then we flag the operation. If common, we'll - * attempt the conversion. - */ - -#define X86_FPU_VALID 0x80 -#define X86_FPU_REGTYP(r) ((r) & 0x7F) - -#define X86_FPU_WORD 0x0 -#define X86_FPU_SHORT 0x1 -#define X86_FPU_LONG 0x2 -#define X86_FPU_FLOAT 0x3 -#define X86_FPU_DOUBLE 0x4 -#define X86_FPU_LDBL 0x5 -#define X86_FPU_BSD 0x6 - -#define X86_FPU_STKTOP 0 - -struct x86_fpu_registers -{ - struct x86_fpu_reg x86_fpu_stack[8]; - int x86_fpu_flags; - int x86_fpu_config; /* rounding modes, etc. */ - short x86_fpu_tos, x86_fpu_bos; -}; - -#pragma pack() - -/* - * There are two versions of the following macro. - * - * One version is for opcode D9, for which there are more than 32 - * instructions encoded in the second byte of the opcode. - * - * The other version, deals with all the other 7 i87 opcodes, for - * which there are only 32 strings needed to describe the - * instructions. - */ - -#endif /* X86_FPU_SUPPORT */ - -#ifdef DBG_X86EMU -#define DECODE_PRINTINSTR32(t, mod, rh, rl) \ - DECODE_PRINTF(t[(mod << 3) + (rh)]); -#define DECODE_PRINTINSTR256(t, mod, rh, rl) \ - DECODE_PRINTF(t[(mod << 6) + (rh << 3) + (rl)]); -#else -#define DECODE_PRINTINSTR32(t,mod,rh,rl) -#define DECODE_PRINTINSTR256(t,mod,rh,rl) -#endif - -#endif /* __X86EMU_FPU_REGS_H */ diff --git a/BaS_gcc/include/x86ops.h b/BaS_gcc/include/x86ops.h deleted file mode 100644 index 85e30cc..0000000 --- a/BaS_gcc/include/x86ops.h +++ /dev/null @@ -1,45 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for operand decoding functions. -* -****************************************************************************/ - -#ifndef __X86EMU_OPS_H -#define __X86EMU_OPS_H - -extern void (*x86emu_optab[0x100])(uint8_t op1); -extern void (*x86emu_optab2[0x100])(uint8_t op2); - -#endif /* __X86EMU_OPS_H */ diff --git a/BaS_gcc/include/x86prim_asm.h b/BaS_gcc/include/x86prim_asm.h deleted file mode 100644 index 4fa8d55..0000000 --- a/BaS_gcc/include/x86prim_asm.h +++ /dev/null @@ -1,971 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: Watcom C++ 10.6 or later -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Inline assembler versions of the primitive operand -* functions for faster performance. At the moment this is -* x86 inline assembler, but these functions could be replaced -* with native inline assembler for each supported processor -* platform. -* -****************************************************************************/ -/* $XFree86: xc/extras/x86emu/src/x86emu/x86emu/prim_asm.h,v 1.3 2000/04/19 15:48:15 tsi Exp $ */ - -#ifndef __X86EMU_PRIM_ASM_H -#define __X86EMU_PRIM_ASM_H - -#ifdef __WATCOMC__ - -#ifndef VALIDATE -#define __HAVE_INLINE_ASSEMBLER__ -#endif - -u32 get_flags_asm(void); -#pragma aux get_flags_asm = \ - "pushf" \ - "pop eax" \ - value [eax] \ - modify exact [eax]; - -u16 aaa_word_asm(u32 *flags,u16 d); -#pragma aux aaa_word_asm = \ - "push [edi]" \ - "popf" \ - "aaa" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u16 aas_word_asm(u32 *flags,u16 d); -#pragma aux aas_word_asm = \ - "push [edi]" \ - "popf" \ - "aas" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u16 aad_word_asm(u32 *flags,u16 d); -#pragma aux aad_word_asm = \ - "push [edi]" \ - "popf" \ - "aad" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u16 aam_word_asm(u32 *flags,u8 d); -#pragma aux aam_word_asm = \ - "push [edi]" \ - "popf" \ - "aam" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [ax] \ - modify exact [ax]; - -u8 adc_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux adc_byte_asm = \ - "push [edi]" \ - "popf" \ - "adc al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 adc_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux adc_word_asm = \ - "push [edi]" \ - "popf" \ - "adc ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 adc_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux adc_long_asm = \ - "push [edi]" \ - "popf" \ - "adc eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 add_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux add_byte_asm = \ - "push [edi]" \ - "popf" \ - "add al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 add_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux add_word_asm = \ - "push [edi]" \ - "popf" \ - "add ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 add_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux add_long_asm = \ - "push [edi]" \ - "popf" \ - "add eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 and_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux and_byte_asm = \ - "push [edi]" \ - "popf" \ - "and al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 and_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux and_word_asm = \ - "push [edi]" \ - "popf" \ - "and ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 and_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux and_long_asm = \ - "push [edi]" \ - "popf" \ - "and eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 cmp_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux cmp_byte_asm = \ - "push [edi]" \ - "popf" \ - "cmp al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 cmp_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux cmp_word_asm = \ - "push [edi]" \ - "popf" \ - "cmp ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 cmp_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux cmp_long_asm = \ - "push [edi]" \ - "popf" \ - "cmp eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 daa_byte_asm(u32 *flags,u8 d); -#pragma aux daa_byte_asm = \ - "push [edi]" \ - "popf" \ - "daa" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u8 das_byte_asm(u32 *flags,u8 d); -#pragma aux das_byte_asm = \ - "push [edi]" \ - "popf" \ - "das" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u8 dec_byte_asm(u32 *flags,u8 d); -#pragma aux dec_byte_asm = \ - "push [edi]" \ - "popf" \ - "dec al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 dec_word_asm(u32 *flags,u16 d); -#pragma aux dec_word_asm = \ - "push [edi]" \ - "popf" \ - "dec ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 dec_long_asm(u32 *flags,u32 d); -#pragma aux dec_long_asm = \ - "push [edi]" \ - "popf" \ - "dec eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 inc_byte_asm(u32 *flags,u8 d); -#pragma aux inc_byte_asm = \ - "push [edi]" \ - "popf" \ - "inc al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 inc_word_asm(u32 *flags,u16 d); -#pragma aux inc_word_asm = \ - "push [edi]" \ - "popf" \ - "inc ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 inc_long_asm(u32 *flags,u32 d); -#pragma aux inc_long_asm = \ - "push [edi]" \ - "popf" \ - "inc eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 or_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux or_byte_asm = \ - "push [edi]" \ - "popf" \ - "or al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 or_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux or_word_asm = \ - "push [edi]" \ - "popf" \ - "or ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 or_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux or_long_asm = \ - "push [edi]" \ - "popf" \ - "or eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 neg_byte_asm(u32 *flags,u8 d); -#pragma aux neg_byte_asm = \ - "push [edi]" \ - "popf" \ - "neg al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 neg_word_asm(u32 *flags,u16 d); -#pragma aux neg_word_asm = \ - "push [edi]" \ - "popf" \ - "neg ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 neg_long_asm(u32 *flags,u32 d); -#pragma aux neg_long_asm = \ - "push [edi]" \ - "popf" \ - "neg eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 not_byte_asm(u32 *flags,u8 d); -#pragma aux not_byte_asm = \ - "push [edi]" \ - "popf" \ - "not al" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] \ - value [al] \ - modify exact [al]; - -u16 not_word_asm(u32 *flags,u16 d); -#pragma aux not_word_asm = \ - "push [edi]" \ - "popf" \ - "not ax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] \ - value [ax] \ - modify exact [ax]; - -u32 not_long_asm(u32 *flags,u32 d); -#pragma aux not_long_asm = \ - "push [edi]" \ - "popf" \ - "not eax" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] \ - value [eax] \ - modify exact [eax]; - -u8 rcl_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux rcl_byte_asm = \ - "push [edi]" \ - "popf" \ - "rcl al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 rcl_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux rcl_word_asm = \ - "push [edi]" \ - "popf" \ - "rcl ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 rcl_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux rcl_long_asm = \ - "push [edi]" \ - "popf" \ - "rcl eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 rcr_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux rcr_byte_asm = \ - "push [edi]" \ - "popf" \ - "rcr al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 rcr_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux rcr_word_asm = \ - "push [edi]" \ - "popf" \ - "rcr ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 rcr_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux rcr_long_asm = \ - "push [edi]" \ - "popf" \ - "rcr eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 rol_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux rol_byte_asm = \ - "push [edi]" \ - "popf" \ - "rol al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 rol_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux rol_word_asm = \ - "push [edi]" \ - "popf" \ - "rol ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 rol_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux rol_long_asm = \ - "push [edi]" \ - "popf" \ - "rol eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 ror_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux ror_byte_asm = \ - "push [edi]" \ - "popf" \ - "ror al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 ror_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux ror_word_asm = \ - "push [edi]" \ - "popf" \ - "ror ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 ror_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux ror_long_asm = \ - "push [edi]" \ - "popf" \ - "ror eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 shl_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux shl_byte_asm = \ - "push [edi]" \ - "popf" \ - "shl al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 shl_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux shl_word_asm = \ - "push [edi]" \ - "popf" \ - "shl ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 shl_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux shl_long_asm = \ - "push [edi]" \ - "popf" \ - "shl eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 shr_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux shr_byte_asm = \ - "push [edi]" \ - "popf" \ - "shr al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 shr_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux shr_word_asm = \ - "push [edi]" \ - "popf" \ - "shr ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 shr_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux shr_long_asm = \ - "push [edi]" \ - "popf" \ - "shr eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u8 sar_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux sar_byte_asm = \ - "push [edi]" \ - "popf" \ - "sar al,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [cl] \ - value [al] \ - modify exact [al cl]; - -u16 sar_word_asm(u32 *flags,u16 d, u8 s); -#pragma aux sar_word_asm = \ - "push [edi]" \ - "popf" \ - "sar ax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [cl] \ - value [ax] \ - modify exact [ax cl]; - -u32 sar_long_asm(u32 *flags,u32 d, u8 s); -#pragma aux sar_long_asm = \ - "push [edi]" \ - "popf" \ - "sar eax,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [cl] \ - value [eax] \ - modify exact [eax cl]; - -u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s); -#pragma aux shld_word_asm = \ - "push [edi]" \ - "popf" \ - "shld ax,dx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [dx] [cl] \ - value [ax] \ - modify exact [ax dx cl]; - -u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s); -#pragma aux shld_long_asm = \ - "push [edi]" \ - "popf" \ - "shld eax,edx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [edx] [cl] \ - value [eax] \ - modify exact [eax edx cl]; - -u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s); -#pragma aux shrd_word_asm = \ - "push [edi]" \ - "popf" \ - "shrd ax,dx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [dx] [cl] \ - value [ax] \ - modify exact [ax dx cl]; - -u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s); -#pragma aux shrd_long_asm = \ - "push [edi]" \ - "popf" \ - "shrd eax,edx,cl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [edx] [cl] \ - value [eax] \ - modify exact [eax edx cl]; - -u8 sbb_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux sbb_byte_asm = \ - "push [edi]" \ - "popf" \ - "sbb al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 sbb_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux sbb_word_asm = \ - "push [edi]" \ - "popf" \ - "sbb ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 sbb_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux sbb_long_asm = \ - "push [edi]" \ - "popf" \ - "sbb eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -u8 sub_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux sub_byte_asm = \ - "push [edi]" \ - "popf" \ - "sub al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 sub_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux sub_word_asm = \ - "push [edi]" \ - "popf" \ - "sub ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 sub_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux sub_long_asm = \ - "push [edi]" \ - "popf" \ - "sub eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -void test_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux test_byte_asm = \ - "push [edi]" \ - "popf" \ - "test al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - modify exact [al bl]; - -void test_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux test_word_asm = \ - "push [edi]" \ - "popf" \ - "test ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - modify exact [ax bx]; - -void test_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux test_long_asm = \ - "push [edi]" \ - "popf" \ - "test eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - modify exact [eax ebx]; - -u8 xor_byte_asm(u32 *flags,u8 d, u8 s); -#pragma aux xor_byte_asm = \ - "push [edi]" \ - "popf" \ - "xor al,bl" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [al] [bl] \ - value [al] \ - modify exact [al bl]; - -u16 xor_word_asm(u32 *flags,u16 d, u16 s); -#pragma aux xor_word_asm = \ - "push [edi]" \ - "popf" \ - "xor ax,bx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [ax] [bx] \ - value [ax] \ - modify exact [ax bx]; - -u32 xor_long_asm(u32 *flags,u32 d, u32 s); -#pragma aux xor_long_asm = \ - "push [edi]" \ - "popf" \ - "xor eax,ebx" \ - "pushf" \ - "pop [edi]" \ - parm [edi] [eax] [ebx] \ - value [eax] \ - modify exact [eax ebx]; - -void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s); -#pragma aux imul_byte_asm = \ - "push [edi]" \ - "popf" \ - "imul bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - parm [edi] [esi] [al] [bl] \ - modify exact [esi ax bl]; - -void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s); -#pragma aux imul_word_asm = \ - "push [edi]" \ - "popf" \ - "imul bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [bx]\ - modify exact [esi edi ax bx dx]; - -void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s); -#pragma aux imul_long_asm = \ - "push [edi]" \ - "popf" \ - "imul ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [ebx] \ - modify exact [esi edi eax ebx edx]; - -void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s); -#pragma aux mul_byte_asm = \ - "push [edi]" \ - "popf" \ - "mul bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - parm [edi] [esi] [al] [bl] \ - modify exact [esi ax bl]; - -void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s); -#pragma aux mul_word_asm = \ - "push [edi]" \ - "popf" \ - "mul bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [bx]\ - modify exact [esi edi ax bx dx]; - -void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s); -#pragma aux mul_long_asm = \ - "push [edi]" \ - "popf" \ - "mul ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [ebx] \ - modify exact [esi edi eax ebx edx]; - -void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s); -#pragma aux idiv_byte_asm = \ - "push [edi]" \ - "popf" \ - "idiv bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],al" \ - "mov [ecx],ah" \ - parm [edi] [esi] [ecx] [ax] [bl]\ - modify exact [esi edi ax bl]; - -void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s); -#pragma aux idiv_word_asm = \ - "push [edi]" \ - "popf" \ - "idiv bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [dx] [bx]\ - modify exact [esi edi ax dx bx]; - -void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s); -#pragma aux idiv_long_asm = \ - "push [edi]" \ - "popf" \ - "idiv ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [edx] [ebx]\ - modify exact [esi edi eax edx ebx]; - -void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s); -#pragma aux div_byte_asm = \ - "push [edi]" \ - "popf" \ - "div bl" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],al" \ - "mov [ecx],ah" \ - parm [edi] [esi] [ecx] [ax] [bl]\ - modify exact [esi edi ax bl]; - -void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s); -#pragma aux div_word_asm = \ - "push [edi]" \ - "popf" \ - "div bx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],ax" \ - "mov [ecx],dx" \ - parm [edi] [esi] [ecx] [ax] [dx] [bx]\ - modify exact [esi edi ax dx bx]; - -void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s); -#pragma aux div_long_asm = \ - "push [edi]" \ - "popf" \ - "div ebx" \ - "pushf" \ - "pop [edi]" \ - "mov [esi],eax" \ - "mov [ecx],edx" \ - parm [edi] [esi] [ecx] [eax] [edx] [ebx]\ - modify exact [esi edi eax edx ebx]; - -#endif - -#endif /* __X86EMU_PRIM_ASM_H */ diff --git a/BaS_gcc/include/x86prim_ops.h b/BaS_gcc/include/x86prim_ops.h deleted file mode 100644 index 09d04a2..0000000 --- a/BaS_gcc/include/x86prim_ops.h +++ /dev/null @@ -1,232 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: Header file for primitive operation functions. -* -****************************************************************************/ - -#ifndef __X86EMU_PRIM_OPS_H -#define __X86EMU_PRIM_OPS_H - -#include "x86prim_asm.h" - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -uint16_t aaa_word (uint16_t d); -uint16_t aas_word (uint16_t d); -uint16_t aad_word (uint16_t d); -uint16_t aam_word (uint8_t d); -uint8_t adc_byte (uint8_t d, uint8_t s); -uint16_t adc_word (uint16_t d, uint16_t s); -uint32_t adc_long (uint32_t d, uint32_t s); -uint8_t add_byte (uint8_t d, uint8_t s); -uint16_t add_word (uint16_t d, uint16_t s); -uint32_t add_long (uint32_t d, uint32_t s); -uint8_t and_byte (uint8_t d, uint8_t s); -uint16_t and_word (uint16_t d, uint16_t s); -uint32_t and_long (uint32_t d, uint32_t s); -uint8_t cmp_byte (uint8_t d, uint8_t s); -uint16_t cmp_word (uint16_t d, uint16_t s); -uint32_t cmp_long (uint32_t d, uint32_t s); -uint8_t daa_byte (uint8_t d); -uint8_t das_byte (uint8_t d); -uint8_t dec_byte (uint8_t d); -uint16_t dec_word (uint16_t d); -uint32_t dec_long (uint32_t d); -uint8_t inc_byte (uint8_t d); -uint16_t inc_word (uint16_t d); -uint32_t inc_long (uint32_t d); -uint8_t or_byte (uint8_t d, uint8_t s); -uint16_t or_word (uint16_t d, uint16_t s); -uint32_t or_long (uint32_t d, uint32_t s); -uint8_t neg_byte (uint8_t s); -uint16_t neg_word (uint16_t s); -uint32_t neg_long (uint32_t s); -uint8_t not_byte (uint8_t s); -uint16_t not_word (uint16_t s); -uint32_t not_long (uint32_t s); -uint8_t rcl_byte (uint8_t d, uint8_t s); -uint16_t rcl_word (uint16_t d, uint8_t s); -uint32_t rcl_long (uint32_t d, uint8_t s); -uint8_t rcr_byte (uint8_t d, uint8_t s); -uint16_t rcr_word (uint16_t d, uint8_t s); -uint32_t rcr_long (uint32_t d, uint8_t s); -uint8_t rol_byte (uint8_t d, uint8_t s); -uint16_t rol_word (uint16_t d, uint8_t s); -uint32_t rol_long (uint32_t d, uint8_t s); -uint8_t ror_byte (uint8_t d, uint8_t s); -uint16_t ror_word (uint16_t d, uint8_t s); -uint32_t ror_long (uint32_t d, uint8_t s); -uint8_t shl_byte (uint8_t d, uint8_t s); -uint16_t shl_word (uint16_t d, uint8_t s); -uint32_t shl_long (uint32_t d, uint8_t s); -uint8_t shr_byte (uint8_t d, uint8_t s); -uint16_t shr_word (uint16_t d, uint8_t s); -uint32_t shr_long (uint32_t d, uint8_t s); -uint8_t sar_byte (uint8_t d, uint8_t s); -uint16_t sar_word (uint16_t d, uint8_t s); -uint32_t sar_long (uint32_t d, uint8_t s); -uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s); -uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s); -uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s); -uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s); -uint8_t sbb_byte (uint8_t d, uint8_t s); -uint16_t sbb_word (uint16_t d, uint16_t s); -uint32_t sbb_long (uint32_t d, uint32_t s); -uint8_t sub_byte (uint8_t d, uint8_t s); -uint16_t sub_word (uint16_t d, uint16_t s); -uint32_t sub_long (uint32_t d, uint32_t s); -void test_byte (uint8_t d, uint8_t s); -void test_word (uint16_t d, uint16_t s); -void test_long (uint32_t d, uint32_t s); -uint8_t xor_byte (uint8_t d, uint8_t s); -uint16_t xor_word (uint16_t d, uint16_t s); -uint32_t xor_long (uint32_t d, uint32_t s); -void imul_byte (uint8_t s); -void imul_word (uint16_t s); -void imul_long (uint32_t s); -void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s); -void mul_byte (uint8_t s); -void mul_word (uint16_t s); -void mul_long (uint32_t s); -void idiv_byte (uint8_t s); -void idiv_word (uint16_t s); -void idiv_long (uint32_t s); -void div_byte (uint8_t s); -void div_word (uint16_t s); -void div_long (uint32_t s); -void ins (int size); -void outs (int size); -uint16_t mem_access_word (int addr); -void push_word (uint16_t w); -void push_long (uint32_t w); -uint16_t pop_word (void); -uint32_t pop_long (void); - - -#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM) - -#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d) -#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d) -#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d) -#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d) -#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s) -#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s) -#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s) -#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s) -#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s) -#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s) -#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s) -#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s) -#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s) -#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s) -#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s) -#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s) -#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d) -#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d) -#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d) -#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d) -#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d) -#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d) -#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d) -#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d) -#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s) -#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s) -#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s) -#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s) -#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s) -#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s) -#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s) -#define not_word(s) not_word_asm(&M.x86.R_EFLG,s) -#define not_long(s) not_long_asm(&M.x86.R_EFLG,s) -#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s) -#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s) -#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s) -#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s) -#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s) -#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s) -#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s) -#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s) -#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s) -#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s) -#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s) -#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s) -#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s) -#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s) -#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s) -#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s) -#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s) -#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s) -#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s) -#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s) -#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s) -#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s) -#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s) -#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s) -#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s) -#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s) -#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s) -#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s) -#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s) -#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s) -#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s) -#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s) -#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s) -#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s) -#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s) -#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s) -#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s) -#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s) -#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s) -#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s) -#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s) -#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s) -#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s) -#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s) -#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s) -#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s) -#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s) -#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s) -#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s) -#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s) - -#endif - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_PRIM_OPS_H */ diff --git a/BaS_gcc/include/x86regs.h b/BaS_gcc/include/x86regs.h deleted file mode 100644 index 4e1ef37..0000000 --- a/BaS_gcc/include/x86regs.h +++ /dev/null @@ -1,358 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1996-1999 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: Header file for x86 register definitions. - * - ****************************************************************************/ -/* $XFree86: xc/extras/x86emu/include/x86emu/regs.h,v 1.3 2001/10/28 03:32:25 tsi Exp $ */ - -#ifndef __X86EMU_REGS_H -#define __X86EMU_REGS_H -#include "x86debug.h" - -/*---------------------- Macros and type definitions ----------------------*/ - -//#pragma pack(1) - -/* - * General EAX, EBX, ECX, EDX type registers. Note that for - * portability, and speed, the issue of byte swapping is not addressed - * in the registers. All registers are stored in the default format - * available on the host machine. The only critical issue is that the - * registers should line up EXACTLY in the same manner as they do in - * the 386. That is: - * - * EAX & 0xff === AL - * EAX & 0xffff == AX - * - * etc. The result is that alot of the calculations can then be - * done using the native instruction set fully. - */ - -typedef struct { - uint32_t e_reg; -} I32_reg_t; - -typedef struct { - uint16_t filler0, x_reg; -} I16_reg_t; - -typedef struct { - uint8_t filler0, filler1, h_reg, l_reg; -} I8_reg_t; - -typedef union { - I32_reg_t I32_reg; - I16_reg_t I16_reg; - I8_reg_t I8_reg; -} i386_general_register; - -struct i386_general_regs { - i386_general_register A, B, C, D; -}; - -typedef struct i386_general_regs Gen_reg_t; - -struct i386_special_regs { - i386_general_register SP, BP, SI, DI, IP; - uint32_t FLAGS; -}; - -/* - * Segment registers here represent the 16 bit quantities - * CS, DS, ES, SS. - */ - -struct i386_segment_regs { - uint16_t CS, DS, SS, ES, FS, GS; -}; - -/* 8 bit registers */ -#define R_AH gen.A.I8_reg.h_reg -#define R_AL gen.A.I8_reg.l_reg -#define R_BH gen.B.I8_reg.h_reg -#define R_BL gen.B.I8_reg.l_reg -#define R_CH gen.C.I8_reg.h_reg -#define R_CL gen.C.I8_reg.l_reg -#define R_DH gen.D.I8_reg.h_reg -#define R_DL gen.D.I8_reg.l_reg - -/* 16 bit registers */ -#define R_AX gen.A.I16_reg.x_reg -#define R_BX gen.B.I16_reg.x_reg -#define R_CX gen.C.I16_reg.x_reg -#define R_DX gen.D.I16_reg.x_reg - -/* 32 bit extended registers */ -#define R_EAX gen.A.I32_reg.e_reg -#define R_EBX gen.B.I32_reg.e_reg -#define R_ECX gen.C.I32_reg.e_reg -#define R_EDX gen.D.I32_reg.e_reg - -/* special registers */ -#define R_SP spc.SP.I16_reg.x_reg -#define R_BP spc.BP.I16_reg.x_reg -#define R_SI spc.SI.I16_reg.x_reg -#define R_DI spc.DI.I16_reg.x_reg -#define R_IP spc.IP.I16_reg.x_reg -#define R_FLG spc.FLAGS - -/* special registers */ -#define R_SP spc.SP.I16_reg.x_reg -#define R_BP spc.BP.I16_reg.x_reg -#define R_SI spc.SI.I16_reg.x_reg -#define R_DI spc.DI.I16_reg.x_reg -#define R_IP spc.IP.I16_reg.x_reg -#define R_FLG spc.FLAGS - -/* special registers */ -#define R_ESP spc.SP.I32_reg.e_reg -#define R_EBP spc.BP.I32_reg.e_reg -#define R_ESI spc.SI.I32_reg.e_reg -#define R_EDI spc.DI.I32_reg.e_reg -#define R_EIP spc.IP.I32_reg.e_reg -#define R_EFLG spc.FLAGS - -/* segment registers */ -#define R_CS seg.CS -#define R_DS seg.DS -#define R_SS seg.SS -#define R_ES seg.ES -#define R_FS seg.FS -#define R_GS seg.GS - -/* flag conditions */ -#define FB_CF 0x0001 /* CARRY flag */ -#define FB_PF 0x0004 /* PARITY flag */ -#define FB_AF 0x0010 /* AUX flag */ -#define FB_ZF 0x0040 /* ZERO flag */ -#define FB_SF 0x0080 /* SIGN flag */ -#define FB_TF 0x0100 /* TRAP flag */ -#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ -#define FB_DF 0x0400 /* DIR flag */ -#define FB_OF 0x0800 /* OVERFLOW flag */ - -/* 80286 and above always have bit#1 set */ -#define F_ALWAYS_ON (0x0002) /* flag bits always on */ - -/* - * Define a mask for only those flag bits we will ever pass back - * (via PUSHF) - */ -#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) - -/* following bits masked in to a 16bit quantity */ - -#define F_CF 0x0001 /* CARRY flag */ -#define F_PF 0x0004 /* PARITY flag */ -#define F_AF 0x0010 /* AUX flag */ -#define F_ZF 0x0040 /* ZERO flag */ -#define F_SF 0x0080 /* SIGN flag */ -#define F_TF 0x0100 /* TRAP flag */ -#define F_IF 0x0200 /* INTERRUPT ENABLE flag */ -#define F_DF 0x0400 /* DIR flag */ -#define F_OF 0x0800 /* OVERFLOW flag */ - -#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag)) -#define SET_FLAG(flag) (M.x86.R_FLG |= (flag)) -#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag)) -#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag)) -#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0) - -#define CONDITIONAL_SET_FLAG(COND,FLAG) \ - if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) - -#define F_PF_CALC 0x010000 /* PARITY flag has been calced */ -#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ -#define F_SF_CALC 0x040000 /* SIGN flag has been calced */ - -#define F_ALL_CALC 0xff0000 /* All have been calced */ - -/* - * Emulator machine state. - * Segment usage control. - */ -#define SYSMODE_SEG_DS_SS 0x00000001 -#define SYSMODE_SEGOVR_CS 0x00000002 -#define SYSMODE_SEGOVR_DS 0x00000004 -#define SYSMODE_SEGOVR_ES 0x00000008 -#define SYSMODE_SEGOVR_FS 0x00000010 -#define SYSMODE_SEGOVR_GS 0x00000020 -#define SYSMODE_SEGOVR_SS 0x00000040 -#define SYSMODE_PREFIX_REPE 0x00000080 -#define SYSMODE_PREFIX_REPNE 0x00000100 -#define SYSMODE_PREFIX_DATA 0x00000200 -#define SYSMODE_PREFIX_ADDR 0x00000400 -#define SYSMODE_INTR_PENDING 0x10000000 -#define SYSMODE_EXTRN_INTR 0x20000000 -#define SYSMODE_HALTED 0x40000000 - -#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ - SYSMODE_SEGOVR_CS | \ - SYSMODE_SEGOVR_DS | \ - SYSMODE_SEGOVR_ES | \ - SYSMODE_SEGOVR_FS | \ - SYSMODE_SEGOVR_GS | \ - SYSMODE_SEGOVR_SS) -#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ - SYSMODE_SEGOVR_CS | \ - SYSMODE_SEGOVR_DS | \ - SYSMODE_SEGOVR_ES | \ - SYSMODE_SEGOVR_FS | \ - SYSMODE_SEGOVR_GS | \ - SYSMODE_SEGOVR_SS | \ - SYSMODE_PREFIX_DATA | \ - SYSMODE_PREFIX_ADDR) - -#define INTR_SYNCH 0x1 -#define INTR_ASYNCH 0x2 -#define INTR_HALTED 0x4 - -typedef struct { - struct i386_general_regs gen; - struct i386_special_regs spc; - struct i386_segment_regs seg; - /* - * MODE contains information on: - * REPE prefix 2 bits repe,repne - * SEGMENT overrides 5 bits normal,DS,SS,CS,ES - * Delayed flag set 3 bits (zero, signed, parity) - * reserved 6 bits - * interrupt # 8 bits instruction raised interrupt - * BIOS video segregs 4 bits - * Interrupt Pending 1 bits - * Extern interrupt 1 bits - * Halted 1 bits - */ - uint32_t mode; - volatile int intr; /* mask of pending interrupts */ - int debug; -#ifdef DBG_X86EMU - int check; - uint16_t saved_ip; - uint16_t saved_cs; - int enc_pos; - int enc_str_pos; - // char decode_buf[32]; /* encoded byte stream */ - char decoded_buf[256]; /* disassembled strings */ -#endif - uint8_t intno; - uint8_t __pad[3]; -} X86EMU_regs; - -/**************************************************************************** -REMARKS: -Structure maintaining the emulator machine state. - -MEMBERS: -mem_base - Base real mode memory for the emulator -abseg - Base for the absegment -mem_size - Size of the real mode memory block for the emulator -private - private data pointer -x86 - X86 registers - ****************************************************************************/ -typedef struct -{ - unsigned long mem_base; - unsigned long mem_size; - unsigned long abseg; - void* private; - X86EMU_regs x86; -} X86EMU_sysEnv; - -//#pragma pack() - -/*----------------------------- Global Variables --------------------------*/ - -#ifdef __cplusplus -extern "C" { /* Use "C" linkage when in C++ mode */ -#endif - -/* Global emulator machine state. - * - * We keep it global to avoid pointer dereferences in the code for speed. - */ - -extern X86EMU_sysEnv _X86EMU_env; - -#define M _X86EMU_env - -#define X86_EAX M.x86.R_EAX -#define X86_EBX M.x86.R_EBX -#define X86_ECX M.x86.R_ECX -#define X86_EDX M.x86.R_EDX -#define X86_ESI M.x86.R_ESI -#define X86_EDI M.x86.R_EDI -#define X86_EBP M.x86.R_EBP -#define X86_EIP M.x86.R_EIP -#define X86_ESP M.x86.R_ESP -#define X86_EFLAGS M.x86.R_EFLG - -#define X86_FLAGS M.x86.R_FLG -#define X86_AX M.x86.R_AX -#define X86_BX M.x86.R_BX -#define X86_CX M.x86.R_CX -#define X86_DX M.x86.R_DX -#define X86_SI M.x86.R_SI -#define X86_DI M.x86.R_DI -#define X86_BP M.x86.R_BP -#define X86_IP M.x86.R_IP -#define X86_SP M.x86.R_SP -#define X86_CS M.x86.R_CS -#define X86_DS M.x86.R_DS -#define X86_ES M.x86.R_ES -#define X86_SS M.x86.R_SS -#define X86_FS M.x86.R_FS -#define X86_GS M.x86.R_GS - -#define X86_AL M.x86.R_AL -#define X86_BL M.x86.R_BL -#define X86_CL M.x86.R_CL -#define X86_DL M.x86.R_DL - -#define X86_AH M.x86.R_AH -#define X86_BH M.x86.R_BH -#define X86_CH M.x86.R_CH -#define X86_DH M.x86.R_DH - - -/*-------------------------- Function Prototypes --------------------------*/ - -/* Function to log information at runtime */ - -#ifdef __cplusplus -} /* End of "C" linkage for C++ */ -#endif - -#endif /* __X86EMU_REGS_H */ diff --git a/BaS_gcc/sys/startcf.S b/BaS_gcc/sys/startcf.S index c2eb53f..7c6fc7a 100644 --- a/BaS_gcc/sys/startcf.S +++ b/BaS_gcc/sys/startcf.S @@ -65,3 +65,18 @@ _rom_entry: /* initialize any hardware specific issues */ bra _initialize_hardware + +#ifdef _NOT_USED_ + .globl ___muldi3 + .extern __muldi3 +___muldi3: jmp __muldi3 + .globl ___divdi3 + .extern __divdi3 +___divdi3: jmp __divdi3 + .globl ___moddi3 + .extern __moddi3 +___moddi3: jmp __moddi3 + .globl ___modsi3 + .extern __modsi3 +___modsi3: jmp __modsi3 +#endif /* _NOT_USED_ */ diff --git a/BaS_gcc/x86emu/x86biosemu.c b/BaS_gcc/x86emu/x86biosemu.c index 131be8b..d37dc5e 100644 --- a/BaS_gcc/x86emu/x86biosemu.c +++ b/BaS_gcc/x86emu/x86biosemu.c @@ -1,5 +1,4 @@ #define RINFO_ONLY -#include "x86debug.h" #include "radeonfb.h" #include "bas_printf.h" #include "bas_string.h" diff --git a/BaS_gcc/x86emu/x86debug.c b/BaS_gcc/x86emu/x86debug.c deleted file mode 100644 index 647889a..0000000 --- a/BaS_gcc/x86emu/x86debug.c +++ /dev/null @@ -1,451 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file contains the code to handle debugging of the - * emulator. - * - ****************************************************************************/ - -#include "bas_types.h" -#include "bas_printf.h" -#include "bas_string.h" -#include "x86debug.h" -#include "x86emui.h" - -/*----------------------------- Implementation ----------------------------*/ - -#ifdef DBG_X86EMU - -static void print_encoded_bytes (uint16_t s, uint16_t o); -static void print_decoded_instruction (void); -//static int parse_line (char *s, int *ps, int *n); - -/* should look something like debug's output. */ -void X86EMU_trace_regs (void) -{ - if (DEBUG_TRACE()) { - x86emu_dump_regs(); - } - if (DEBUG_DECODE() && !DEBUG_DECODE_NOPRINT()) - { - xprintf("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip); - print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip); - print_decoded_instruction(); - } -} - -void X86EMU_trace_xregs (void) -{ - if (DEBUG_TRACE()) { - x86emu_dump_xregs(); - } -} - -void x86emu_just_disassemble (void) -{ - /* - * This routine called if the flag DEBUG_DISASSEMBLE is set kind - * of a hack! - */ - xprintf("%x:%x ", M.x86.saved_cs, M.x86.saved_ip); - print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip); - print_decoded_instruction(); -} - -#if 0 -static void disassemble_forward (uint16_t seg, uint16_t off, int n) -{ - X86EMU_sysEnv tregs; - int i; - u8 op1; - /* - * hack, hack, hack. What we do is use the exact machinery set up - * for execution, except that now there is an additional state - * flag associated with the "execution", and we are using a copy - * of the register struct. All the major opcodes, once fully - * decoded, have the following two steps: TRACE_REGS(r,m); - * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to - * the preprocessor. The TRACE_REGS macro expands to: - * - * if (debug&DEBUG_DISASSEMBLE) - * {just_disassemble(); goto EndOfInstruction;} - * if (debug&DEBUG_TRACE) trace_regs(r,m); - * - * ...... and at the last line of the routine. - * - * EndOfInstruction: end_instr(); - * - * Up to the point where TRACE_REG is expanded, NO modifications - * are done to any register EXCEPT the IP register, for fetch and - * decoding purposes. - * - * This was done for an entirely different reason, but makes a - * nice way to get the system to help debug codes. - */ - tregs = M; - tregs.x86.R_IP = off; - tregs.x86.R_CS = seg; - - /* reset the decoding buffers */ - tregs.x86.enc_str_pos = 0; - tregs.x86.enc_pos = 0; - - /* turn on the "disassemble only, no execute" flag */ - tregs.x86.debug |= DEBUG_DISASSEMBLE_F; - - /* DUMP NEXT n instructions to screen in straight_line fashion */ - /* - * This looks like the regular instruction fetch stream, except - * that when this occurs, each fetched opcode, upon seeing the - * DEBUG_DISASSEMBLE flag set, exits immediately after decoding - * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!! - * Note the use of a copy of the register structure... - */ - for (i=0; i 256) - return; - - seg = fetch_data_word_abs(0, iv * 4); - off = fetch_data_word_abs(0, iv *4 + 2); - xprintf("%04x:%04x", seg, off); -} - -void X86EMU_dump_memory (uint16_t seg, uint16_t off, uint32_t amt) -{ - uint32_t start = off & 0xfffffff0; - uint32_t end = (off + 16) & 0xfffffff0; - uint32_t i; - uint32_t current; - - current = start; - while (end <= off + amt) { - xprintf("%04x:%04x ", seg, start); - - for (i = start; i < off; i++) - xprintf(" "); - for ( ; i< end; i++) - xprintf("%02x", fetch_data_byte_abs(seg, i)); - xprintf("\r\n"); - start = end; - end = start + 16; - } -} - -void x86emu_single_step (void) -{ -#if 0 - char s[1024]; - int ps[10]; - int ntok; - int cmd; - int done; - int segment; - int offset; - static int breakpoint; - static int noDecode = 1; - - char *p; - - if (DEBUG_BREAK()) { - if (M.x86.saved_ip != breakpoint) { - return; - } else { - M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; - M.x86.debug |= DEBUG_TRACE_F; - M.x86.debug &= ~DEBUG_BREAK_F; - print_decoded_instruction (); - X86EMU_trace_regs(); - } - } - done=0; - offset = M.x86.saved_ip; - while (!done) { - DPRINT("-"); - p = fgets(s, 1023, stdin); - cmd = parse_line(s, ps, &ntok); - switch(cmd) { - case 'u': - disassemble_forward(M.x86.saved_cs,(uint16_t)offset,10); - break; - case 'd': - if (ntok == 2) { - segment = M.x86.saved_cs; - offset = ps[1]; - X86EMU_dump_memory(segment,(uint16_t)offset,16); - offset += 16; - } else if (ntok == 3) { - segment = ps[1]; - offset = ps[2]; - X86EMU_dump_memory(segment,(uint16_t)offset,16); - offset += 16; - } else { - segment = M.x86.saved_cs; - X86EMU_dump_memory(segment,(uint16_t)offset,16); - offset += 16; - } - break; - case 'c': - M.x86.debug ^= DEBUG_TRACECALL_F; - break; - case 's': - M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F; - break; - case 'r': - X86EMU_trace_regs(); - break; - case 'x': - X86EMU_trace_xregs(); - break; - case 'g': - if (ntok == 2) { - breakpoint = ps[1]; - if (noDecode) { - M.x86.debug |= DEBUG_DECODE_NOPRINT_F; - } else { - M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F; - } - M.x86.debug &= ~DEBUG_TRACE_F; - M.x86.debug |= DEBUG_BREAK_F; - done = 1; - } - break; - case 'q': - M.x86.debug |= DEBUG_EXIT; - return; - case 'P': - noDecode = (noDecode)?0:1; - DPRINT("Toggled decoding to "); - DPRINT((noDecode)?"FALSE":"TRUE"); - DPRINT("\r\n"); - break; - case 't': - case 0: - done = 1; - break; - } - } -#endif -} - -int X86EMU_trace_on(void) -{ - return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F; -} - -int X86EMU_trace_off(void) -{ - return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F); -} - -int X86EMU_set_debug(int debug) -{ - return M.x86.debug = debug; -} - -#if 0 -static int parse_line (char *s, int *ps, int *n) -{ - int cmd; - - *n = 0; - while (*s == ' ' || *s == '\t') s++; - ps[*n] = *s; - switch (*s) { - case '\n': - *n += 1; - return 0; - default: - cmd = *s; - *n += 1; - } - - while (1) { - while (*s != ' ' && *s != '\t' && *s != '\n') s++; - - if (*s == '\n') - return cmd; - - while (*s == ' ' || *s == '\t') s++; - - sscanf(s,"%x",&ps[*n]); - *n += 1; - } -} -#endif - -#endif /* DBG_X86EMU */ - -void x86emu_dump_regs (void) -{ - xprintf("\tAX=%04x", M.x86.R_AX); - xprintf(" BX=%04x", M.x86.R_BX); - xprintf(" CX=%04x", M.x86.R_CX); - xprintf(" DX=%04x", M.x86.R_DX); - xprintf(" SP=%04x", M.x86.R_SP); - xprintf(" BP=%04x", M.x86.R_BP); - xprintf(" SI=%04x", M.x86.R_SI); - xprintf(" DI=%04x", M.x86.R_DI); - xprintf("\r\n"); - xprintf("\tDS=%04x", M.x86.R_DS); - xprintf(" ES=%04x", M.x86.R_ES); - xprintf(" SS=%04x", M.x86.R_SS); - xprintf(" CS=%04x", M.x86.R_CS); - xprintf(" IP=%04x", M.x86.R_IP); - if (ACCESS_FLAG(F_OF)) xprintf("OV "); /* CHECKED... */ - else xprintf("NV "); - if (ACCESS_FLAG(F_DF)) xprintf("DN "); - else xprintf("UP "); - if (ACCESS_FLAG(F_IF)) xprintf("EI "); - else xprintf("DI "); - if (ACCESS_FLAG(F_SF)) xprintf("NG "); - else xprintf("PL "); - if (ACCESS_FLAG(F_ZF)) xprintf("ZR "); - else xprintf("NZ "); - if (ACCESS_FLAG(F_AF)) xprintf("AC "); - else xprintf("NA "); - if (ACCESS_FLAG(F_PF)) xprintf("PE "); - else xprintf("PO "); - if (ACCESS_FLAG(F_CF)) xprintf("CY "); - else xprintf("NC "); - xprintf("\r\n"); -} - -void x86emu_dump_xregs (void) -{ - xprintf(" EAX=%08x", M.x86.R_EAX ); - xprintf(" EBX=%08x", M.x86.R_EBX ); - xprintf(" ECX=%08x", M.x86.R_ECX ); - xprintf(" EDX=%08x", M.x86.R_EDX ); - xprintf("\r\n"); - xprintf(" ESP=%08x", M.x86.R_ESP ); - xprintf(" EBP=%08x", M.x86.R_EBP ); - xprintf(" ESI=%08x", M.x86.R_ESI ); - xprintf(" EDI=%08x", M.x86.R_EDI ); - xprintf("\r\n"); - xprintf(" DS=%08x", M.x86.R_DS ); - xprintf(" ES=%08x", M.x86.R_ES ); - xprintf(" SS=%08x", M.x86.R_SS ); - xprintf(" CS=%08x", M.x86.R_CS ); - xprintf(" EIP%08x=", M.x86.R_EIP ); - xprintf("\r\n\t"); - if (ACCESS_FLAG(F_OF)) xprintf("OV "); /* CHECKED... */ - else xprintf("NV "); - if (ACCESS_FLAG(F_DF)) xprintf("DN "); - else xprintf("UP "); - if (ACCESS_FLAG(F_IF)) xprintf("EI "); - else xprintf("DI "); - if (ACCESS_FLAG(F_SF)) xprintf("NG "); - else xprintf("PL "); - if (ACCESS_FLAG(F_ZF)) xprintf("ZR "); - else xprintf("NZ "); - if (ACCESS_FLAG(F_AF)) xprintf("AC "); - else xprintf("NA "); - if (ACCESS_FLAG(F_PF)) xprintf("PE "); - else xprintf("PO "); - if (ACCESS_FLAG(F_CF)) xprintf("CY "); - else xprintf("NC "); - xprintf("\r\n"); -} diff --git a/BaS_gcc/x86emu/x86decode.c b/BaS_gcc/x86emu/x86decode.c deleted file mode 100644 index 6dd7edb..0000000 --- a/BaS_gcc/x86emu/x86decode.c +++ /dev/null @@ -1,1156 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file includes subroutines which are related to - * instruction decoding and accessess of immediate data via IP. etc. - * - ****************************************************************************/ - -#include "x86emui.h" -#include -#include "bas_printf.h" -#include "x86debug.h" - -/*----------------------------- Implementation ----------------------------*/ - -/**************************************************************************** -REMARKS: -Handles any pending asychronous interrupts. - ****************************************************************************/ -static void x86emu_intr_handle(void) -{ - uint8_t intno; - - if (M.x86.intr & INTR_SYNCH) { - intno = M.x86.intno; - if (_X86EMU_intrTab[intno]) { - (*_X86EMU_intrTab[intno])(intno); - } else { - push_word((uint16_t) M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(intno * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(intno * 4); - M.x86.intr = 0; - } - } -} - -/**************************************************************************** -PARAMETERS: -intrnum - Interrupt number to raise - -REMARKS: -Raise the specified interrupt to be handled before the execution of the -next instruction. - ****************************************************************************/ -void x86emu_intr_raise(uint8_t intrnum) -{ - dbg("%s: Rasing exception 0x%02x\r\n", __FUNCTION__, intrnum); - x86emu_dump_regs(); - M.x86.intno = intrnum; - M.x86.intr |= INTR_SYNCH; -} - -/**************************************************************************** -REMARKS: -Main execution loop for the emulator. We return from here when the system -halts, which is normally caused by a stack fault when we return from the -original real mode call. - ****************************************************************************/ -void X86EMU_exec(void) -{ - uint8_t op1; - - M.x86.intr = 0; - DB(x86emu_end_instr();) - - for (;;) - { - if (CHECK_IP_FETCH()) - x86emu_check_ip_access(); - /* If debugging, save the IP and CS values. */ - SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP); - INC_DECODED_INST_LEN(1); - if (M.x86.intr) - { - if (M.x86.intr & INTR_HALTED) - { - if (M.x86.R_SP != 0) - { - dbg("%s: halted\r\n", __FUNCTION__); - X86EMU_trace_regs(); - } - else - { - if (M.x86.debug) - dbg("%s: Service completed successfully\r\n", __FUNCTION__); - } - return; - } - if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) || - !ACCESS_FLAG(F_IF)) { - x86emu_intr_handle(); - } - } - op1 = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - (*x86emu_optab[op1])(op1); - //if (M.x86.debug & DEBUG_EXIT) { - // M.x86.debug &= ~DEBUG_EXIT; - // return; - //} - } -} - -/**************************************************************************** -REMARKS: -Halts the system by setting the halted system flag. - ****************************************************************************/ -void X86EMU_halt_sys(void) -{ - M.x86.intr |= INTR_HALTED; -} - -/**************************************************************************** -PARAMETERS: -mod - Mod value from decoded byte -regh - Reg h value from decoded byte -regl - Reg l value from decoded byte - -REMARKS: -Raise the specified interrupt to be handled before the execution of the -next instruction. - -NOTE: Do not inline this function, as (*sys_rdb) is already inline! - ****************************************************************************/ -void fetch_decode_modrm( - int *mod, - int *regh, - int *regl) -{ - int fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - INC_DECODED_INST_LEN(1); - *mod = (fetched >> 6) & 0x03; - *regh = (fetched >> 3) & 0x07; - *regl = (fetched >> 0) & 0x07; -} - -/**************************************************************************** -RETURNS: -Immediate byte value read from instruction queue - -REMARKS: -This function returns the immediate byte from the instruction queue, and -moves the instruction pointer to the next value. - -NOTE: Do not inline this function, as (*sys_rdb) is already inline! - ****************************************************************************/ -uint8_t fetch_byte_imm(void) -{ - uint8_t fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - INC_DECODED_INST_LEN(1); - return fetched; -} - -/**************************************************************************** -RETURNS: -Immediate word value read from instruction queue - -REMARKS: -This function returns the immediate byte from the instruction queue, and -moves the instruction pointer to the next value. - -NOTE: Do not inline this function, as (*sys_rdw) is already inline! - ****************************************************************************/ -uint16_t fetch_word_imm(void) -{ - uint16_t fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdw)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP)); - M.x86.R_IP += 2; - INC_DECODED_INST_LEN(2); - return fetched; -} - -/**************************************************************************** -RETURNS: -Immediate lone value read from instruction queue - -REMARKS: -This function returns the immediate byte from the instruction queue, and -moves the instruction pointer to the next value. - -NOTE: Do not inline this function, as (*sys_rdw) is already inline! - ****************************************************************************/ -uint32_t fetch_long_imm(void) -{ - uint32_t fetched; - - DB( if (CHECK_IP_FETCH()) - x86emu_check_ip_access();) - fetched = (*sys_rdl)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP)); - M.x86.R_IP += 4; - INC_DECODED_INST_LEN(4); - return fetched; -} - -/**************************************************************************** -RETURNS: -Value of the default data segment - -REMARKS: -Inline function that returns the default data segment for the current -instruction. - -On the x86 processor, the default segment is not always DS if there is -no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to -addresses relative to SS (ie: on the stack). So, at the minimum, all -decodings of addressing modes would have to set/clear a bit describing -whether the access is relative to DS or SS. That is the function of the -cpu-state-varible M.x86.mode. There are several potential states: - -repe prefix seen (handled elsewhere) -repne prefix seen (ditto) - -cs segment override -ds segment override -es segment override -fs segment override -gs segment override -ss segment override - -ds/ss select (in absense of override) - -Each of the above 7 items are handled with a bit in the mode field. - ****************************************************************************/ -_INLINE uint32_t get_data_segment(void) -{ -#define GET_SEGMENT(segment) - switch (M.x86.mode & SYSMODE_SEGMASK) { - case 0: /* default case: use ds register */ - case SYSMODE_SEGOVR_DS: - case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS: - return M.x86.R_DS; - case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */ - return M.x86.R_SS; - case SYSMODE_SEGOVR_CS: - case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS: - return M.x86.R_CS; - case SYSMODE_SEGOVR_ES: - case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS: - return M.x86.R_ES; - case SYSMODE_SEGOVR_FS: - case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS: - return M.x86.R_FS; - case SYSMODE_SEGOVR_GS: - case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS: - return M.x86.R_GS; - case SYSMODE_SEGOVR_SS: - case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS: - return M.x86.R_SS; - default: -#ifdef DEBUG - DPRINT("error: should not happen: multiple overrides.\r\n"); -#endif - HALT_SYS(); - return 0; - } -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to load data from - -RETURNS: -Byte value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint8_t fetch_data_byte( - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - return (*sys_rdb)((get_data_segment() << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to load data from - -RETURNS: -Word value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint16_t fetch_data_word( - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - return (*sys_rdw)((get_data_segment() << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to load data from - -RETURNS: -Long value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint32_t fetch_data_long( - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - return (*sys_rdl)((get_data_segment() << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to load data from -offset - Offset to load data from - -RETURNS: -Byte value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint8_t fetch_data_byte_abs( - unsigned int segment, - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - return (*sys_rdb)(((uint32_t)segment << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to load data from -offset - Offset to load data from - -RETURNS: -Word value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint16_t fetch_data_word_abs( - unsigned int segment, - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - return (*sys_rdw)(((uint32_t)segment << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to load data from -offset - Offset to load data from - -RETURNS: -Long value read from the absolute memory location. - -NOTE: Do not inline this function as (*sys_rdX) is already inline! - ****************************************************************************/ -uint32_t fetch_data_long_abs( - unsigned int segment, - unsigned int offset) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - return (*sys_rdl)(((uint32_t)segment << 4) + offset); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a word value to an segmented memory location. The segment used is -the current 'default' segment, which may have been overridden. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_byte( - unsigned int offset, - uint8_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - (*sys_wrb)((get_data_segment() << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a word value to an segmented memory location. The segment used is -the current 'default' segment, which may have been overridden. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_word( - unsigned int offset, - uint16_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - (*sys_wrw)((get_data_segment() << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a long value to an segmented memory location. The segment used is -the current 'default' segment, which may have been overridden. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_long( - unsigned int offset, - uint32_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access((uint16_t)get_data_segment(), offset); -#endif - (*sys_wrl)((get_data_segment() << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to store data at -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a byte value to an absolute memory location. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_byte_abs( - unsigned int segment, - unsigned int offset, - uint8_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - (*sys_wrb)(((uint32_t)segment << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to store data at -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a word value to an absolute memory location. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_word_abs( - unsigned int segment, - unsigned int offset, - uint16_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - (*sys_wrw)(((uint32_t)segment << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -segment - Segment to store data at -offset - Offset to store data at -val - Value to store - -REMARKS: -Writes a long value to an absolute memory location. - -NOTE: Do not inline this function as (*sys_wrX) is already inline! - ****************************************************************************/ -void store_data_long_abs( - unsigned int segment, - unsigned int offset, - uint32_t val) -{ -#ifdef DEBUG - if (CHECK_DATA_ACCESS()) - x86emu_check_data_access(segment, offset); -#endif - (*sys_wrl)(((uint32_t)segment << 4) + offset, val); -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for byte operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint8_t* decode_rm_byte_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("AL"); - return &M.x86.R_AL; - case 1: - DECODE_PRINTF("CL"); - return &M.x86.R_CL; - case 2: - DECODE_PRINTF("DL"); - return &M.x86.R_DL; - case 3: - DECODE_PRINTF("BL"); - return &M.x86.R_BL; - case 4: - DECODE_PRINTF("AH"); - return &M.x86.R_AH; - case 5: - DECODE_PRINTF("CH"); - return &M.x86.R_CH; - case 6: - DECODE_PRINTF("DH"); - return &M.x86.R_DH; - case 7: - DECODE_PRINTF("BH"); - return &M.x86.R_BH; - } - HALT_SYS(); - return NULL; /* NOT REACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for word operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint16_t* decode_rm_word_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("AX"); - return &M.x86.R_AX; - case 1: - DECODE_PRINTF("CX"); - return &M.x86.R_CX; - case 2: - DECODE_PRINTF("DX"); - return &M.x86.R_DX; - case 3: - DECODE_PRINTF("BX"); - return &M.x86.R_BX; - case 4: - DECODE_PRINTF("SP"); - return &M.x86.R_SP; - case 5: - DECODE_PRINTF("BP"); - return &M.x86.R_BP; - case 6: - DECODE_PRINTF("SI"); - return &M.x86.R_SI; - case 7: - DECODE_PRINTF("DI"); - return &M.x86.R_DI; - } - HALT_SYS(); - return NULL; /* NOTREACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for dword operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint32_t* decode_rm_long_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("EAX"); - return &M.x86.R_EAX; - case 1: - DECODE_PRINTF("ECX"); - return &M.x86.R_ECX; - case 2: - DECODE_PRINTF("EDX"); - return &M.x86.R_EDX; - case 3: - DECODE_PRINTF("EBX"); - return &M.x86.R_EBX; - case 4: - DECODE_PRINTF("ESP"); - return &M.x86.R_ESP; - case 5: - DECODE_PRINTF("EBP"); - return &M.x86.R_EBP; - case 6: - DECODE_PRINTF("ESI"); - return &M.x86.R_ESI; - case 7: - DECODE_PRINTF("EDI"); - return &M.x86.R_EDI; - } - HALT_SYS(); - return NULL; /* NOTREACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -reg - Register to decode - -RETURNS: -Pointer to the appropriate register - -REMARKS: -Return a pointer to the register given by the R/RM field of the -modrm byte, for word operands, modified from above for the weirdo -special case of segreg operands. Also enables the decoding of instructions. - ****************************************************************************/ -uint16_t* decode_rm_seg_register( - int reg) -{ - switch (reg) { - case 0: - DECODE_PRINTF("ES"); - return &M.x86.R_ES; - case 1: - DECODE_PRINTF("CS"); - return &M.x86.R_CS; - case 2: - DECODE_PRINTF("SS"); - return &M.x86.R_SS; - case 3: - DECODE_PRINTF("DS"); - return &M.x86.R_DS; - case 4: - DECODE_PRINTF("FS"); - return &M.x86.R_FS; - case 5: - DECODE_PRINTF("GS"); - return &M.x86.R_GS; - case 6: - case 7: - DECODE_PRINTF("ILLEGAL SEGREG"); - break; - } - HALT_SYS(); - return NULL; /* NOT REACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -scale - scale value of SIB byte -index - index value of SIB byte - -RETURNS: -Value of scale * index - -REMARKS: -Decodes scale/index of SIB byte and returns relevant offset part of -effective address. - ****************************************************************************/ -unsigned decode_sib_si( - int scale, - int index) -{ - scale = 1 << scale; - if (scale > 1) { - DECODE_PRINTF2("[%d*", scale); - } else { - DECODE_PRINTF("["); - } - switch (index) { - case 0: - DECODE_PRINTF("EAX]"); - return M.x86.R_EAX * index; - case 1: - DECODE_PRINTF("ECX]"); - return M.x86.R_ECX * index; - case 2: - DECODE_PRINTF("EDX]"); - return M.x86.R_EDX * index; - case 3: - DECODE_PRINTF("EBX]"); - return M.x86.R_EBX * index; - case 4: - DECODE_PRINTF("0]"); - return 0; - case 5: - DECODE_PRINTF("EBP]"); - return M.x86.R_EBP * index; - case 6: - DECODE_PRINTF("ESI]"); - return M.x86.R_ESI * index; - case 7: - DECODE_PRINTF("EDI]"); - return M.x86.R_EDI * index; - } - HALT_SYS(); - return 0; /* NOT REACHED OR REACHED ON ERROR */ -} - -/**************************************************************************** -PARAMETERS: -mod - MOD value of preceding ModR/M byte - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Decodes SIB addressing byte and returns calculated effective address. - ****************************************************************************/ -unsigned decode_sib_address( - int mod) -{ - int sib = fetch_byte_imm(); - int ss = (sib >> 6) & 0x03; - int index = (sib >> 3) & 0x07; - int base = sib & 0x07; - int offset = 0; - int displacement; - - switch (base) { - case 0: - DECODE_PRINTF("[EAX]"); - offset = M.x86.R_EAX; - break; - case 1: - DECODE_PRINTF("[ECX]"); - offset = M.x86.R_ECX; - break; - case 2: - DECODE_PRINTF("[EDX]"); - offset = M.x86.R_EDX; - break; - case 3: - DECODE_PRINTF("[EBX]"); - offset = M.x86.R_EBX; - break; - case 4: - DECODE_PRINTF("[ESP]"); - offset = M.x86.R_ESP; - break; - case 5: - switch (mod) { - case 0: - displacement = (int32_t)fetch_long_imm(); - DECODE_PRINTF2("[%d]", displacement); - offset = displacement; - break; - case 1: - displacement = (int8_t)fetch_byte_imm(); - DECODE_PRINTF2("[%d][EBP]", displacement); - offset = M.x86.R_EBP + displacement; - break; - case 2: - displacement = (int32_t)fetch_long_imm(); - DECODE_PRINTF2("[%d][EBP]", displacement); - offset = M.x86.R_EBP + displacement; - break; - default: - HALT_SYS(); - } - DECODE_PRINTF("[EAX]"); - offset = M.x86.R_EAX; - break; - case 6: - DECODE_PRINTF("[ESI]"); - offset = M.x86.R_ESI; - break; - case 7: - DECODE_PRINTF("[EDI]"); - offset = M.x86.R_EDI; - break; - default: - HALT_SYS(); - } - offset += decode_sib_si(ss, index); - return offset; -} - -/**************************************************************************** -PARAMETERS: -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Return the offset given by mod=00 addressing. Also enables the -decoding of instructions. - -NOTE: The code which specifies the corresponding segment (ds vs ss) -below in the case of [BP+..]. The assumption here is that at the -point that this subroutine is called, the bit corresponding to -SYSMODE_SEG_DS_SS will be zero. After every instruction -except the segment override instructions, this bit (as well -as any bits indicating segment overrides) will be clear. So -if a SS access is needed, set this bit. Otherwise, DS access -occurs (unless any of the segment override bits are set). - ****************************************************************************/ -unsigned decode_rm00_address( - int rm) -{ - unsigned offset; - - if (M.x86.mode & SYSMODE_PREFIX_ADDR) { - /* 32-bit addressing */ - switch (rm) { - case 0: - DECODE_PRINTF("[EAX]"); - return M.x86.R_EAX; - case 1: - DECODE_PRINTF("[ECX]"); - return M.x86.R_ECX; - case 2: - DECODE_PRINTF("[EDX]"); - return M.x86.R_EDX; - case 3: - DECODE_PRINTF("[EBX]"); - return M.x86.R_EBX; - case 4: - return decode_sib_address(0); - case 5: - offset = fetch_long_imm(); - DECODE_PRINTF2("[%x]", offset); - return offset; - case 6: - DECODE_PRINTF("[ESI]"); - return M.x86.R_ESI; - case 7: - DECODE_PRINTF("[EDI]"); - return M.x86.R_EDI; - } - } else { - /* 16-bit addressing */ - switch (rm) { - case 0: - DECODE_PRINTF("[BX+SI]"); - return (M.x86.R_BX + M.x86.R_SI) & 0xffff; - case 1: - DECODE_PRINTF("[BX+DI]"); - return (M.x86.R_BX + M.x86.R_DI) & 0xffff; - case 2: - DECODE_PRINTF("[BP+SI]"); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_SI) & 0xffff; - case 3: - DECODE_PRINTF("[BP+DI]"); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_DI) & 0xffff; - case 4: - DECODE_PRINTF("[SI]"); - return M.x86.R_SI; - case 5: - DECODE_PRINTF("[DI]"); - return M.x86.R_DI; - case 6: - offset = fetch_word_imm(); - DECODE_PRINTF2("[%x]", offset); - return offset; - case 7: - DECODE_PRINTF("[BX]"); - return M.x86.R_BX; - } - } - HALT_SYS(); - return 0; -} - -/**************************************************************************** -PARAMETERS: -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Return the offset given by mod=01 addressing. Also enables the -decoding of instructions. - ****************************************************************************/ -unsigned decode_rm01_address( - int rm) -{ - int displacement; - - if (M.x86.mode & SYSMODE_PREFIX_ADDR) { - /* 32-bit addressing */ - if (rm != 4) - displacement = (int8_t)fetch_byte_imm(); - else - displacement = 0; - - switch (rm) { - case 0: - DECODE_PRINTF2("%d[EAX]", displacement); - return M.x86.R_EAX + displacement; - case 1: - DECODE_PRINTF2("%d[ECX]", displacement); - return M.x86.R_ECX + displacement; - case 2: - DECODE_PRINTF2("%d[EDX]", displacement); - return M.x86.R_EDX + displacement; - case 3: - DECODE_PRINTF2("%d[EBX]", displacement); - return M.x86.R_EBX + displacement; - case 4: { - int offset = decode_sib_address(1); - displacement = (int8_t)fetch_byte_imm(); - DECODE_PRINTF2("[%d]", displacement); - return offset + displacement; - } - case 5: - DECODE_PRINTF2("%d[EBP]", displacement); - return M.x86.R_EBP + displacement; - case 6: - DECODE_PRINTF2("%d[ESI]", displacement); - return M.x86.R_ESI + displacement; - case 7: - DECODE_PRINTF2("%d[EDI]", displacement); - return M.x86.R_EDI + displacement; - } - } else { - /* 16-bit addressing */ - displacement = (int8_t)fetch_byte_imm(); - switch (rm) { - case 0: - DECODE_PRINTF2("%d[BX+SI]", displacement); - return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff; - case 1: - DECODE_PRINTF2("%d[BX+DI]", displacement); - return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff; - case 2: - DECODE_PRINTF2("%d[BP+SI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff; - case 3: - DECODE_PRINTF2("%d[BP+DI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff; - case 4: - DECODE_PRINTF2("%d[SI]", displacement); - return (M.x86.R_SI + displacement) & 0xffff; - case 5: - DECODE_PRINTF2("%d[DI]", displacement); - return (M.x86.R_DI + displacement) & 0xffff; - case 6: - DECODE_PRINTF2("%d[BP]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + displacement) & 0xffff; - case 7: - DECODE_PRINTF2("%d[BX]", displacement); - return (M.x86.R_BX + displacement) & 0xffff; - } - } - HALT_SYS(); - return 0; /* SHOULD NOT HAPPEN */ -} - -/**************************************************************************** -PARAMETERS: -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding - -REMARKS: -Return the offset given by mod=10 addressing. Also enables the -decoding of instructions. - ****************************************************************************/ -unsigned decode_rm10_address( - int rm) -{ - if (M.x86.mode & SYSMODE_PREFIX_ADDR) { - int displacement; - - /* 32-bit addressing */ - if (rm != 4) - displacement = (int32_t)fetch_long_imm(); - else - displacement = 0; - - switch (rm) { - case 0: - DECODE_PRINTF2("%d[EAX]", displacement); - return M.x86.R_EAX + displacement; - case 1: - DECODE_PRINTF2("%d[ECX]", displacement); - return M.x86.R_ECX + displacement; - case 2: - DECODE_PRINTF2("%d[EDX]", displacement); - return M.x86.R_EDX + displacement; - case 3: - DECODE_PRINTF2("%d[EBX]", displacement); - return M.x86.R_EBX + displacement; - case 4: { - int offset = decode_sib_address(2); - displacement = (int32_t)fetch_long_imm(); - DECODE_PRINTF2("[%d]", displacement); - return offset + displacement; - } - case 5: - DECODE_PRINTF2("%d[EBP]", displacement); - return M.x86.R_EBP + displacement; - case 6: - DECODE_PRINTF2("%d[ESI]", displacement); - return M.x86.R_ESI + displacement; - case 7: - DECODE_PRINTF2("%d[EDI]", displacement); - return M.x86.R_EDI + displacement; - } - } else { - int displacement = (int16_t)fetch_word_imm(); - - /* 16-bit addressing */ - switch (rm) { - case 0: - DECODE_PRINTF2("%d[BX+SI]", displacement); - return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff; - case 1: - DECODE_PRINTF2("%d[BX+DI]", displacement); - return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff; - case 2: - DECODE_PRINTF2("%d[BP+SI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff; - case 3: - DECODE_PRINTF2("%d[BP+DI]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff; - case 4: - DECODE_PRINTF2("%d[SI]", displacement); - return (M.x86.R_SI + displacement) & 0xffff; - case 5: - DECODE_PRINTF2("%d[DI]", displacement); - return (M.x86.R_DI + displacement) & 0xffff; - case 6: - DECODE_PRINTF2("%d[BP]", displacement); - M.x86.mode |= SYSMODE_SEG_DS_SS; - return (M.x86.R_BP + displacement) & 0xffff; - case 7: - DECODE_PRINTF2("%d[BX]", displacement); - return (M.x86.R_BX + displacement) & 0xffff; - } - } - HALT_SYS(); - return 0; /* SHOULD NOT HAPPEN */ -} - - -/**************************************************************************** -PARAMETERS: -mod - modifier -rm - RM value to decode - -RETURNS: -Offset in memory for the address decoding, multiplexing calls to -the decode_rmXX_address functions - -REMARKS: -Return the offset given by "mod" addressing. - ****************************************************************************/ - -unsigned decode_rmXX_address(int mod, int rm) -{ - if(mod == 0) - return decode_rm00_address(rm); - if(mod == 1) - return decode_rm01_address(rm); - return decode_rm10_address(rm); -} - - - diff --git a/BaS_gcc/x86emu/x86emu.c b/BaS_gcc/x86emu/x86emu.c new file mode 100644 index 0000000..a157b75 --- /dev/null +++ b/BaS_gcc/x86emu/x86emu.c @@ -0,0 +1,8112 @@ +/* $NetBSD: x86emu.c,v 1.10 2014/08/04 21:41:44 joerg Exp $ */ + +/**************************************************************************** +* +* Realmode X86 Emulator Library +* +* Copyright (C) 1996-1999 SciTech Software, Inc. +* Copyright (C) David Mosberger-Tang +* Copyright (C) 1999 Egbert Eich +* Copyright (C) 2007 Joerg Sonnenberger +* +* ======================================================================== +* +* Permission to use, copy, modify, distribute, and sell this software and +* its documentation for any purpose is hereby granted without fee, +* provided that the above copyright notice appear in all copies and that +* both that copyright notice and this permission notice appear in +* supporting documentation, and that the name of the authors not be used +* in advertising or publicity pertaining to distribution of the software +* without specific, written prior permission. The authors makes no +* representations about the suitability of this software for any purpose. +* It is provided "as is" without express or implied warranty. +* +* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO +* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR +* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF +* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR +* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +* PERFORMANCE OF THIS SOFTWARE. +* +****************************************************************************/ + +#include +#include +#include + +static void x86emu_intr_raise (struct X86EMU *, uint8_t type); + +static void X86EMU_exec_one_byte(struct X86EMU *); +static void X86EMU_exec_two_byte(struct X86EMU *); + +static void fetch_decode_modrm (struct X86EMU *); +static uint8_t fetch_byte_imm (struct X86EMU *); +static uint16_t fetch_word_imm (struct X86EMU *); +static uint32_t fetch_long_imm (struct X86EMU *); +static uint8_t fetch_data_byte (struct X86EMU *, uint32_t offset); +static uint8_t fetch_byte (struct X86EMU *, uint32_t segment, uint32_t offset); +static uint16_t fetch_data_word (struct X86EMU *, uint32_t offset); +static uint16_t fetch_word (struct X86EMU *, uint32_t segment, uint32_t offset); +static uint32_t fetch_data_long (struct X86EMU *, uint32_t offset); +static uint32_t fetch_long (struct X86EMU *, uint32_t segment, uint32_t offset); +static void store_data_byte (struct X86EMU *, uint32_t offset, uint8_t val); +static void store_byte (struct X86EMU *, uint32_t segment, uint32_t offset, uint8_t val); +static void store_data_word (struct X86EMU *, uint32_t offset, uint16_t val); +static void store_word (struct X86EMU *, uint32_t segment, uint32_t offset, uint16_t val); +static void store_data_long (struct X86EMU *, uint32_t offset, uint32_t val); +static void store_long (struct X86EMU *, uint32_t segment, uint32_t offset, uint32_t val); +static uint8_t* decode_rl_byte_register(struct X86EMU *); +static uint16_t* decode_rl_word_register(struct X86EMU *); +static uint32_t* decode_rl_long_register(struct X86EMU *); +static uint8_t* decode_rh_byte_register(struct X86EMU *); +static uint16_t* decode_rh_word_register(struct X86EMU *); +static uint32_t* decode_rh_long_register(struct X86EMU *); +static uint16_t* decode_rh_seg_register(struct X86EMU *); +static uint32_t decode_rl_address(struct X86EMU *); + +static uint8_t decode_and_fetch_byte(struct X86EMU *); +static uint16_t decode_and_fetch_word(struct X86EMU *); +static uint32_t decode_and_fetch_long(struct X86EMU *); + +static uint8_t decode_and_fetch_byte_imm8(struct X86EMU *, uint8_t *); +static uint16_t decode_and_fetch_word_imm8(struct X86EMU *, uint8_t *); +static uint32_t decode_and_fetch_long_imm8(struct X86EMU *, uint8_t *); + +static uint16_t decode_and_fetch_word_disp(struct X86EMU *, int16_t); +static uint32_t decode_and_fetch_long_disp(struct X86EMU *, int16_t); + +static void write_back_byte(struct X86EMU *, uint8_t); +static void write_back_word(struct X86EMU *, uint16_t); +static void write_back_long(struct X86EMU *, uint32_t); + +static uint16_t aaa_word (struct X86EMU *, uint16_t d); +static uint16_t aas_word (struct X86EMU *, uint16_t d); +static uint16_t aad_word (struct X86EMU *, uint16_t d); +static uint16_t aam_word (struct X86EMU *, uint8_t d); +static uint8_t adc_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t adc_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t adc_long (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t add_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t add_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t add_long (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t and_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t and_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t and_long (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t cmp_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t cmp_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t cmp_long (struct X86EMU *, uint32_t d, uint32_t s); +static void cmp_byte_no_return (struct X86EMU *, uint8_t d, uint8_t s); +static void cmp_word_no_return (struct X86EMU *, uint16_t d, uint16_t s); +static void cmp_long_no_return (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t daa_byte (struct X86EMU *, uint8_t d); +static uint8_t das_byte (struct X86EMU *, uint8_t d); +static uint8_t dec_byte (struct X86EMU *, uint8_t d); +static uint16_t dec_word (struct X86EMU *, uint16_t d); +static uint32_t dec_long (struct X86EMU *, uint32_t d); +static uint8_t inc_byte (struct X86EMU *, uint8_t d); +static uint16_t inc_word (struct X86EMU *, uint16_t d); +static uint32_t inc_long (struct X86EMU *, uint32_t d); +static uint8_t or_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t or_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t or_long (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t neg_byte (struct X86EMU *, uint8_t s); +static uint16_t neg_word (struct X86EMU *, uint16_t s); +static uint32_t neg_long (struct X86EMU *, uint32_t s); +static uint8_t rcl_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t rcl_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t rcl_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint8_t rcr_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t rcr_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t rcr_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint8_t rol_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t rol_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t rol_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint8_t ror_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t ror_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t ror_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint8_t shl_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t shl_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t shl_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint8_t shr_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t shr_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t shr_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint8_t sar_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t sar_word (struct X86EMU *, uint16_t d, uint8_t s); +static uint32_t sar_long (struct X86EMU *, uint32_t d, uint8_t s); +static uint16_t shld_word (struct X86EMU *, uint16_t d, uint16_t fill, uint8_t s); +static uint32_t shld_long (struct X86EMU *, uint32_t d, uint32_t fill, uint8_t s); +static uint16_t shrd_word (struct X86EMU *, uint16_t d, uint16_t fill, uint8_t s); +static uint32_t shrd_long (struct X86EMU *, uint32_t d, uint32_t fill, uint8_t s); +static uint8_t sbb_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t sbb_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t sbb_long (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t sub_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t sub_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t sub_long (struct X86EMU *, uint32_t d, uint32_t s); +static void test_byte (struct X86EMU *, uint8_t d, uint8_t s); +static void test_word (struct X86EMU *, uint16_t d, uint16_t s); +static void test_long (struct X86EMU *, uint32_t d, uint32_t s); +static uint8_t xor_byte (struct X86EMU *, uint8_t d, uint8_t s); +static uint16_t xor_word (struct X86EMU *, uint16_t d, uint16_t s); +static uint32_t xor_long (struct X86EMU *, uint32_t d, uint32_t s); +static void imul_byte (struct X86EMU *, uint8_t s); +static void imul_word (struct X86EMU *, uint16_t s); +static void imul_long (struct X86EMU *, uint32_t s); +static void mul_byte (struct X86EMU *, uint8_t s); +static void mul_word (struct X86EMU *, uint16_t s); +static void mul_long (struct X86EMU *, uint32_t s); +static void idiv_byte (struct X86EMU *, uint8_t s); +static void idiv_word (struct X86EMU *, uint16_t s); +static void idiv_long (struct X86EMU *, uint32_t s); +static void div_byte (struct X86EMU *, uint8_t s); +static void div_word (struct X86EMU *, uint16_t s); +static void div_long (struct X86EMU *, uint32_t s); +static void ins (struct X86EMU *, int size); +static void outs (struct X86EMU *, int size); +static void push_word (struct X86EMU *, uint16_t w); +static void push_long (struct X86EMU *, uint32_t w); +static uint16_t pop_word (struct X86EMU *); +static uint32_t pop_long (struct X86EMU *); + +/**************************************************************************** +REMARKS: +Handles any pending asychronous interrupts. +****************************************************************************/ +static void +x86emu_intr_dispatch(struct X86EMU *emu, uint8_t intno) +{ + if (emu->_X86EMU_intrTab[intno]) { + (*emu->_X86EMU_intrTab[intno]) (emu, intno); + } else { + push_word(emu, (uint16_t) emu->x86.R_FLG); + CLEAR_FLAG(F_IF); + CLEAR_FLAG(F_TF); + push_word(emu, emu->x86.R_CS); + emu->x86.R_CS = fetch_word(emu, 0, intno * 4 + 2); + push_word(emu, emu->x86.R_IP); + emu->x86.R_IP = fetch_word(emu, 0, intno * 4); + } +} + +static void +x86emu_intr_handle(struct X86EMU *emu) +{ + uint8_t intno; + + if (emu->x86.intr & INTR_SYNCH) { + intno = emu->x86.intno; + emu->x86.intr = 0; + x86emu_intr_dispatch(emu, intno); + } +} +/**************************************************************************** +PARAMETERS: +intrnum - Interrupt number to raise + +REMARKS: +Raise the specified interrupt to be handled before the execution of the +next instruction. +****************************************************************************/ +void +x86emu_intr_raise(struct X86EMU *emu, uint8_t intrnum) +{ + emu->x86.intno = intrnum; + emu->x86.intr |= INTR_SYNCH; +} +/**************************************************************************** +REMARKS: +Main execution loop for the emulator. We return from here when the system +halts, which is normally caused by a stack fault when we return from the +original real mode call. +****************************************************************************/ +void +X86EMU_exec(struct X86EMU *emu) +{ + emu->x86.intr = 0; + +#ifdef _NOT_USED_ +#ifdef _KERNEL + if (setjmp(&emu->exec_state)) + return; +#else + if (setjmp(emu->exec_state)) + return; +#endif +#endif /* _NOT_USED_ */ + + for (;;) { + if (emu->x86.intr) { + if (((emu->x86.intr & INTR_SYNCH) && (emu->x86.intno == 0 || emu->x86.intno == 2)) || + !ACCESS_FLAG(F_IF)) { + x86emu_intr_handle(emu); + } + } + if (emu->x86.R_CS == 0 && emu->x86.R_IP == 0) + return; + X86EMU_exec_one_byte(emu); + ++emu->cur_cycles; + } +} + +void +X86EMU_exec_call(struct X86EMU *emu, uint16_t seg, uint16_t off) +{ + push_word(emu, 0); + push_word(emu, 0); + emu->x86.R_CS = seg; + emu->x86.R_IP = off; + + X86EMU_exec(emu); +} + +void +X86EMU_exec_intr(struct X86EMU *emu, uint8_t intr) +{ + push_word(emu, emu->x86.R_FLG); + CLEAR_FLAG(F_IF); + CLEAR_FLAG(F_TF); + push_word(emu, 0); + push_word(emu, 0); + emu->x86.R_CS = (*emu->emu_rdw)(emu, intr * 4 + 2); + emu->x86.R_IP = (*emu->emu_rdw)(emu, intr * 4); + emu->x86.intr = 0; + + X86EMU_exec(emu); +} +/**************************************************************************** +REMARKS: +Halts the system by setting the halted system flag. +****************************************************************************/ +void +X86EMU_halt_sys(struct X86EMU *emu) +{ +#ifdef _KERNEL + longjmp(&emu->exec_state); +#else + longjmp(emu->exec_state, 1); +#endif +} +/**************************************************************************** +PARAMETERS: +mod - Mod value from decoded byte +regh - Reg h value from decoded byte +regl - Reg l value from decoded byte + +REMARKS: +Raise the specified interrupt to be handled before the execution of the +next instruction. + +NOTE: Do not inline this function, as (*emu->emu_rdb) is already inline! +****************************************************************************/ +static void +fetch_decode_modrm(struct X86EMU *emu) +{ + int fetched; + + fetched = fetch_byte_imm(emu); + emu->cur_mod = (fetched >> 6) & 0x03; + emu->cur_rh = (fetched >> 3) & 0x07; + emu->cur_rl = (fetched >> 0) & 0x07; +} +/**************************************************************************** +RETURNS: +Immediate byte value read from instruction queue + +REMARKS: +This function returns the immediate byte from the instruction queue, and +moves the instruction pointer to the next value. + +NOTE: Do not inline this function, as (*emu->emu_rdb) is already inline! +****************************************************************************/ +static uint8_t +fetch_byte_imm(struct X86EMU *emu) +{ + uint8_t fetched; + + fetched = fetch_byte(emu, emu->x86.R_CS, emu->x86.R_IP); + emu->x86.R_IP++; + return fetched; +} +/**************************************************************************** +RETURNS: +Immediate word value read from instruction queue + +REMARKS: +This function returns the immediate byte from the instruction queue, and +moves the instruction pointer to the next value. + +NOTE: Do not inline this function, as (*emu->emu_rdw) is already inline! +****************************************************************************/ +static uint16_t +fetch_word_imm(struct X86EMU *emu) +{ + uint16_t fetched; + + fetched = fetch_word(emu, emu->x86.R_CS, emu->x86.R_IP); + emu->x86.R_IP += 2; + return fetched; +} +/**************************************************************************** +RETURNS: +Immediate lone value read from instruction queue + +REMARKS: +This function returns the immediate byte from the instruction queue, and +moves the instruction pointer to the next value. + +NOTE: Do not inline this function, as (*emu->emu_rdw) is already inline! +****************************************************************************/ +static uint32_t +fetch_long_imm(struct X86EMU *emu) +{ + uint32_t fetched; + + fetched = fetch_long(emu, emu->x86.R_CS, emu->x86.R_IP); + emu->x86.R_IP += 4; + return fetched; +} +/**************************************************************************** +RETURNS: +Value of the default data segment + +REMARKS: +Inline function that returns the default data segment for the current +instruction. + +On the x86 processor, the default segment is not always DS if there is +no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to +addresses relative to SS (ie: on the stack). So, at the minimum, all +decodings of addressing modes would have to set/clear a bit describing +whether the access is relative to DS or SS. That is the function of the +cpu-state-varible emu->x86.mode. There are several potential states: + + repe prefix seen (handled elsewhere) + repne prefix seen (ditto) + + cs segment override + ds segment override + es segment override + fs segment override + gs segment override + ss segment override + + ds/ss select (in absense of override) + +Each of the above 7 items are handled with a bit in the mode field. +****************************************************************************/ +static uint32_t +get_data_segment(struct X86EMU *emu) +{ + switch (emu->x86.mode & SYSMODE_SEGMASK) { + case 0: /* default case: use ds register */ + case SYSMODE_SEGOVR_DS: + case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS: + return emu->x86.R_DS; + case SYSMODE_SEG_DS_SS:/* non-overridden, use ss register */ + return emu->x86.R_SS; + case SYSMODE_SEGOVR_CS: + case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS: + return emu->x86.R_CS; + case SYSMODE_SEGOVR_ES: + case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS: + return emu->x86.R_ES; + case SYSMODE_SEGOVR_FS: + case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS: + return emu->x86.R_FS; + case SYSMODE_SEGOVR_GS: + case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS: + return emu->x86.R_GS; + case SYSMODE_SEGOVR_SS: + case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS: + return emu->x86.R_SS; + } + X86EMU_halt_sys(emu); +} +/**************************************************************************** +PARAMETERS: +offset - Offset to load data from + +RETURNS: +Byte value read from the absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint8_t +fetch_data_byte(struct X86EMU *emu, uint32_t offset) +{ + return fetch_byte(emu, get_data_segment(emu), offset); +} +/**************************************************************************** +PARAMETERS: +offset - Offset to load data from + +RETURNS: +Word value read from the absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint16_t +fetch_data_word(struct X86EMU *emu, uint32_t offset) +{ + return fetch_word(emu, get_data_segment(emu), offset); +} +/**************************************************************************** +PARAMETERS: +offset - Offset to load data from + +RETURNS: +Long value read from the absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint32_t +fetch_data_long(struct X86EMU *emu, uint32_t offset) +{ + return fetch_long(emu, get_data_segment(emu), offset); +} +/**************************************************************************** +PARAMETERS: +segment - Segment to load data from +offset - Offset to load data from + +RETURNS: +Byte value read from the absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint8_t +fetch_byte(struct X86EMU *emu, uint32_t segment, uint32_t offset) +{ + return (*emu->emu_rdb) (emu, ((uint32_t) segment << 4) + offset); +} +/**************************************************************************** +PARAMETERS: +segment - Segment to load data from +offset - Offset to load data from + +RETURNS: +Word value read from the absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint16_t +fetch_word(struct X86EMU *emu, uint32_t segment, uint32_t offset) +{ + return (*emu->emu_rdw) (emu, ((uint32_t) segment << 4) + offset); +} +/**************************************************************************** +PARAMETERS: +segment - Segment to load data from +offset - Offset to load data from + +RETURNS: +Long value read from the absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint32_t +fetch_long(struct X86EMU *emu, uint32_t segment, uint32_t offset) +{ + return (*emu->emu_rdl) (emu, ((uint32_t) segment << 4) + offset); +} +/**************************************************************************** +PARAMETERS: +offset - Offset to store data at +val - Value to store + +REMARKS: +Writes a word value to an segmented memory location. The segment used is +the current 'default' segment, which may have been overridden. + +NOTE: Do not inline this function as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +store_data_byte(struct X86EMU *emu, uint32_t offset, uint8_t val) +{ + store_byte(emu, get_data_segment(emu), offset, val); +} +/**************************************************************************** +PARAMETERS: +offset - Offset to store data at +val - Value to store + +REMARKS: +Writes a word value to an segmented memory location. The segment used is +the current 'default' segment, which may have been overridden. + +NOTE: Do not inline this function as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +store_data_word(struct X86EMU *emu, uint32_t offset, uint16_t val) +{ + store_word(emu, get_data_segment(emu), offset, val); +} +/**************************************************************************** +PARAMETERS: +offset - Offset to store data at +val - Value to store + +REMARKS: +Writes a long value to an segmented memory location. The segment used is +the current 'default' segment, which may have been overridden. + +NOTE: Do not inline this function as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +store_data_long(struct X86EMU *emu, uint32_t offset, uint32_t val) +{ + store_long(emu, get_data_segment(emu), offset, val); +} +/**************************************************************************** +PARAMETERS: +segment - Segment to store data at +offset - Offset to store data at +val - Value to store + +REMARKS: +Writes a byte value to an absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +store_byte(struct X86EMU *emu, uint32_t segment, uint32_t offset, uint8_t val) +{ + (*emu->emu_wrb) (emu, ((uint32_t) segment << 4) + offset, val); +} +/**************************************************************************** +PARAMETERS: +segment - Segment to store data at +offset - Offset to store data at +val - Value to store + +REMARKS: +Writes a word value to an absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +store_word(struct X86EMU *emu, uint32_t segment, uint32_t offset, uint16_t val) +{ + (*emu->emu_wrw) (emu, ((uint32_t) segment << 4) + offset, val); +} +/**************************************************************************** +PARAMETERS: +segment - Segment to store data at +offset - Offset to store data at +val - Value to store + +REMARKS: +Writes a long value to an absolute memory location. + +NOTE: Do not inline this function as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +store_long(struct X86EMU *emu, uint32_t segment, uint32_t offset, uint32_t val) +{ + (*emu->emu_wrl) (emu, ((uint32_t) segment << 4) + offset, val); +} +/**************************************************************************** +PARAMETERS: +reg - Register to decode + +RETURNS: +Pointer to the appropriate register + +REMARKS: +Return a pointer to the register given by the R/RM field of the +modrm byte, for byte operands. Also enables the decoding of instructions. +****************************************************************************/ +static uint8_t * +decode_rm_byte_register(struct X86EMU *emu, int reg) +{ + switch (reg) { + case 0: + return &emu->x86.R_AL; + case 1: + return &emu->x86.R_CL; + case 2: + return &emu->x86.R_DL; + case 3: + return &emu->x86.R_BL; + case 4: + return &emu->x86.R_AH; + case 5: + return &emu->x86.R_CH; + case 6: + return &emu->x86.R_DH; + case 7: + return &emu->x86.R_BH; + default: + X86EMU_halt_sys(emu); + } +} + +static uint8_t * +decode_rl_byte_register(struct X86EMU *emu) +{ + return decode_rm_byte_register(emu, emu->cur_rl); +} + +static uint8_t * +decode_rh_byte_register(struct X86EMU *emu) +{ + return decode_rm_byte_register(emu, emu->cur_rh); +} +/**************************************************************************** +PARAMETERS: +reg - Register to decode + +RETURNS: +Pointer to the appropriate register + +REMARKS: +Return a pointer to the register given by the R/RM field of the +modrm byte, for word operands. Also enables the decoding of instructions. +****************************************************************************/ +static uint16_t * +decode_rm_word_register(struct X86EMU *emu, int reg) +{ + switch (reg) { + case 0: + return &emu->x86.R_AX; + case 1: + return &emu->x86.R_CX; + case 2: + return &emu->x86.R_DX; + case 3: + return &emu->x86.R_BX; + case 4: + return &emu->x86.R_SP; + case 5: + return &emu->x86.R_BP; + case 6: + return &emu->x86.R_SI; + case 7: + return &emu->x86.R_DI; + default: + X86EMU_halt_sys(emu); + } +} + +static uint16_t * +decode_rl_word_register(struct X86EMU *emu) +{ + return decode_rm_word_register(emu, emu->cur_rl); +} + +static uint16_t * +decode_rh_word_register(struct X86EMU *emu) +{ + return decode_rm_word_register(emu, emu->cur_rh); +} +/**************************************************************************** +PARAMETERS: +reg - Register to decode + +RETURNS: +Pointer to the appropriate register + +REMARKS: +Return a pointer to the register given by the R/RM field of the +modrm byte, for dword operands. Also enables the decoding of instructions. +****************************************************************************/ +static uint32_t * +decode_rm_long_register(struct X86EMU *emu, int reg) +{ + switch (reg) { + case 0: + return &emu->x86.R_EAX; + case 1: + return &emu->x86.R_ECX; + case 2: + return &emu->x86.R_EDX; + case 3: + return &emu->x86.R_EBX; + case 4: + return &emu->x86.R_ESP; + case 5: + return &emu->x86.R_EBP; + case 6: + return &emu->x86.R_ESI; + case 7: + return &emu->x86.R_EDI; + default: + X86EMU_halt_sys(emu); + } +} + +static uint32_t * +decode_rl_long_register(struct X86EMU *emu) +{ + return decode_rm_long_register(emu, emu->cur_rl); +} + +static uint32_t * +decode_rh_long_register(struct X86EMU *emu) +{ + return decode_rm_long_register(emu, emu->cur_rh); +} + +/**************************************************************************** +PARAMETERS: +reg - Register to decode + +RETURNS: +Pointer to the appropriate register + +REMARKS: +Return a pointer to the register given by the R/RM field of the +modrm byte, for word operands, modified from above for the weirdo +special case of segreg operands. Also enables the decoding of instructions. +****************************************************************************/ +static uint16_t * +decode_rh_seg_register(struct X86EMU *emu) +{ + switch (emu->cur_rh) { + case 0: + return &emu->x86.R_ES; + case 1: + return &emu->x86.R_CS; + case 2: + return &emu->x86.R_SS; + case 3: + return &emu->x86.R_DS; + case 4: + return &emu->x86.R_FS; + case 5: + return &emu->x86.R_GS; + default: + X86EMU_halt_sys(emu); + } +} +/* + * + * return offset from the SIB Byte + */ +static uint32_t +decode_sib_address(struct X86EMU *emu, int sib, int mod) +{ + uint32_t base = 0, i = 0, scale = 1; + + switch (sib & 0x07) { + case 0: + base = emu->x86.R_EAX; + break; + case 1: + base = emu->x86.R_ECX; + break; + case 2: + base = emu->x86.R_EDX; + break; + case 3: + base = emu->x86.R_EBX; + break; + case 4: + base = emu->x86.R_ESP; + emu->x86.mode |= SYSMODE_SEG_DS_SS; + break; + case 5: + if (mod == 0) { + base = fetch_long_imm(emu); + } else { + base = emu->x86.R_EBP; + emu->x86.mode |= SYSMODE_SEG_DS_SS; + } + break; + case 6: + base = emu->x86.R_ESI; + break; + case 7: + base = emu->x86.R_EDI; + break; + } + switch ((sib >> 3) & 0x07) { + case 0: + i = emu->x86.R_EAX; + break; + case 1: + i = emu->x86.R_ECX; + break; + case 2: + i = emu->x86.R_EDX; + break; + case 3: + i = emu->x86.R_EBX; + break; + case 4: + i = 0; + break; + case 5: + i = emu->x86.R_EBP; + break; + case 6: + i = emu->x86.R_ESI; + break; + case 7: + i = emu->x86.R_EDI; + break; + } + scale = 1 << ((sib >> 6) & 0x03); + return base + (i * scale); +} +/**************************************************************************** +PARAMETERS: +rm - RM value to decode + +RETURNS: +Offset in memory for the address decoding + +REMARKS: +Return the offset given by mod=00, mod=01 or mod=10 addressing. +Also enables the decoding of instructions. +****************************************************************************/ +static uint32_t +decode_rl_address(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_ADDR) { + uint32_t offset, sib; + /* 32-bit addressing */ + switch (emu->cur_rl) { + case 0: + offset = emu->x86.R_EAX; + break; + case 1: + offset = emu->x86.R_ECX; + break; + case 2: + offset = emu->x86.R_EDX; + break; + case 3: + offset = emu->x86.R_EBX; + break; + case 4: + sib = fetch_byte_imm(emu); + offset = decode_sib_address(emu, sib, 0); + break; + case 5: + if (emu->cur_mod == 0) { + offset = fetch_long_imm(emu); + } else { + emu->x86.mode |= SYSMODE_SEG_DS_SS; + offset = emu->x86.R_EBP; + } + break; + case 6: + offset = emu->x86.R_ESI; + break; + case 7: + offset = emu->x86.R_EDI; + break; + default: + X86EMU_halt_sys(emu); + } + if (emu->cur_mod == 1) + offset += (int8_t)fetch_byte_imm(emu); + else if (emu->cur_mod == 2) + offset += fetch_long_imm(emu); + return offset; + } else { + uint16_t offset; + + /* 16-bit addressing */ + switch (emu->cur_rl) { + case 0: + offset = emu->x86.R_BX + emu->x86.R_SI; + break; + case 1: + offset = emu->x86.R_BX + emu->x86.R_DI; + break; + case 2: + emu->x86.mode |= SYSMODE_SEG_DS_SS; + offset = emu->x86.R_BP + emu->x86.R_SI; + break; + case 3: + emu->x86.mode |= SYSMODE_SEG_DS_SS; + offset = emu->x86.R_BP + emu->x86.R_DI; + break; + case 4: + offset = emu->x86.R_SI; + break; + case 5: + offset = emu->x86.R_DI; + break; + case 6: + if (emu->cur_mod == 0) { + offset = fetch_word_imm(emu); + } else { + emu->x86.mode |= SYSMODE_SEG_DS_SS; + offset = emu->x86.R_BP; + } + break; + case 7: + offset = emu->x86.R_BX; + break; + default: + X86EMU_halt_sys(emu); + } + if (emu->cur_mod == 1) + offset += (int8_t)fetch_byte_imm(emu); + else if (emu->cur_mod == 2) + offset += fetch_word_imm(emu); + return offset; + } +} + +static uint8_t +decode_and_fetch_byte(struct X86EMU *emu) +{ + if (emu->cur_mod != 3) { + emu->cur_offset = decode_rl_address(emu); + return fetch_data_byte(emu, emu->cur_offset); + } else { + return *decode_rl_byte_register(emu); + } +} + +static uint16_t +decode_and_fetch_word_disp(struct X86EMU *emu, int16_t disp) +{ + if (emu->cur_mod != 3) { + /* TODO: A20 gate emulation */ + emu->cur_offset = decode_rl_address(emu) + disp; + if ((emu->x86.mode & SYSMODE_PREFIX_ADDR) == 0) + emu->cur_offset &= 0xffff; + return fetch_data_word(emu, emu->cur_offset); + } else { + return *decode_rl_word_register(emu); + } +} + +static uint32_t +decode_and_fetch_long_disp(struct X86EMU *emu, int16_t disp) +{ + if (emu->cur_mod != 3) { + /* TODO: A20 gate emulation */ + emu->cur_offset = decode_rl_address(emu) + disp; + if ((emu->x86.mode & SYSMODE_PREFIX_ADDR) == 0) + emu->cur_offset &= 0xffff; + return fetch_data_long(emu, emu->cur_offset); + } else { + return *decode_rl_long_register(emu); + } +} + +uint16_t +decode_and_fetch_word(struct X86EMU *emu) +{ + return decode_and_fetch_word_disp(emu, 0); +} + +uint32_t +decode_and_fetch_long(struct X86EMU *emu) +{ + return decode_and_fetch_long_disp(emu, 0); +} + +uint8_t +decode_and_fetch_byte_imm8(struct X86EMU *emu, uint8_t *imm) +{ + if (emu->cur_mod != 3) { + emu->cur_offset = decode_rl_address(emu); + *imm = fetch_byte_imm(emu); + return fetch_data_byte(emu, emu->cur_offset); + } else { + *imm = fetch_byte_imm(emu); + return *decode_rl_byte_register(emu); + } +} + +static uint16_t +decode_and_fetch_word_imm8(struct X86EMU *emu, uint8_t *imm) +{ + if (emu->cur_mod != 3) { + emu->cur_offset = decode_rl_address(emu); + *imm = fetch_byte_imm(emu); + return fetch_data_word(emu, emu->cur_offset); + } else { + *imm = fetch_byte_imm(emu); + return *decode_rl_word_register(emu); + } +} + +static uint32_t +decode_and_fetch_long_imm8(struct X86EMU *emu, uint8_t *imm) +{ + if (emu->cur_mod != 3) { + emu->cur_offset = decode_rl_address(emu); + *imm = fetch_byte_imm(emu); + return fetch_data_long(emu, emu->cur_offset); + } else { + *imm = fetch_byte_imm(emu); + return *decode_rl_long_register(emu); + } +} + +static void +write_back_byte(struct X86EMU *emu, uint8_t val) +{ + if (emu->cur_mod != 3) + store_data_byte(emu, emu->cur_offset, val); + else + *decode_rl_byte_register(emu) = val; +} + +static void +write_back_word(struct X86EMU *emu, uint16_t val) +{ + if (emu->cur_mod != 3) + store_data_word(emu, emu->cur_offset, val); + else + *decode_rl_word_register(emu) = val; +} + +static void +write_back_long(struct X86EMU *emu, uint32_t val) +{ + if (emu->cur_mod != 3) + store_data_long(emu, emu->cur_offset, val); + else + *decode_rl_long_register(emu) = val; +} + +static void +common_inc_word_long(struct X86EMU *emu, union X86EMU_register *reg) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + reg->I32_reg.e_reg = inc_long(emu, reg->I32_reg.e_reg); + else + reg->I16_reg.x_reg = inc_word(emu, reg->I16_reg.x_reg); +} + +static void +common_dec_word_long(struct X86EMU *emu, union X86EMU_register *reg) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + reg->I32_reg.e_reg = dec_long(emu, reg->I32_reg.e_reg); + else + reg->I16_reg.x_reg = dec_word(emu, reg->I16_reg.x_reg); +} + +static void +common_binop_byte_rm_r(struct X86EMU *emu, uint8_t (*binop)(struct X86EMU *, uint8_t, uint8_t)) +{ + uint32_t destoffset; + uint8_t *destreg, srcval; + uint8_t destval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_byte_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_byte(emu, destoffset); + destval = (*binop)(emu, destval, srcval); + store_data_byte(emu, destoffset, destval); + } else { + destreg = decode_rl_byte_register(emu); + *destreg = (*binop)(emu, *destreg, srcval); + } +} + +static void +common_binop_ns_byte_rm_r(struct X86EMU *emu, void (*binop)(struct X86EMU *, uint8_t, uint8_t)) +{ + uint32_t destoffset; + uint8_t destval, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_byte_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_byte(emu, destoffset); + } else { + destval = *decode_rl_byte_register(emu); + } + (*binop)(emu, destval, srcval); +} + +static void +common_binop_word_rm_r(struct X86EMU *emu, uint16_t (*binop)(struct X86EMU *, uint16_t, uint16_t)) +{ + uint32_t destoffset; + uint16_t destval, *destreg, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_word_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_word(emu, destoffset); + destval = (*binop)(emu, destval, srcval); + store_data_word(emu, destoffset, destval); + } else { + destreg = decode_rl_word_register(emu); + *destreg = (*binop)(emu, *destreg, srcval); + } +} + +static void +common_binop_byte_r_rm(struct X86EMU *emu, uint8_t (*binop)(struct X86EMU *, uint8_t, uint8_t)) +{ + uint8_t *destreg, srcval; + uint32_t srcoffset; + + fetch_decode_modrm(emu); + destreg = decode_rh_byte_register(emu); + if (emu->cur_mod != 3) { + srcoffset = decode_rl_address(emu); + srcval = fetch_data_byte(emu, srcoffset); + } else { + srcval = *decode_rl_byte_register(emu); + } + *destreg = (*binop)(emu, *destreg, srcval); +} + +static void +common_binop_long_rm_r(struct X86EMU *emu, uint32_t (*binop)(struct X86EMU *, uint32_t, uint32_t)) +{ + uint32_t destoffset; + uint32_t destval, *destreg, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_long_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_long(emu, destoffset); + destval = (*binop)(emu, destval, srcval); + store_data_long(emu, destoffset, destval); + } else { + destreg = decode_rl_long_register(emu); + *destreg = (*binop)(emu, *destreg, srcval); + } +} + +static void +common_binop_word_long_rm_r(struct X86EMU *emu, + uint16_t (*binop16)(struct X86EMU *, uint16_t, uint16_t), uint32_t (*binop32)(struct X86EMU *, uint32_t, uint32_t)) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_binop_long_rm_r(emu, binop32); + else + common_binop_word_rm_r(emu, binop16); +} + +static void +common_binop_ns_word_rm_r(struct X86EMU *emu, void (*binop)(struct X86EMU *, uint16_t, uint16_t)) +{ + uint32_t destoffset; + uint16_t destval, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_word_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_word(emu, destoffset); + } else { + destval = *decode_rl_word_register(emu); + } + (*binop)(emu, destval, srcval); +} + + +static void +common_binop_ns_long_rm_r(struct X86EMU *emu, void (*binop)(struct X86EMU *, uint32_t, uint32_t)) +{ + uint32_t destoffset; + uint32_t destval, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_long_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_long(emu, destoffset); + } else { + destval = *decode_rl_long_register(emu); + } + (*binop)(emu, destval, srcval); +} + +static void +common_binop_ns_word_long_rm_r(struct X86EMU *emu, + void (*binop16)(struct X86EMU *, uint16_t, uint16_t), void (*binop32)(struct X86EMU *, uint32_t, uint32_t)) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_binop_ns_long_rm_r(emu, binop32); + else + common_binop_ns_word_rm_r(emu, binop16); +} + +static void +common_binop_long_r_rm(struct X86EMU *emu, uint32_t (*binop)(struct X86EMU *, uint32_t, uint32_t)) +{ + uint32_t srcoffset; + uint32_t *destreg, srcval; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + if (emu->cur_mod != 3) { + srcoffset = decode_rl_address(emu); + srcval = fetch_data_long(emu, srcoffset); + } else { + srcval = *decode_rl_long_register(emu); + } + *destreg = (*binop)(emu, *destreg, srcval); +} + +static void +common_binop_word_r_rm(struct X86EMU *emu, uint16_t (*binop)(struct X86EMU *, uint16_t, uint16_t)) +{ + uint32_t srcoffset; + uint16_t *destreg, srcval; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + if (emu->cur_mod != 3) { + srcoffset = decode_rl_address(emu); + srcval = fetch_data_word(emu, srcoffset); + } else { + srcval = *decode_rl_word_register(emu); + } + *destreg = (*binop)(emu, *destreg, srcval); +} + +static void +common_binop_word_long_r_rm(struct X86EMU *emu, + uint16_t (*binop16)(struct X86EMU *, uint16_t, uint16_t), uint32_t (*binop32)(struct X86EMU *, uint32_t, uint32_t)) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_binop_long_r_rm(emu, binop32); + else + common_binop_word_r_rm(emu, binop16); +} + +static void +common_binop_byte_imm(struct X86EMU *emu, uint8_t (*binop)(struct X86EMU *, uint8_t, uint8_t)) +{ + uint8_t srcval; + + srcval = fetch_byte_imm(emu); + emu->x86.R_AL = (*binop)(emu, emu->x86.R_AL, srcval); +} + +static void +common_binop_word_long_imm(struct X86EMU *emu, + uint16_t (*binop16)(struct X86EMU *, uint16_t, uint16_t), uint32_t (*binop32)(struct X86EMU *, uint32_t, uint32_t)) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t srcval; + + srcval = fetch_long_imm(emu); + emu->x86.R_EAX = (*binop32)(emu, emu->x86.R_EAX, srcval); + } else { + uint16_t srcval; + + srcval = fetch_word_imm(emu); + emu->x86.R_AX = (*binop16)(emu, emu->x86.R_AX, srcval); + } +} + +static void +common_push_word_long(struct X86EMU *emu, union X86EMU_register *reg) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + push_long(emu, reg->I32_reg.e_reg); + else + push_word(emu, reg->I16_reg.x_reg); +} + +static void +common_pop_word_long(struct X86EMU *emu, union X86EMU_register *reg) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + reg->I32_reg.e_reg = pop_long(emu); + else + reg->I16_reg.x_reg = pop_word(emu); +} + +static void +common_imul_long_IMM(struct X86EMU *emu, bool byte_imm) +{ + uint32_t srcoffset; + uint32_t *destreg, srcval; + int32_t imm; + uint64_t res; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + if (emu->cur_mod != 3) { + srcoffset = decode_rl_address(emu); + srcval = fetch_data_long(emu, srcoffset); + } else { + srcval = *decode_rl_long_register(emu); + } + + if (byte_imm) + imm = (int8_t)fetch_byte_imm(emu); + else + imm = fetch_long_imm(emu); + res = (int32_t)srcval * imm; + + if (res > 0xffffffff) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (uint32_t)res; +} + +static void +common_imul_word_IMM(struct X86EMU *emu, bool byte_imm) +{ + uint32_t srcoffset; + uint16_t *destreg, srcval; + int16_t imm; + uint32_t res; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + if (emu->cur_mod != 3) { + srcoffset = decode_rl_address(emu); + srcval = fetch_data_word(emu, srcoffset); + } else { + srcval = *decode_rl_word_register(emu); + } + + if (byte_imm) + imm = (int8_t)fetch_byte_imm(emu); + else + imm = fetch_word_imm(emu); + res = (int16_t)srcval * imm; + + if (res > 0xffff) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (uint16_t) res; +} + +static void +common_imul_imm(struct X86EMU *emu, bool byte_imm) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_imul_long_IMM(emu, byte_imm); + else + common_imul_word_IMM(emu, byte_imm); +} + +static void +common_jmp_near(struct X86EMU *emu, bool cond) +{ + int8_t offset; + uint16_t target; + + offset = (int8_t) fetch_byte_imm(emu); + target = (uint16_t) (emu->x86.R_IP + (int16_t) offset); + if (cond) + emu->x86.R_IP = target; +} + +static void +common_load_far_pointer(struct X86EMU *emu, uint16_t *seg) +{ + uint16_t *dstreg; + uint32_t srcoffset; + + fetch_decode_modrm(emu); + if (emu->cur_mod == 3) + X86EMU_halt_sys(emu); + + dstreg = decode_rh_word_register(emu); + srcoffset = decode_rl_address(emu); + *dstreg = fetch_data_word(emu, srcoffset); + *seg = fetch_data_word(emu, srcoffset + 2); +} + +/*----------------------------- Implementation ----------------------------*/ +/**************************************************************************** +REMARKS: +Handles opcode 0x3a +****************************************************************************/ +static void +x86emuOp_cmp_byte_R_RM(struct X86EMU *emu) +{ + uint8_t *destreg, srcval; + + fetch_decode_modrm(emu); + destreg = decode_rh_byte_register(emu); + srcval = decode_and_fetch_byte(emu); + cmp_byte(emu, *destreg, srcval); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x3b +****************************************************************************/ +static void +x86emuOp32_cmp_word_R_RM(struct X86EMU *emu) +{ + uint32_t srcval, *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + srcval = decode_and_fetch_long(emu); + cmp_long(emu, *destreg, srcval); +} + +static void +x86emuOp16_cmp_word_R_RM(struct X86EMU *emu) +{ + uint16_t srcval, *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + srcval = decode_and_fetch_word(emu); + cmp_word(emu, *destreg, srcval); +} + +static void +x86emuOp_cmp_word_R_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_cmp_word_R_RM(emu); + else + x86emuOp16_cmp_word_R_RM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x3c +****************************************************************************/ +static void +x86emuOp_cmp_byte_AL_IMM(struct X86EMU *emu) +{ + uint8_t srcval; + + srcval = fetch_byte_imm(emu); + cmp_byte(emu, emu->x86.R_AL, srcval); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x3d +****************************************************************************/ +static void +x86emuOp32_cmp_word_AX_IMM(struct X86EMU *emu) +{ + uint32_t srcval; + + srcval = fetch_long_imm(emu); + cmp_long(emu, emu->x86.R_EAX, srcval); +} + +static void +x86emuOp16_cmp_word_AX_IMM(struct X86EMU *emu) +{ + uint16_t srcval; + + srcval = fetch_word_imm(emu); + cmp_word(emu, emu->x86.R_AX, srcval); +} + +static void +x86emuOp_cmp_word_AX_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_cmp_word_AX_IMM(emu); + else + x86emuOp16_cmp_word_AX_IMM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x60 +****************************************************************************/ +static void +x86emuOp_push_all(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t old_sp = emu->x86.R_ESP; + + push_long(emu, emu->x86.R_EAX); + push_long(emu, emu->x86.R_ECX); + push_long(emu, emu->x86.R_EDX); + push_long(emu, emu->x86.R_EBX); + push_long(emu, old_sp); + push_long(emu, emu->x86.R_EBP); + push_long(emu, emu->x86.R_ESI); + push_long(emu, emu->x86.R_EDI); + } else { + uint16_t old_sp = emu->x86.R_SP; + + push_word(emu, emu->x86.R_AX); + push_word(emu, emu->x86.R_CX); + push_word(emu, emu->x86.R_DX); + push_word(emu, emu->x86.R_BX); + push_word(emu, old_sp); + push_word(emu, emu->x86.R_BP); + push_word(emu, emu->x86.R_SI); + push_word(emu, emu->x86.R_DI); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x61 +****************************************************************************/ +static void +x86emuOp_pop_all(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_EDI = pop_long(emu); + emu->x86.R_ESI = pop_long(emu); + emu->x86.R_EBP = pop_long(emu); + emu->x86.R_ESP += 4; /* skip ESP */ + emu->x86.R_EBX = pop_long(emu); + emu->x86.R_EDX = pop_long(emu); + emu->x86.R_ECX = pop_long(emu); + emu->x86.R_EAX = pop_long(emu); + } else { + emu->x86.R_DI = pop_word(emu); + emu->x86.R_SI = pop_word(emu); + emu->x86.R_BP = pop_word(emu); + emu->x86.R_SP += 2;/* skip SP */ + emu->x86.R_BX = pop_word(emu); + emu->x86.R_DX = pop_word(emu); + emu->x86.R_CX = pop_word(emu); + emu->x86.R_AX = pop_word(emu); + } +} +/*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */ +/*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */ + +/**************************************************************************** +REMARKS: +Handles opcode 0x68 +****************************************************************************/ +static void +x86emuOp_push_word_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t imm; + + imm = fetch_long_imm(emu); + push_long(emu, imm); + } else { + uint16_t imm; + + imm = fetch_word_imm(emu); + push_word(emu, imm); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x6a +****************************************************************************/ +static void +x86emuOp_push_byte_IMM(struct X86EMU *emu) +{ + int16_t imm; + + imm = (int8_t) fetch_byte_imm(emu); + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + push_long(emu, (int32_t) imm); + } else { + push_word(emu, imm); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x6c +****************************************************************************/ +/**************************************************************************** +REMARKS: +Handles opcode 0x6d +****************************************************************************/ +static void +x86emuOp_ins_word(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + ins(emu, 4); + } else { + ins(emu, 2); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x6f +****************************************************************************/ +static void +x86emuOp_outs_word(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + outs(emu, 4); + } else { + outs(emu, 2); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x7c +****************************************************************************/ +static void +x86emuOp_jump_near_L(struct X86EMU *emu) +{ + bool sf, of; + + sf = ACCESS_FLAG(F_SF) != 0; + of = ACCESS_FLAG(F_OF) != 0; + + common_jmp_near(emu, sf != of); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x7d +****************************************************************************/ +static void +x86emuOp_jump_near_NL(struct X86EMU *emu) +{ + bool sf, of; + + sf = ACCESS_FLAG(F_SF) != 0; + of = ACCESS_FLAG(F_OF) != 0; + + common_jmp_near(emu, sf == of); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x7e +****************************************************************************/ +static void +x86emuOp_jump_near_LE(struct X86EMU *emu) +{ + bool sf, of; + + sf = ACCESS_FLAG(F_SF) != 0; + of = ACCESS_FLAG(F_OF) != 0; + + common_jmp_near(emu, sf != of || ACCESS_FLAG(F_ZF)); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x7f +****************************************************************************/ +static void +x86emuOp_jump_near_NLE(struct X86EMU *emu) +{ + bool sf, of; + + sf = ACCESS_FLAG(F_SF) != 0; + of = ACCESS_FLAG(F_OF) != 0; + + common_jmp_near(emu, sf == of && !ACCESS_FLAG(F_ZF)); +} + +static +uint8_t(*const opc80_byte_operation[]) (struct X86EMU *, uint8_t d, uint8_t s) = +{ + add_byte, /* 00 */ + or_byte, /* 01 */ + adc_byte, /* 02 */ + sbb_byte, /* 03 */ + and_byte, /* 04 */ + sub_byte, /* 05 */ + xor_byte, /* 06 */ + cmp_byte, /* 07 */ +}; +/**************************************************************************** +REMARKS: +Handles opcode 0x80 +****************************************************************************/ +static void +x86emuOp_opc80_byte_RM_IMM(struct X86EMU *emu) +{ + uint8_t imm, destval; + + /* + * Weirdo special case instruction format. Part of the opcode + * held below in "RH". Doubly nested case would result, except + * that the decoded instruction + */ + fetch_decode_modrm(emu); + destval = decode_and_fetch_byte(emu); + imm = fetch_byte_imm(emu); + destval = (*opc80_byte_operation[emu->cur_rh]) (emu, destval, imm); + if (emu->cur_rh != 7) + write_back_byte(emu, destval); +} + +static +uint16_t(* const opc81_word_operation[]) (struct X86EMU *, uint16_t d, uint16_t s) = +{ + add_word, /* 00 */ + or_word, /* 01 */ + adc_word, /* 02 */ + sbb_word, /* 03 */ + and_word, /* 04 */ + sub_word, /* 05 */ + xor_word, /* 06 */ + cmp_word, /* 07 */ +}; + +static +uint32_t(* const opc81_long_operation[]) (struct X86EMU *, uint32_t d, uint32_t s) = +{ + add_long, /* 00 */ + or_long, /* 01 */ + adc_long, /* 02 */ + sbb_long, /* 03 */ + and_long, /* 04 */ + sub_long, /* 05 */ + xor_long, /* 06 */ + cmp_long, /* 07 */ +}; +/**************************************************************************** +REMARKS: +Handles opcode 0x81 +****************************************************************************/ +static void +x86emuOp32_opc81_word_RM_IMM(struct X86EMU *emu) +{ + uint32_t destval, imm; + + /* + * Weirdo special case instruction format. Part of the opcode + * held below in "RH". Doubly nested case would result, except + * that the decoded instruction + */ + fetch_decode_modrm(emu); + destval = decode_and_fetch_long(emu); + imm = fetch_long_imm(emu); + destval = (*opc81_long_operation[emu->cur_rh]) (emu, destval, imm); + if (emu->cur_rh != 7) + write_back_long(emu, destval); +} + +static void +x86emuOp16_opc81_word_RM_IMM(struct X86EMU *emu) +{ + uint16_t destval, imm; + + /* + * Weirdo special case instruction format. Part of the opcode + * held below in "RH". Doubly nested case would result, except + * that the decoded instruction + */ + fetch_decode_modrm(emu); + destval = decode_and_fetch_word(emu); + imm = fetch_word_imm(emu); + destval = (*opc81_word_operation[emu->cur_rh]) (emu, destval, imm); + if (emu->cur_rh != 7) + write_back_word(emu, destval); +} + +static void +x86emuOp_opc81_word_RM_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_opc81_word_RM_IMM(emu); + else + x86emuOp16_opc81_word_RM_IMM(emu); +} + +static +uint8_t(* const opc82_byte_operation[]) (struct X86EMU *, uint8_t s, uint8_t d) = +{ + add_byte, /* 00 */ + or_byte, /* 01 *//* YYY UNUSED ???? */ + adc_byte, /* 02 */ + sbb_byte, /* 03 */ + and_byte, /* 04 *//* YYY UNUSED ???? */ + sub_byte, /* 05 */ + xor_byte, /* 06 *//* YYY UNUSED ???? */ + cmp_byte, /* 07 */ +}; +/**************************************************************************** +REMARKS: +Handles opcode 0x82 +****************************************************************************/ +static void +x86emuOp_opc82_byte_RM_IMM(struct X86EMU *emu) +{ + uint8_t imm, destval; + + /* + * Weirdo special case instruction format. Part of the opcode + * held below in "RH". Doubly nested case would result, except + * that the decoded instruction Similar to opcode 81, except that + * the immediate byte is sign extended to a word length. + */ + fetch_decode_modrm(emu); + destval = decode_and_fetch_byte(emu); + imm = fetch_byte_imm(emu); + destval = (*opc82_byte_operation[emu->cur_rh]) (emu, destval, imm); + if (emu->cur_rh != 7) + write_back_byte(emu, destval); +} + +static +uint16_t(* const opc83_word_operation[]) (struct X86EMU *, uint16_t s, uint16_t d) = +{ + add_word, /* 00 */ + or_word, /* 01 *//* YYY UNUSED ???? */ + adc_word, /* 02 */ + sbb_word, /* 03 */ + and_word, /* 04 *//* YYY UNUSED ???? */ + sub_word, /* 05 */ + xor_word, /* 06 *//* YYY UNUSED ???? */ + cmp_word, /* 07 */ +}; + +static +uint32_t(* const opc83_long_operation[]) (struct X86EMU *, uint32_t s, uint32_t d) = +{ + add_long, /* 00 */ + or_long, /* 01 *//* YYY UNUSED ???? */ + adc_long, /* 02 */ + sbb_long, /* 03 */ + and_long, /* 04 *//* YYY UNUSED ???? */ + sub_long, /* 05 */ + xor_long, /* 06 *//* YYY UNUSED ???? */ + cmp_long, /* 07 */ +}; +/**************************************************************************** +REMARKS: +Handles opcode 0x83 +****************************************************************************/ +static void +x86emuOp32_opc83_word_RM_IMM(struct X86EMU *emu) +{ + uint32_t destval, imm; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_long(emu); + imm = (int8_t) fetch_byte_imm(emu); + destval = (*opc83_long_operation[emu->cur_rh]) (emu, destval, imm); + if (emu->cur_rh != 7) + write_back_long(emu, destval); +} + +static void +x86emuOp16_opc83_word_RM_IMM(struct X86EMU *emu) +{ + uint16_t destval, imm; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_word(emu); + imm = (int8_t) fetch_byte_imm(emu); + destval = (*opc83_word_operation[emu->cur_rh]) (emu, destval, imm); + if (emu->cur_rh != 7) + write_back_word(emu, destval); +} + +static void +x86emuOp_opc83_word_RM_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_opc83_word_RM_IMM(emu); + else + x86emuOp16_opc83_word_RM_IMM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x86 +****************************************************************************/ +static void +x86emuOp_xchg_byte_RM_R(struct X86EMU *emu) +{ + uint8_t *srcreg, destval, tmp; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_byte(emu); + srcreg = decode_rh_byte_register(emu); + tmp = destval; + destval = *srcreg; + *srcreg = tmp; + write_back_byte(emu, destval); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x87 +****************************************************************************/ +static void +x86emuOp32_xchg_word_RM_R(struct X86EMU *emu) +{ + uint32_t *srcreg, destval, tmp; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_long(emu); + srcreg = decode_rh_long_register(emu); + tmp = destval; + destval = *srcreg; + *srcreg = tmp; + write_back_long(emu, destval); +} + +static void +x86emuOp16_xchg_word_RM_R(struct X86EMU *emu) +{ + uint16_t *srcreg, destval, tmp; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_word(emu); + srcreg = decode_rh_word_register(emu); + tmp = destval; + destval = *srcreg; + *srcreg = tmp; + write_back_word(emu, destval); +} + +static void +x86emuOp_xchg_word_RM_R(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_xchg_word_RM_R(emu); + else + x86emuOp16_xchg_word_RM_R(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x88 +****************************************************************************/ +static void +x86emuOp_mov_byte_RM_R(struct X86EMU *emu) +{ + uint8_t *destreg, *srcreg; + uint32_t destoffset; + + fetch_decode_modrm(emu); + srcreg = decode_rh_byte_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + store_data_byte(emu, destoffset, *srcreg); + } else { + destreg = decode_rl_byte_register(emu); + *destreg = *srcreg; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x89 +****************************************************************************/ +static void +x86emuOp32_mov_word_RM_R(struct X86EMU *emu) +{ + uint32_t destoffset; + uint32_t *destreg, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_long_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + store_data_long(emu, destoffset, srcval); + } else { + destreg = decode_rl_long_register(emu); + *destreg = srcval; + } +} + +static void +x86emuOp16_mov_word_RM_R(struct X86EMU *emu) +{ + uint32_t destoffset; + uint16_t *destreg, srcval; + + fetch_decode_modrm(emu); + srcval = *decode_rh_word_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + store_data_word(emu, destoffset, srcval); + } else { + destreg = decode_rl_word_register(emu); + *destreg = srcval; + } +} + +static void +x86emuOp_mov_word_RM_R(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_mov_word_RM_R(emu); + else + x86emuOp16_mov_word_RM_R(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x8a +****************************************************************************/ +static void +x86emuOp_mov_byte_R_RM(struct X86EMU *emu) +{ + uint8_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_byte_register(emu); + *destreg = decode_and_fetch_byte(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x8b +****************************************************************************/ +static void +x86emuOp_mov_word_R_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + *destreg = decode_and_fetch_long(emu); + } else { + uint16_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + *destreg = decode_and_fetch_word(emu); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x8c +****************************************************************************/ +static void +x86emuOp_mov_word_RM_SR(struct X86EMU *emu) +{ + uint16_t *destreg, srcval; + uint32_t destoffset; + + fetch_decode_modrm(emu); + srcval = *decode_rh_seg_register(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + store_data_word(emu, destoffset, srcval); + } else { + destreg = decode_rl_word_register(emu); + *destreg = srcval; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x8d +****************************************************************************/ +static void +x86emuOp_lea_word_R_M(struct X86EMU *emu) +{ + uint32_t destoffset; + + fetch_decode_modrm(emu); + if (emu->cur_mod == 3) + X86EMU_halt_sys(emu); + + destoffset = decode_rl_address(emu); + if (emu->x86.mode & SYSMODE_PREFIX_ADDR) { + uint32_t *srcreg; + + srcreg = decode_rh_long_register(emu); + *srcreg = (uint32_t) destoffset; + } else { + uint16_t *srcreg; + + srcreg = decode_rh_word_register(emu); + *srcreg = (uint16_t) destoffset; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x8e +****************************************************************************/ +static void +x86emuOp_mov_word_SR_RM(struct X86EMU *emu) +{ + uint16_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_seg_register(emu); + *destreg = decode_and_fetch_word(emu); + /* + * Clean up, and reset all the R_xSP pointers to the correct + * locations. This is about 3x too much overhead (doing all the + * segreg ptrs when only one is needed, but this instruction + * *cannot* be that common, and this isn't too much work anyway. + */ +} +/**************************************************************************** +REMARKS: +Handles opcode 0x8f +****************************************************************************/ +static void +x86emuOp32_pop_RM(struct X86EMU *emu) +{ + uint32_t destoffset; + uint32_t destval, *destreg; + + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = pop_long(emu); + store_data_long(emu, destoffset, destval); + } else { + destreg = decode_rl_long_register(emu); + *destreg = pop_long(emu); + } +} + +static void +x86emuOp16_pop_RM(struct X86EMU *emu) +{ + uint32_t destoffset; + uint16_t destval, *destreg; + + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = pop_word(emu); + store_data_word(emu, destoffset, destval); + } else { + destreg = decode_rl_word_register(emu); + *destreg = pop_word(emu); + } +} + +static void +x86emuOp_pop_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_pop_RM(emu); + else + x86emuOp16_pop_RM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x91 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_CX(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_ECX; + emu->x86.R_ECX = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_CX; + emu->x86.R_CX = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x92 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_DX(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_EDX; + emu->x86.R_EDX = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_DX; + emu->x86.R_DX = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x93 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_BX(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_EBX; + emu->x86.R_EBX = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_BX; + emu->x86.R_BX = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x94 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_SP(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_ESP; + emu->x86.R_ESP = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_SP; + emu->x86.R_SP = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x95 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_BP(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_EBP; + emu->x86.R_EBP = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_BP; + emu->x86.R_BP = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x96 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_SI(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_ESI; + emu->x86.R_ESI = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_SI; + emu->x86.R_SI = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x97 +****************************************************************************/ +static void +x86emuOp_xchg_word_AX_DI(struct X86EMU *emu) +{ + uint32_t tmp; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + tmp = emu->x86.R_EAX; + emu->x86.R_EAX = emu->x86.R_EDI; + emu->x86.R_EDI = tmp; + } else { + tmp = emu->x86.R_AX; + emu->x86.R_AX = emu->x86.R_DI; + emu->x86.R_DI = (uint16_t) tmp; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x98 +****************************************************************************/ +static void +x86emuOp_cbw(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + if (emu->x86.R_AX & 0x8000) { + emu->x86.R_EAX |= 0xffff0000; + } else { + emu->x86.R_EAX &= 0x0000ffff; + } + } else { + if (emu->x86.R_AL & 0x80) { + emu->x86.R_AH = 0xff; + } else { + emu->x86.R_AH = 0x0; + } + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x99 +****************************************************************************/ +static void +x86emuOp_cwd(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + if (emu->x86.R_EAX & 0x80000000) { + emu->x86.R_EDX = 0xffffffff; + } else { + emu->x86.R_EDX = 0x0; + } + } else { + if (emu->x86.R_AX & 0x8000) { + emu->x86.R_DX = 0xffff; + } else { + emu->x86.R_DX = 0x0; + } + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x9a +****************************************************************************/ +static void +x86emuOp_call_far_IMM(struct X86EMU *emu) +{ + uint16_t farseg, faroff; + + faroff = fetch_word_imm(emu); + farseg = fetch_word_imm(emu); + /* XXX + * + * Hooked interrupt vectors calling into our "BIOS" will cause problems + * unless all intersegment stuff is checked for BIOS access. Check + * needed here. For moment, let it alone. */ + push_word(emu, emu->x86.R_CS); + emu->x86.R_CS = farseg; + push_word(emu, emu->x86.R_IP); + emu->x86.R_IP = faroff; +} +/**************************************************************************** +REMARKS: +Handles opcode 0x9c +****************************************************************************/ +static void +x86emuOp_pushf_word(struct X86EMU *emu) +{ + uint32_t flags; + + /* clear out *all* bits not representing flags, and turn on real bits */ + flags = (emu->x86.R_EFLG & F_MSK) | F_ALWAYS_ON; + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + push_long(emu, flags); + } else { + push_word(emu, (uint16_t) flags); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x9d +****************************************************************************/ +static void +x86emuOp_popf_word(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_EFLG = pop_long(emu); + } else { + emu->x86.R_FLG = pop_word(emu); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x9e +****************************************************************************/ +static void +x86emuOp_sahf(struct X86EMU *emu) +{ + /* clear the lower bits of the flag register */ + emu->x86.R_FLG &= 0xffffff00; + /* or in the AH register into the flags register */ + emu->x86.R_FLG |= emu->x86.R_AH; +} +/**************************************************************************** +REMARKS: +Handles opcode 0x9f +****************************************************************************/ +static void +x86emuOp_lahf(struct X86EMU *emu) +{ + emu->x86.R_AH = (uint8_t) (emu->x86.R_FLG & 0xff); + /* undocumented TC++ behavior??? Nope. It's documented, but you have + * too look real hard to notice it. */ + emu->x86.R_AH |= 0x2; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa0 +****************************************************************************/ +static void +x86emuOp_mov_AL_M_IMM(struct X86EMU *emu) +{ + uint16_t offset; + + offset = fetch_word_imm(emu); + emu->x86.R_AL = fetch_data_byte(emu, offset); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa1 +****************************************************************************/ +static void +x86emuOp_mov_AX_M_IMM(struct X86EMU *emu) +{ + uint16_t offset; + + offset = fetch_word_imm(emu); + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_EAX = fetch_data_long(emu, offset); + } else { + emu->x86.R_AX = fetch_data_word(emu, offset); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa2 +****************************************************************************/ +static void +x86emuOp_mov_M_AL_IMM(struct X86EMU *emu) +{ + uint16_t offset; + + offset = fetch_word_imm(emu); + store_data_byte(emu, offset, emu->x86.R_AL); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa3 +****************************************************************************/ +static void +x86emuOp_mov_M_AX_IMM(struct X86EMU *emu) +{ + uint16_t offset; + + offset = fetch_word_imm(emu); + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + store_data_long(emu, offset, emu->x86.R_EAX); + } else { + store_data_word(emu, offset, emu->x86.R_AX); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa4 +****************************************************************************/ +static void +x86emuOp_movs_byte(struct X86EMU *emu) +{ + uint8_t val; + uint32_t count; + int inc; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -1; + else + inc = 1; + count = 1; + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = emu->x86.R_CX; + emu->x86.R_CX = 0; + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } + while (count--) { + val = fetch_data_byte(emu, emu->x86.R_SI); + store_byte(emu, emu->x86.R_ES, emu->x86.R_DI, val); + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa5 +****************************************************************************/ +static void +x86emuOp_movs_word(struct X86EMU *emu) +{ + uint32_t val; + int inc; + uint32_t count; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + inc = 4; + else + inc = 2; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -inc; + + count = 1; + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = emu->x86.R_CX; + emu->x86.R_CX = 0; + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } + while (count--) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_data_long(emu, emu->x86.R_SI); + store_long(emu, emu->x86.R_ES, emu->x86.R_DI, val); + } else { + val = fetch_data_word(emu, emu->x86.R_SI); + store_word(emu, emu->x86.R_ES, emu->x86.R_DI, (uint16_t) val); + } + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa6 +****************************************************************************/ +static void +x86emuOp_cmps_byte(struct X86EMU *emu) +{ + int8_t val1, val2; + int inc; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -1; + else + inc = 1; + + if (emu->x86.mode & SYSMODE_PREFIX_REPE) { + /* REPE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + val1 = fetch_data_byte(emu, emu->x86.R_SI); + val2 = fetch_byte(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_byte(emu, val1, val2); + emu->x86.R_CX -= 1; + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPE; + } else if (emu->x86.mode & SYSMODE_PREFIX_REPNE) { + /* REPNE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + val1 = fetch_data_byte(emu, emu->x86.R_SI); + val2 = fetch_byte(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_byte(emu, val1, val2); + emu->x86.R_CX -= 1; + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPNE; + } else { + val1 = fetch_data_byte(emu, emu->x86.R_SI); + val2 = fetch_byte(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_byte(emu, val1, val2); + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa7 +****************************************************************************/ +static void +x86emuOp_cmps_word(struct X86EMU *emu) +{ + uint32_t val1, val2; + int inc; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -4; + else + inc = 4; + } else { + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -2; + else + inc = 2; + } + if (emu->x86.mode & SYSMODE_PREFIX_REPE) { + /* REPE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val1 = fetch_data_long(emu, emu->x86.R_SI); + val2 = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_long(emu, val1, val2); + } else { + val1 = fetch_data_word(emu, emu->x86.R_SI); + val2 = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_word(emu, (uint16_t) val1, (uint16_t) val2); + } + emu->x86.R_CX -= 1; + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPE; + } else if (emu->x86.mode & SYSMODE_PREFIX_REPNE) { + /* REPNE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val1 = fetch_data_long(emu, emu->x86.R_SI); + val2 = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_long(emu, val1, val2); + } else { + val1 = fetch_data_word(emu, emu->x86.R_SI); + val2 = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_word(emu, (uint16_t) val1, (uint16_t) val2); + } + emu->x86.R_CX -= 1; + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPNE; + } else { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val1 = fetch_data_long(emu, emu->x86.R_SI); + val2 = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_long(emu, val1, val2); + } else { + val1 = fetch_data_word(emu, emu->x86.R_SI); + val2 = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_word(emu, (uint16_t) val1, (uint16_t) val2); + } + emu->x86.R_SI += inc; + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xa9 +****************************************************************************/ +static void +x86emuOp_test_AX_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + test_long(emu, emu->x86.R_EAX, fetch_long_imm(emu)); + } else { + test_word(emu, emu->x86.R_AX, fetch_word_imm(emu)); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xaa +****************************************************************************/ +static void +x86emuOp_stos_byte(struct X86EMU *emu) +{ + int inc; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -1; + else + inc = 1; + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + store_byte(emu, emu->x86.R_ES, emu->x86.R_DI, emu->x86.R_AL); + emu->x86.R_CX -= 1; + emu->x86.R_DI += inc; + } + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } else { + store_byte(emu, emu->x86.R_ES, emu->x86.R_DI, emu->x86.R_AL); + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xab +****************************************************************************/ +static void +x86emuOp_stos_word(struct X86EMU *emu) +{ + int inc; + uint32_t count; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + inc = 4; + else + inc = 2; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -inc; + + count = 1; + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = emu->x86.R_CX; + emu->x86.R_CX = 0; + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } + while (count--) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + store_long(emu, emu->x86.R_ES, emu->x86.R_DI, emu->x86.R_EAX); + } else { + store_word(emu, emu->x86.R_ES, emu->x86.R_DI, emu->x86.R_AX); + } + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xac +****************************************************************************/ +static void +x86emuOp_lods_byte(struct X86EMU *emu) +{ + int inc; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -1; + else + inc = 1; + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + emu->x86.R_AL = fetch_data_byte(emu, emu->x86.R_SI); + emu->x86.R_CX -= 1; + emu->x86.R_SI += inc; + } + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } else { + emu->x86.R_AL = fetch_data_byte(emu, emu->x86.R_SI); + emu->x86.R_SI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xad +****************************************************************************/ +static void +x86emuOp_lods_word(struct X86EMU *emu) +{ + int inc; + uint32_t count; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + inc = 4; + else + inc = 2; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -inc; + + count = 1; + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = emu->x86.R_CX; + emu->x86.R_CX = 0; + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } + while (count--) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_EAX = fetch_data_long(emu, emu->x86.R_SI); + } else { + emu->x86.R_AX = fetch_data_word(emu, emu->x86.R_SI); + } + emu->x86.R_SI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xae +****************************************************************************/ +static void +x86emuOp_scas_byte(struct X86EMU *emu) +{ + int8_t val2; + int inc; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -1; + else + inc = 1; + if (emu->x86.mode & SYSMODE_PREFIX_REPE) { + /* REPE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + val2 = fetch_byte(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_byte(emu, emu->x86.R_AL, val2); + emu->x86.R_CX -= 1; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPE; + } else if (emu->x86.mode & SYSMODE_PREFIX_REPNE) { + /* REPNE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + val2 = fetch_byte(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_byte(emu, emu->x86.R_AL, val2); + emu->x86.R_CX -= 1; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPNE; + } else { + val2 = fetch_byte(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_byte(emu, emu->x86.R_AL, val2); + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xaf +****************************************************************************/ +static void +x86emuOp_scas_word(struct X86EMU *emu) +{ + int inc; + uint32_t val; + + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + inc = 4; + else + inc = 2; + + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -inc; + + if (emu->x86.mode & SYSMODE_PREFIX_REPE) { + /* REPE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_long(emu, emu->x86.R_EAX, val); + } else { + val = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_word(emu, emu->x86.R_AX, (uint16_t) val); + } + emu->x86.R_CX -= 1; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPE; + } else if (emu->x86.mode & SYSMODE_PREFIX_REPNE) { + /* REPNE */ + /* move them until CX is ZERO. */ + while (emu->x86.R_CX != 0) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_long(emu, emu->x86.R_EAX, val); + } else { + val = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_word(emu, emu->x86.R_AX, (uint16_t) val); + } + emu->x86.R_CX -= 1; + emu->x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + emu->x86.mode &= ~SYSMODE_PREFIX_REPNE; + } else { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_long(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_long(emu, emu->x86.R_EAX, val); + } else { + val = fetch_word(emu, emu->x86.R_ES, emu->x86.R_DI); + cmp_word(emu, emu->x86.R_AX, (uint16_t) val); + } + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xb8 +****************************************************************************/ +static void +x86emuOp_mov_word_AX_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_EAX = fetch_long_imm(emu); + else + emu->x86.R_AX = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xb9 +****************************************************************************/ +static void +x86emuOp_mov_word_CX_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_ECX = fetch_long_imm(emu); + else + emu->x86.R_CX = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xba +****************************************************************************/ +static void +x86emuOp_mov_word_DX_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_EDX = fetch_long_imm(emu); + else + emu->x86.R_DX = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xbb +****************************************************************************/ +static void +x86emuOp_mov_word_BX_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_EBX = fetch_long_imm(emu); + else + emu->x86.R_BX = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xbc +****************************************************************************/ +static void +x86emuOp_mov_word_SP_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_ESP = fetch_long_imm(emu); + else + emu->x86.R_SP = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xbd +****************************************************************************/ +static void +x86emuOp_mov_word_BP_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_EBP = fetch_long_imm(emu); + else + emu->x86.R_BP = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xbe +****************************************************************************/ +static void +x86emuOp_mov_word_SI_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_ESI = fetch_long_imm(emu); + else + emu->x86.R_SI = fetch_word_imm(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xbf +****************************************************************************/ +static void +x86emuOp_mov_word_DI_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + emu->x86.R_EDI = fetch_long_imm(emu); + else + emu->x86.R_DI = fetch_word_imm(emu); +} +/* used by opcodes c0, d0, and d2. */ +static +uint8_t(* const opcD0_byte_operation[]) (struct X86EMU *, uint8_t d, uint8_t s) = +{ + rol_byte, + ror_byte, + rcl_byte, + rcr_byte, + shl_byte, + shr_byte, + shl_byte, /* sal_byte === shl_byte by definition */ + sar_byte, +}; +/**************************************************************************** +REMARKS: +Handles opcode 0xc0 +****************************************************************************/ +static void +x86emuOp_opcC0_byte_RM_MEM(struct X86EMU *emu) +{ + uint8_t destval, amt; + + /* + * Yet another weirdo special case instruction format. Part of + * the opcode held below in "RH". Doubly nested case would + * result, except that the decoded instruction + */ + fetch_decode_modrm(emu); + /* know operation, decode the mod byte to find the addressing mode. */ + destval = decode_and_fetch_byte_imm8(emu, &amt); + destval = (*opcD0_byte_operation[emu->cur_rh]) (emu, destval, amt); + write_back_byte(emu, destval); +} +/* used by opcodes c1, d1, and d3. */ +static +uint16_t(* const opcD1_word_operation[]) (struct X86EMU *, uint16_t s, uint8_t d) = +{ + rol_word, + ror_word, + rcl_word, + rcr_word, + shl_word, + shr_word, + shl_word, /* sal_byte === shl_byte by definition */ + sar_word, +}; +/* used by opcodes c1, d1, and d3. */ +static +uint32_t(* const opcD1_long_operation[]) (struct X86EMU *, uint32_t s, uint8_t d) = +{ + rol_long, + ror_long, + rcl_long, + rcr_long, + shl_long, + shr_long, + shl_long, /* sal_byte === shl_byte by definition */ + sar_long, +}; +/**************************************************************************** +REMARKS: +Handles opcode 0xc1 +****************************************************************************/ +static void +x86emuOp_opcC1_word_RM_MEM(struct X86EMU *emu) +{ + uint8_t amt; + + /* + * Yet another weirdo special case instruction format. Part of + * the opcode held below in "RH". Doubly nested case would + * result, except that the decoded instruction + */ + fetch_decode_modrm(emu); + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t destval; + + destval = decode_and_fetch_long_imm8(emu, &amt); + destval = (*opcD1_long_operation[emu->cur_rh]) (emu, destval, amt); + write_back_long(emu, destval); + } else { + uint16_t destval; + + destval = decode_and_fetch_word_imm8(emu, &amt); + destval = (*opcD1_word_operation[emu->cur_rh]) (emu, destval, amt); + write_back_word(emu, destval); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xc2 +****************************************************************************/ +static void +x86emuOp_ret_near_IMM(struct X86EMU *emu) +{ + uint16_t imm; + + imm = fetch_word_imm(emu); + emu->x86.R_IP = pop_word(emu); + emu->x86.R_SP += imm; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xc6 +****************************************************************************/ +static void +x86emuOp_mov_byte_RM_IMM(struct X86EMU *emu) +{ + uint8_t *destreg; + uint32_t destoffset; + uint8_t imm; + + fetch_decode_modrm(emu); + if (emu->cur_rh != 0) + X86EMU_halt_sys(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + imm = fetch_byte_imm(emu); + store_data_byte(emu, destoffset, imm); + } else { + destreg = decode_rl_byte_register(emu); + imm = fetch_byte_imm(emu); + *destreg = imm; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xc7 +****************************************************************************/ +static void +x86emuOp32_mov_word_RM_IMM(struct X86EMU *emu) +{ + uint32_t destoffset; + uint32_t imm, *destreg; + + fetch_decode_modrm(emu); + if (emu->cur_rh != 0) + X86EMU_halt_sys(emu); + + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + imm = fetch_long_imm(emu); + store_data_long(emu, destoffset, imm); + } else { + destreg = decode_rl_long_register(emu); + imm = fetch_long_imm(emu); + *destreg = imm; + } +} + +static void +x86emuOp16_mov_word_RM_IMM(struct X86EMU *emu) +{ + uint32_t destoffset; + uint16_t imm, *destreg; + + fetch_decode_modrm(emu); + if (emu->cur_rh != 0) + X86EMU_halt_sys(emu); + + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + imm = fetch_word_imm(emu); + store_data_word(emu, destoffset, imm); + } else { + destreg = decode_rl_word_register(emu); + imm = fetch_word_imm(emu); + *destreg = imm; + } +} + +static void +x86emuOp_mov_word_RM_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_mov_word_RM_IMM(emu); + else + x86emuOp16_mov_word_RM_IMM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xc8 +****************************************************************************/ +static void +x86emuOp_enter(struct X86EMU *emu) +{ + uint16_t local, frame_pointer; + uint8_t nesting; + int i; + + local = fetch_word_imm(emu); + nesting = fetch_byte_imm(emu); + push_word(emu, emu->x86.R_BP); + frame_pointer = emu->x86.R_SP; + if (nesting > 0) { + for (i = 1; i < nesting; i++) { + emu->x86.R_BP -= 2; + push_word(emu, fetch_word(emu, emu->x86.R_SS, emu->x86.R_BP)); + } + push_word(emu, frame_pointer); + } + emu->x86.R_BP = frame_pointer; + emu->x86.R_SP = (uint16_t) (emu->x86.R_SP - local); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xc9 +****************************************************************************/ +static void +x86emuOp_leave(struct X86EMU *emu) +{ + emu->x86.R_SP = emu->x86.R_BP; + emu->x86.R_BP = pop_word(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xca +****************************************************************************/ +static void +x86emuOp_ret_far_IMM(struct X86EMU *emu) +{ + uint16_t imm; + + imm = fetch_word_imm(emu); + emu->x86.R_IP = pop_word(emu); + emu->x86.R_CS = pop_word(emu); + emu->x86.R_SP += imm; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xcb +****************************************************************************/ +static void +x86emuOp_ret_far(struct X86EMU *emu) +{ + emu->x86.R_IP = pop_word(emu); + emu->x86.R_CS = pop_word(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xcc +****************************************************************************/ +static void +x86emuOp_int3(struct X86EMU *emu) +{ + x86emu_intr_dispatch(emu, 3); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xcd +****************************************************************************/ +static void +x86emuOp_int_IMM(struct X86EMU *emu) +{ + uint8_t intnum; + + intnum = fetch_byte_imm(emu); + x86emu_intr_dispatch(emu, intnum); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xce +****************************************************************************/ +static void +x86emuOp_into(struct X86EMU *emu) +{ + if (ACCESS_FLAG(F_OF)) + x86emu_intr_dispatch(emu, 4); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xcf +****************************************************************************/ +static void +x86emuOp_iret(struct X86EMU *emu) +{ + emu->x86.R_IP = pop_word(emu); + emu->x86.R_CS = pop_word(emu); + emu->x86.R_FLG = pop_word(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xd0 +****************************************************************************/ +static void +x86emuOp_opcD0_byte_RM_1(struct X86EMU *emu) +{ + uint8_t destval; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_byte(emu); + destval = (*opcD0_byte_operation[emu->cur_rh]) (emu, destval, 1); + write_back_byte(emu, destval); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xd1 +****************************************************************************/ +static void +x86emuOp_opcD1_word_RM_1(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t destval; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_long(emu); + destval = (*opcD1_long_operation[emu->cur_rh]) (emu, destval, 1); + write_back_long(emu, destval); + } else { + uint16_t destval; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_word(emu); + destval = (*opcD1_word_operation[emu->cur_rh]) (emu, destval, 1); + write_back_word(emu, destval); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xd2 +****************************************************************************/ +static void +x86emuOp_opcD2_byte_RM_CL(struct X86EMU *emu) +{ + uint8_t destval; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_byte(emu); + destval = (*opcD0_byte_operation[emu->cur_rh]) (emu, destval, emu->x86.R_CL); + write_back_byte(emu, destval); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xd3 +****************************************************************************/ +static void +x86emuOp_opcD3_word_RM_CL(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + uint32_t destval; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_long(emu); + destval = (*opcD1_long_operation[emu->cur_rh]) (emu, destval, emu->x86.R_CL); + write_back_long(emu, destval); + } else { + uint16_t destval; + + fetch_decode_modrm(emu); + destval = decode_and_fetch_word(emu); + destval = (*opcD1_word_operation[emu->cur_rh]) (emu, destval, emu->x86.R_CL); + write_back_word(emu, destval); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xd4 +****************************************************************************/ +static void +x86emuOp_aam(struct X86EMU *emu) +{ + uint8_t a; + + a = fetch_byte_imm(emu); /* this is a stupid encoding. */ + if (a != 10) { + /* fix: add base decoding aam_word(uint8_t val, int base a) */ + X86EMU_halt_sys(emu); + } + /* note the type change here --- returning AL and AH in AX. */ + emu->x86.R_AX = aam_word(emu, emu->x86.R_AL); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xd5 +****************************************************************************/ +static void +x86emuOp_aad(struct X86EMU *emu) +{ + uint8_t a; + + a = fetch_byte_imm(emu); + if (a != 10) { + /* fix: add base decoding aad_word(uint16_t val, int base a) */ + X86EMU_halt_sys(emu); + } + emu->x86.R_AX = aad_word(emu, emu->x86.R_AX); +} +/* opcode 0xd6 ILLEGAL OPCODE */ + +/**************************************************************************** +REMARKS: +Handles opcode 0xd7 +****************************************************************************/ +static void +x86emuOp_xlat(struct X86EMU *emu) +{ + uint16_t addr; + + addr = (uint16_t) (emu->x86.R_BX + (uint8_t) emu->x86.R_AL); + emu->x86.R_AL = fetch_data_byte(emu, addr); +} + +/* opcode=0xd8 */ +static void +x86emuOp_esc_coprocess_d8(struct X86EMU *emu) +{ +} +/* opcode=0xd9 */ +static void +x86emuOp_esc_coprocess_d9(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} +/* opcode=0xda */ +static void +x86emuOp_esc_coprocess_da(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} +/* opcode=0xdb */ +static void +x86emuOp_esc_coprocess_db(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} +/* opcode=0xdc */ +static void +x86emuOp_esc_coprocess_dc(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} +/* opcode=0xdd */ +static void +x86emuOp_esc_coprocess_dd(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} +/* opcode=0xde */ +static void +x86emuOp_esc_coprocess_de(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} +/* opcode=0xdf */ +static void +x86emuOp_esc_coprocess_df(struct X86EMU *emu) +{ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) + decode_rl_address(emu); +} + +/**************************************************************************** +REMARKS: +Handles opcode 0xe0 +****************************************************************************/ +static void +x86emuOp_loopne(struct X86EMU *emu) +{ + int16_t ip; + + ip = (int8_t) fetch_byte_imm(emu); + ip += (int16_t) emu->x86.R_IP; + emu->x86.R_CX -= 1; + if (emu->x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */ + emu->x86.R_IP = ip; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe1 +****************************************************************************/ +static void +x86emuOp_loope(struct X86EMU *emu) +{ + int16_t ip; + + ip = (int8_t) fetch_byte_imm(emu); + ip += (int16_t) emu->x86.R_IP; + emu->x86.R_CX -= 1; + if (emu->x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */ + emu->x86.R_IP = ip; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe2 +****************************************************************************/ +static void +x86emuOp_loop(struct X86EMU *emu) +{ + int16_t ip; + + ip = (int8_t) fetch_byte_imm(emu); + ip += (int16_t) emu->x86.R_IP; + emu->x86.R_CX -= 1; + if (emu->x86.R_CX != 0) + emu->x86.R_IP = ip; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe3 +****************************************************************************/ +static void +x86emuOp_jcxz(struct X86EMU *emu) +{ + uint16_t target; + int8_t offset; + + /* jump to byte offset if overflow flag is set */ + offset = (int8_t) fetch_byte_imm(emu); + target = (uint16_t) (emu->x86.R_IP + offset); + if (emu->x86.R_CX == 0) + emu->x86.R_IP = target; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe4 +****************************************************************************/ +static void +x86emuOp_in_byte_AL_IMM(struct X86EMU *emu) +{ + uint8_t port; + + port = (uint8_t) fetch_byte_imm(emu); + emu->x86.R_AL = (*emu->emu_inb) (emu, port); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe5 +****************************************************************************/ +static void +x86emuOp_in_word_AX_IMM(struct X86EMU *emu) +{ + uint8_t port; + + port = (uint8_t) fetch_byte_imm(emu); + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_EAX = (*emu->emu_inl) (emu, port); + } else { + emu->x86.R_AX = (*emu->emu_inw) (emu, port); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe6 +****************************************************************************/ +static void +x86emuOp_out_byte_IMM_AL(struct X86EMU *emu) +{ + uint8_t port; + + port = (uint8_t) fetch_byte_imm(emu); + (*emu->emu_outb) (emu, port, emu->x86.R_AL); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe7 +****************************************************************************/ +static void +x86emuOp_out_word_IMM_AX(struct X86EMU *emu) +{ + uint8_t port; + + port = (uint8_t) fetch_byte_imm(emu); + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + (*emu->emu_outl) (emu, port, emu->x86.R_EAX); + } else { + (*emu->emu_outw) (emu, port, emu->x86.R_AX); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe8 +****************************************************************************/ +static void +x86emuOp_call_near_IMM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + int32_t ip; + ip = (int32_t) fetch_long_imm(emu); + ip += (int32_t) emu->x86.R_EIP; + push_long(emu, emu->x86.R_EIP); + emu->x86.R_EIP = ip; + } else { + int16_t ip; + ip = (int16_t) fetch_word_imm(emu); + ip += (int16_t) emu->x86.R_IP; /* CHECK SIGN */ + push_word(emu, emu->x86.R_IP); + emu->x86.R_IP = ip; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xe9 +****************************************************************************/ +static void +x86emuOp_jump_near_IMM(struct X86EMU *emu) +{ + int ip; + + ip = (int16_t) fetch_word_imm(emu); + ip += (int16_t) emu->x86.R_IP; + emu->x86.R_IP = (uint16_t) ip; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xea +****************************************************************************/ +static void +x86emuOp_jump_far_IMM(struct X86EMU *emu) +{ + uint16_t cs, ip; + + ip = fetch_word_imm(emu); + cs = fetch_word_imm(emu); + emu->x86.R_IP = ip; + emu->x86.R_CS = cs; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xeb +****************************************************************************/ +static void +x86emuOp_jump_byte_IMM(struct X86EMU *emu) +{ + uint16_t target; + int8_t offset; + + offset = (int8_t) fetch_byte_imm(emu); + target = (uint16_t) (emu->x86.R_IP + offset); + emu->x86.R_IP = target; +} +/**************************************************************************** +REMARKS: +Handles opcode 0xec +****************************************************************************/ +static void +x86emuOp_in_byte_AL_DX(struct X86EMU *emu) +{ + emu->x86.R_AL = (*emu->emu_inb) (emu, emu->x86.R_DX); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xed +****************************************************************************/ +static void +x86emuOp_in_word_AX_DX(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_EAX = (*emu->emu_inl) (emu, emu->x86.R_DX); + } else { + emu->x86.R_AX = (*emu->emu_inw) (emu, emu->x86.R_DX); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xee +****************************************************************************/ +static void +x86emuOp_out_byte_DX_AL(struct X86EMU *emu) +{ + (*emu->emu_outb) (emu, emu->x86.R_DX, emu->x86.R_AL); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xef +****************************************************************************/ +static void +x86emuOp_out_word_DX_AX(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + (*emu->emu_outl) (emu, emu->x86.R_DX, emu->x86.R_EAX); + } else { + (*emu->emu_outw) (emu, emu->x86.R_DX, emu->x86.R_AX); + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xf0 +****************************************************************************/ +static void +x86emuOp_lock(struct X86EMU *emu) +{ +} +/*opcode 0xf1 ILLEGAL OPERATION */ + +/**************************************************************************** +REMARKS: +Handles opcode 0xf5 +****************************************************************************/ +static void +x86emuOp_cmc(struct X86EMU *emu) +{ + if (ACCESS_FLAG(F_CF)) + CLEAR_FLAG(F_CF); + else + SET_FLAG(F_CF); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xf6 +****************************************************************************/ +static void +x86emuOp_opcF6_byte_RM(struct X86EMU *emu) +{ + uint8_t destval, srcval; + + /* long, drawn out code follows. Double switch for a total of 32 + * cases. */ + fetch_decode_modrm(emu); + if (emu->cur_rh == 1) + X86EMU_halt_sys(emu); + + if (emu->cur_rh == 0) { + destval = decode_and_fetch_byte_imm8(emu, &srcval); + test_byte(emu, destval, srcval); + return; + } + destval = decode_and_fetch_byte(emu); + switch (emu->cur_rh) { + case 2: + destval = ~destval; + write_back_byte(emu, destval); + break; + case 3: + destval = neg_byte(emu, destval); + write_back_byte(emu, destval); + break; + case 4: + mul_byte(emu, destval); + break; + case 5: + imul_byte(emu, destval); + break; + case 6: + div_byte(emu, destval); + break; + case 7: + idiv_byte(emu, destval); + break; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xf7 +****************************************************************************/ +static void +x86emuOp32_opcF7_word_RM(struct X86EMU *emu) +{ + uint32_t destval, srcval; + + /* long, drawn out code follows. Double switch for a total of 32 + * cases. */ + fetch_decode_modrm(emu); + if (emu->cur_rh == 1) + X86EMU_halt_sys(emu); + + if (emu->cur_rh == 0) { + if (emu->cur_mod != 3) { + uint32_t destoffset; + + destoffset = decode_rl_address(emu); + srcval = fetch_long_imm(emu); + destval = fetch_data_long(emu, destoffset); + } else { + srcval = fetch_long_imm(emu); + destval = *decode_rl_long_register(emu); + } + test_long(emu, destval, srcval); + return; + } + destval = decode_and_fetch_long(emu); + switch (emu->cur_rh) { + case 2: + destval = ~destval; + write_back_long(emu, destval); + break; + case 3: + destval = neg_long(emu, destval); + write_back_long(emu, destval); + break; + case 4: + mul_long(emu, destval); + break; + case 5: + imul_long(emu, destval); + break; + case 6: + div_long(emu, destval); + break; + case 7: + idiv_long(emu, destval); + break; + } +} +static void +x86emuOp16_opcF7_word_RM(struct X86EMU *emu) +{ + uint16_t destval, srcval; + + /* long, drawn out code follows. Double switch for a total of 32 + * cases. */ + fetch_decode_modrm(emu); + if (emu->cur_rh == 1) + X86EMU_halt_sys(emu); + + if (emu->cur_rh == 0) { + if (emu->cur_mod != 3) { + uint32_t destoffset; + + destoffset = decode_rl_address(emu); + srcval = fetch_word_imm(emu); + destval = fetch_data_word(emu, destoffset); + } else { + srcval = fetch_word_imm(emu); + destval = *decode_rl_word_register(emu); + } + test_word(emu, destval, srcval); + return; + } + destval = decode_and_fetch_word(emu); + switch (emu->cur_rh) { + case 2: + destval = ~destval; + write_back_word(emu, destval); + break; + case 3: + destval = neg_word(emu, destval); + write_back_word(emu, destval); + break; + case 4: + mul_word(emu, destval); + break; + case 5: + imul_word(emu, destval); + break; + case 6: + div_word(emu, destval); + break; + case 7: + idiv_word(emu, destval); + break; + } +} +static void +x86emuOp_opcF7_word_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_opcF7_word_RM(emu); + else + x86emuOp16_opcF7_word_RM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0xfe +****************************************************************************/ +static void +x86emuOp_opcFE_byte_RM(struct X86EMU *emu) +{ + uint8_t destval; + uint32_t destoffset; + uint8_t *destreg; + + /* Yet another special case instruction. */ + fetch_decode_modrm(emu); + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + switch (emu->cur_rh) { + case 0: /* inc word ptr ... */ + destval = fetch_data_byte(emu, destoffset); + destval = inc_byte(emu, destval); + store_data_byte(emu, destoffset, destval); + break; + case 1: /* dec word ptr ... */ + destval = fetch_data_byte(emu, destoffset); + destval = dec_byte(emu, destval); + store_data_byte(emu, destoffset, destval); + break; + } + } else { + destreg = decode_rl_byte_register(emu); + switch (emu->cur_rh) { + case 0: + *destreg = inc_byte(emu, *destreg); + break; + case 1: + *destreg = dec_byte(emu, *destreg); + break; + } + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0xff +****************************************************************************/ +static void +x86emuOp32_opcFF_word_RM(struct X86EMU *emu) +{ + uint32_t destoffset = 0; + uint32_t destval, *destreg; + + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_long(emu, destoffset); + switch (emu->cur_rh) { + case 0: /* inc word ptr ... */ + destval = inc_long(emu, destval); + store_data_long(emu, destoffset, destval); + break; + case 1: /* dec word ptr ... */ + destval = dec_long(emu, destval); + store_data_long(emu, destoffset, destval); + break; + case 6: /* push word ptr ... */ + push_long(emu, destval); + break; + } + } else { + destreg = decode_rl_long_register(emu); + switch (emu->cur_rh) { + case 0: + *destreg = inc_long(emu, *destreg); + break; + case 1: + *destreg = dec_long(emu, *destreg); + break; + case 6: + push_long(emu, *destreg); + break; + } + } +} + +static void +x86emuOp16_opcFF_word_RM(struct X86EMU *emu) +{ + uint32_t destoffset = 0; + uint16_t *destreg; + uint16_t destval; + + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_word(emu, destoffset); + switch (emu->cur_rh) { + case 0: + destval = inc_word(emu, destval); + store_data_word(emu, destoffset, destval); + break; + case 1: /* dec word ptr ... */ + destval = dec_word(emu, destval); + store_data_word(emu, destoffset, destval); + break; + case 6: /* push word ptr ... */ + push_word(emu, destval); + break; + } + } else { + destreg = decode_rl_word_register(emu); + switch (emu->cur_rh) { + case 0: + *destreg = inc_word(emu, *destreg); + break; + case 1: + *destreg = dec_word(emu, *destreg); + break; + case 6: + push_word(emu, *destreg); + break; + } + } +} + +static void +x86emuOp_opcFF_word_RM(struct X86EMU *emu) +{ + uint32_t destoffset = 0; + uint16_t destval, destval2; + + /* Yet another special case instruction. */ + fetch_decode_modrm(emu); + if ((emu->cur_mod == 3 && (emu->cur_rh == 3 || emu->cur_rh == 5)) || emu->cur_rh == 7) + X86EMU_halt_sys(emu); + if (emu->cur_rh == 0 || emu->cur_rh == 1 || emu->cur_rh == 6) { + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp32_opcFF_word_RM(emu); + else + x86emuOp16_opcFF_word_RM(emu); + return; + } + + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + destval = fetch_data_word(emu, destoffset); + switch (emu->cur_rh) { + case 3: /* call far ptr ... */ + destval2 = fetch_data_word(emu, destoffset + 2); + push_word(emu, emu->x86.R_CS); + emu->x86.R_CS = destval2; + push_word(emu, emu->x86.R_IP); + emu->x86.R_IP = destval; + break; + case 5: /* jmp far ptr ... */ + destval2 = fetch_data_word(emu, destoffset + 2); + emu->x86.R_IP = destval; + emu->x86.R_CS = destval2; + break; + } + } else { + destval = *decode_rl_word_register(emu); + } + + switch (emu->cur_rh) { + case 2: /* call word ptr */ + push_word(emu, emu->x86.R_IP); + emu->x86.R_IP = destval; + break; + case 4: /* jmp */ + emu->x86.R_IP = destval; + break; + } +} +/*************************************************************************** + * Single byte operation code table: + **************************************************************************/ +static void +X86EMU_exec_one_byte(struct X86EMU * emu) +{ + uint8_t op1; + + op1 = fetch_byte_imm(emu); + + switch (op1) { + case 0x00: + common_binop_byte_rm_r(emu, add_byte); + break; + case 0x01: + common_binop_word_long_rm_r(emu, add_word, add_long); + break; + case 0x02: + common_binop_byte_r_rm(emu, add_byte); + break; + case 0x03: + common_binop_word_long_r_rm(emu, add_word, add_long); + break; + case 0x04: + common_binop_byte_imm(emu, add_byte); + break; + case 0x05: + common_binop_word_long_imm(emu, add_word, add_long); + break; + case 0x06: + push_word(emu, emu->x86.R_ES); + break; + case 0x07: + emu->x86.R_ES = pop_word(emu); + break; + + case 0x08: + common_binop_byte_rm_r(emu, or_byte); + break; + case 0x09: + common_binop_word_long_rm_r(emu, or_word, or_long); + break; + case 0x0a: + common_binop_byte_r_rm(emu, or_byte); + break; + case 0x0b: + common_binop_word_long_r_rm(emu, or_word, or_long); + break; + case 0x0c: + common_binop_byte_imm(emu, or_byte); + break; + case 0x0d: + common_binop_word_long_imm(emu, or_word, or_long); + break; + case 0x0e: + push_word(emu, emu->x86.R_CS); + break; + case 0x0f: + X86EMU_exec_two_byte(emu); + break; + + case 0x10: + common_binop_byte_rm_r(emu, adc_byte); + break; + case 0x11: + common_binop_word_long_rm_r(emu, adc_word, adc_long); + break; + case 0x12: + common_binop_byte_r_rm(emu, adc_byte); + break; + case 0x13: + common_binop_word_long_r_rm(emu, adc_word, adc_long); + break; + case 0x14: + common_binop_byte_imm(emu, adc_byte); + break; + case 0x15: + common_binop_word_long_imm(emu, adc_word, adc_long); + break; + case 0x16: + push_word(emu, emu->x86.R_SS); + break; + case 0x17: + emu->x86.R_SS = pop_word(emu); + break; + + case 0x18: + common_binop_byte_rm_r(emu, sbb_byte); + break; + case 0x19: + common_binop_word_long_rm_r(emu, sbb_word, sbb_long); + break; + case 0x1a: + common_binop_byte_r_rm(emu, sbb_byte); + break; + case 0x1b: + common_binop_word_long_r_rm(emu, sbb_word, sbb_long); + break; + case 0x1c: + common_binop_byte_imm(emu, sbb_byte); + break; + case 0x1d: + common_binop_word_long_imm(emu, sbb_word, sbb_long); + break; + case 0x1e: + push_word(emu, emu->x86.R_DS); + break; + case 0x1f: + emu->x86.R_DS = pop_word(emu); + break; + + case 0x20: + common_binop_byte_rm_r(emu, and_byte); + break; + case 0x21: + common_binop_word_long_rm_r(emu, and_word, and_long); + break; + case 0x22: + common_binop_byte_r_rm(emu, and_byte); + break; + case 0x23: + common_binop_word_long_r_rm(emu, and_word, and_long); + break; + case 0x24: + common_binop_byte_imm(emu, and_byte); + break; + case 0x25: + common_binop_word_long_imm(emu, and_word, and_long); + break; + case 0x26: + emu->x86.mode |= SYSMODE_SEGOVR_ES; + break; + case 0x27: + emu->x86.R_AL = daa_byte(emu, emu->x86.R_AL); + break; + + case 0x28: + common_binop_byte_rm_r(emu, sub_byte); + break; + case 0x29: + common_binop_word_long_rm_r(emu, sub_word, sub_long); + break; + case 0x2a: + common_binop_byte_r_rm(emu, sub_byte); + break; + case 0x2b: + common_binop_word_long_r_rm(emu, sub_word, sub_long); + break; + case 0x2c: + common_binop_byte_imm(emu, sub_byte); + break; + case 0x2d: + common_binop_word_long_imm(emu, sub_word, sub_long); + break; + case 0x2e: + emu->x86.mode |= SYSMODE_SEGOVR_CS; + break; + case 0x2f: + emu->x86.R_AL = das_byte(emu, emu->x86.R_AL); + break; + + case 0x30: + common_binop_byte_rm_r(emu, xor_byte); + break; + case 0x31: + common_binop_word_long_rm_r(emu, xor_word, xor_long); + break; + case 0x32: + common_binop_byte_r_rm(emu, xor_byte); + break; + case 0x33: + common_binop_word_long_r_rm(emu, xor_word, xor_long); + break; + case 0x34: + common_binop_byte_imm(emu, xor_byte); + break; + case 0x35: + common_binop_word_long_imm(emu, xor_word, xor_long); + break; + case 0x36: + emu->x86.mode |= SYSMODE_SEGOVR_SS; + break; + case 0x37: + emu->x86.R_AX = aaa_word(emu, emu->x86.R_AX); + break; + + case 0x38: + common_binop_ns_byte_rm_r(emu, cmp_byte_no_return); + break; + case 0x39: + common_binop_ns_word_long_rm_r(emu, cmp_word_no_return, + cmp_long_no_return); + break; + case 0x3a: + x86emuOp_cmp_byte_R_RM(emu); + break; + case 0x3b: + x86emuOp_cmp_word_R_RM(emu); + break; + case 0x3c: + x86emuOp_cmp_byte_AL_IMM(emu); + break; + case 0x3d: + x86emuOp_cmp_word_AX_IMM(emu); + break; + case 0x3e: + emu->x86.mode |= SYSMODE_SEGOVR_DS; + break; + case 0x3f: + emu->x86.R_AX = aas_word(emu, emu->x86.R_AX); + break; + + case 0x40: + common_inc_word_long(emu, &emu->x86.register_a); + break; + case 0x41: + common_inc_word_long(emu, &emu->x86.register_c); + break; + case 0x42: + common_inc_word_long(emu, &emu->x86.register_d); + break; + case 0x43: + common_inc_word_long(emu, &emu->x86.register_b); + break; + case 0x44: + common_inc_word_long(emu, &emu->x86.register_sp); + break; + case 0x45: + common_inc_word_long(emu, &emu->x86.register_bp); + break; + case 0x46: + common_inc_word_long(emu, &emu->x86.register_si); + break; + case 0x47: + common_inc_word_long(emu, &emu->x86.register_di); + break; + + case 0x48: + common_dec_word_long(emu, &emu->x86.register_a); + break; + case 0x49: + common_dec_word_long(emu, &emu->x86.register_c); + break; + case 0x4a: + common_dec_word_long(emu, &emu->x86.register_d); + break; + case 0x4b: + common_dec_word_long(emu, &emu->x86.register_b); + break; + case 0x4c: + common_dec_word_long(emu, &emu->x86.register_sp); + break; + case 0x4d: + common_dec_word_long(emu, &emu->x86.register_bp); + break; + case 0x4e: + common_dec_word_long(emu, &emu->x86.register_si); + break; + case 0x4f: + common_dec_word_long(emu, &emu->x86.register_di); + break; + + case 0x50: + common_push_word_long(emu, &emu->x86.register_a); + break; + case 0x51: + common_push_word_long(emu, &emu->x86.register_c); + break; + case 0x52: + common_push_word_long(emu, &emu->x86.register_d); + break; + case 0x53: + common_push_word_long(emu, &emu->x86.register_b); + break; + case 0x54: + common_push_word_long(emu, &emu->x86.register_sp); + break; + case 0x55: + common_push_word_long(emu, &emu->x86.register_bp); + break; + case 0x56: + common_push_word_long(emu, &emu->x86.register_si); + break; + case 0x57: + common_push_word_long(emu, &emu->x86.register_di); + break; + + case 0x58: + common_pop_word_long(emu, &emu->x86.register_a); + break; + case 0x59: + common_pop_word_long(emu, &emu->x86.register_c); + break; + case 0x5a: + common_pop_word_long(emu, &emu->x86.register_d); + break; + case 0x5b: + common_pop_word_long(emu, &emu->x86.register_b); + break; + case 0x5c: + common_pop_word_long(emu, &emu->x86.register_sp); + break; + case 0x5d: + common_pop_word_long(emu, &emu->x86.register_bp); + break; + case 0x5e: + common_pop_word_long(emu, &emu->x86.register_si); + break; + case 0x5f: + common_pop_word_long(emu, &emu->x86.register_di); + break; + + case 0x60: + x86emuOp_push_all(emu); + break; + case 0x61: + x86emuOp_pop_all(emu); + break; + /* 0x62 bound */ + /* 0x63 arpl */ + case 0x64: + emu->x86.mode |= SYSMODE_SEGOVR_FS; + break; + case 0x65: + emu->x86.mode |= SYSMODE_SEGOVR_GS; + break; + case 0x66: + emu->x86.mode |= SYSMODE_PREFIX_DATA; + break; + case 0x67: + emu->x86.mode |= SYSMODE_PREFIX_ADDR; + break; + + case 0x68: + x86emuOp_push_word_IMM(emu); + break; + case 0x69: + common_imul_imm(emu, false); + break; + case 0x6a: + x86emuOp_push_byte_IMM(emu); + break; + case 0x6b: + common_imul_imm(emu, true); + break; + case 0x6c: + ins(emu, 1); + break; + case 0x6d: + x86emuOp_ins_word(emu); + break; + case 0x6e: + outs(emu, 1); + break; + case 0x6f: + x86emuOp_outs_word(emu); + break; + + case 0x70: + common_jmp_near(emu, ACCESS_FLAG(F_OF)); + break; + case 0x71: + common_jmp_near(emu, !ACCESS_FLAG(F_OF)); + break; + case 0x72: + common_jmp_near(emu, ACCESS_FLAG(F_CF)); + break; + case 0x73: + common_jmp_near(emu, !ACCESS_FLAG(F_CF)); + break; + case 0x74: + common_jmp_near(emu, ACCESS_FLAG(F_ZF)); + break; + case 0x75: + common_jmp_near(emu, !ACCESS_FLAG(F_ZF)); + break; + case 0x76: + common_jmp_near(emu, ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); + break; + case 0x77: + common_jmp_near(emu, !ACCESS_FLAG(F_CF) && !ACCESS_FLAG(F_ZF)); + break; + + case 0x78: + common_jmp_near(emu, ACCESS_FLAG(F_SF)); + break; + case 0x79: + common_jmp_near(emu, !ACCESS_FLAG(F_SF)); + break; + case 0x7a: + common_jmp_near(emu, ACCESS_FLAG(F_PF)); + break; + case 0x7b: + common_jmp_near(emu, !ACCESS_FLAG(F_PF)); + break; + case 0x7c: + x86emuOp_jump_near_L(emu); + break; + case 0x7d: + x86emuOp_jump_near_NL(emu); + break; + case 0x7e: + x86emuOp_jump_near_LE(emu); + break; + case 0x7f: + x86emuOp_jump_near_NLE(emu); + break; + + case 0x80: + x86emuOp_opc80_byte_RM_IMM(emu); + break; + case 0x81: + x86emuOp_opc81_word_RM_IMM(emu); + break; + case 0x82: + x86emuOp_opc82_byte_RM_IMM(emu); + break; + case 0x83: + x86emuOp_opc83_word_RM_IMM(emu); + break; + case 0x84: + common_binop_ns_byte_rm_r(emu, test_byte); + break; + case 0x85: + common_binop_ns_word_long_rm_r(emu, test_word, test_long); + break; + case 0x86: + x86emuOp_xchg_byte_RM_R(emu); + break; + case 0x87: + x86emuOp_xchg_word_RM_R(emu); + break; + + case 0x88: + x86emuOp_mov_byte_RM_R(emu); + break; + case 0x89: + x86emuOp_mov_word_RM_R(emu); + break; + case 0x8a: + x86emuOp_mov_byte_R_RM(emu); + break; + case 0x8b: + x86emuOp_mov_word_R_RM(emu); + break; + case 0x8c: + x86emuOp_mov_word_RM_SR(emu); + break; + case 0x8d: + x86emuOp_lea_word_R_M(emu); + break; + case 0x8e: + x86emuOp_mov_word_SR_RM(emu); + break; + case 0x8f: + x86emuOp_pop_RM(emu); + break; + + case 0x90: + /* nop */ + break; + case 0x91: + x86emuOp_xchg_word_AX_CX(emu); + break; + case 0x92: + x86emuOp_xchg_word_AX_DX(emu); + break; + case 0x93: + x86emuOp_xchg_word_AX_BX(emu); + break; + case 0x94: + x86emuOp_xchg_word_AX_SP(emu); + break; + case 0x95: + x86emuOp_xchg_word_AX_BP(emu); + break; + case 0x96: + x86emuOp_xchg_word_AX_SI(emu); + break; + case 0x97: + x86emuOp_xchg_word_AX_DI(emu); + break; + + case 0x98: + x86emuOp_cbw(emu); + break; + case 0x99: + x86emuOp_cwd(emu); + break; + case 0x9a: + x86emuOp_call_far_IMM(emu); + break; + case 0x9b: + /* wait */ + break; + case 0x9c: + x86emuOp_pushf_word(emu); + break; + case 0x9d: + x86emuOp_popf_word(emu); + break; + case 0x9e: + x86emuOp_sahf(emu); + break; + case 0x9f: + x86emuOp_lahf(emu); + break; + + case 0xa0: + x86emuOp_mov_AL_M_IMM(emu); + break; + case 0xa1: + x86emuOp_mov_AX_M_IMM(emu); + break; + case 0xa2: + x86emuOp_mov_M_AL_IMM(emu); + break; + case 0xa3: + x86emuOp_mov_M_AX_IMM(emu); + break; + case 0xa4: + x86emuOp_movs_byte(emu); + break; + case 0xa5: + x86emuOp_movs_word(emu); + break; + case 0xa6: + x86emuOp_cmps_byte(emu); + break; + case 0xa7: + x86emuOp_cmps_word(emu); + break; + + case 0xa8: + test_byte(emu, emu->x86.R_AL, fetch_byte_imm(emu)); + break; + case 0xa9: + x86emuOp_test_AX_IMM(emu); + break; + case 0xaa: + x86emuOp_stos_byte(emu); + break; + case 0xab: + x86emuOp_stos_word(emu); + break; + case 0xac: + x86emuOp_lods_byte(emu); + break; + case 0xad: + x86emuOp_lods_word(emu); + break; + case 0xae: + x86emuOp_scas_byte(emu); + break; + case 0xaf: + x86emuOp_scas_word(emu); + break; + + case 0xb0: + emu->x86.R_AL = fetch_byte_imm(emu); + break; + case 0xb1: + emu->x86.R_CL = fetch_byte_imm(emu); + break; + case 0xb2: + emu->x86.R_DL = fetch_byte_imm(emu); + break; + case 0xb3: + emu->x86.R_BL = fetch_byte_imm(emu); + break; + case 0xb4: + emu->x86.R_AH = fetch_byte_imm(emu); + break; + case 0xb5: + emu->x86.R_CH = fetch_byte_imm(emu); + break; + case 0xb6: + emu->x86.R_DH = fetch_byte_imm(emu); + break; + case 0xb7: + emu->x86.R_BH = fetch_byte_imm(emu); + break; + + case 0xb8: + x86emuOp_mov_word_AX_IMM(emu); + break; + case 0xb9: + x86emuOp_mov_word_CX_IMM(emu); + break; + case 0xba: + x86emuOp_mov_word_DX_IMM(emu); + break; + case 0xbb: + x86emuOp_mov_word_BX_IMM(emu); + break; + case 0xbc: + x86emuOp_mov_word_SP_IMM(emu); + break; + case 0xbd: + x86emuOp_mov_word_BP_IMM(emu); + break; + case 0xbe: + x86emuOp_mov_word_SI_IMM(emu); + break; + case 0xbf: + x86emuOp_mov_word_DI_IMM(emu); + break; + + case 0xc0: + x86emuOp_opcC0_byte_RM_MEM(emu); + break; + case 0xc1: + x86emuOp_opcC1_word_RM_MEM(emu); + break; + case 0xc2: + x86emuOp_ret_near_IMM(emu); + break; + case 0xc3: + emu->x86.R_IP = pop_word(emu); + break; + case 0xc4: + common_load_far_pointer(emu, &emu->x86.R_ES); + break; + case 0xc5: + common_load_far_pointer(emu, &emu->x86.R_DS); + break; + case 0xc6: + x86emuOp_mov_byte_RM_IMM(emu); + break; + case 0xc7: + x86emuOp_mov_word_RM_IMM(emu); + break; + case 0xc8: + x86emuOp_enter(emu); + break; + case 0xc9: + x86emuOp_leave(emu); + break; + case 0xca: + x86emuOp_ret_far_IMM(emu); + break; + case 0xcb: + x86emuOp_ret_far(emu); + break; + case 0xcc: + x86emuOp_int3(emu); + break; + case 0xcd: + x86emuOp_int_IMM(emu); + break; + case 0xce: + x86emuOp_into(emu); + break; + case 0xcf: + x86emuOp_iret(emu); + break; + + case 0xd0: + x86emuOp_opcD0_byte_RM_1(emu); + break; + case 0xd1: + x86emuOp_opcD1_word_RM_1(emu); + break; + case 0xd2: + x86emuOp_opcD2_byte_RM_CL(emu); + break; + case 0xd3: + x86emuOp_opcD3_word_RM_CL(emu); + break; + case 0xd4: + x86emuOp_aam(emu); + break; + case 0xd5: + x86emuOp_aad(emu); + break; + /* 0xd6 Undocumented SETALC instruction */ + case 0xd7: + x86emuOp_xlat(emu); + break; + case 0xd8: + x86emuOp_esc_coprocess_d8(emu); + break; + case 0xd9: + x86emuOp_esc_coprocess_d9(emu); + break; + case 0xda: + x86emuOp_esc_coprocess_da(emu); + break; + case 0xdb: + x86emuOp_esc_coprocess_db(emu); + break; + case 0xdc: + x86emuOp_esc_coprocess_dc(emu); + break; + case 0xdd: + x86emuOp_esc_coprocess_dd(emu); + break; + case 0xde: + x86emuOp_esc_coprocess_de(emu); + break; + case 0xdf: + x86emuOp_esc_coprocess_df(emu); + break; + + case 0xe0: + x86emuOp_loopne(emu); + break; + case 0xe1: + x86emuOp_loope(emu); + break; + case 0xe2: + x86emuOp_loop(emu); + break; + case 0xe3: + x86emuOp_jcxz(emu); + break; + case 0xe4: + x86emuOp_in_byte_AL_IMM(emu); + break; + case 0xe5: + x86emuOp_in_word_AX_IMM(emu); + break; + case 0xe6: + x86emuOp_out_byte_IMM_AL(emu); + break; + case 0xe7: + x86emuOp_out_word_IMM_AX(emu); + break; + + case 0xe8: + x86emuOp_call_near_IMM(emu); + break; + case 0xe9: + x86emuOp_jump_near_IMM(emu); + break; + case 0xea: + x86emuOp_jump_far_IMM(emu); + break; + case 0xeb: + x86emuOp_jump_byte_IMM(emu); + break; + case 0xec: + x86emuOp_in_byte_AL_DX(emu); + break; + case 0xed: + x86emuOp_in_word_AX_DX(emu); + break; + case 0xee: + x86emuOp_out_byte_DX_AL(emu); + break; + case 0xef: + x86emuOp_out_word_DX_AX(emu); + break; + + case 0xf0: + x86emuOp_lock(emu); + break; + case 0xf2: + emu->x86.mode |= SYSMODE_PREFIX_REPNE; + break; + case 0xf3: + emu->x86.mode |= SYSMODE_PREFIX_REPE; + break; + case 0xf4: + X86EMU_halt_sys(emu); + break; + case 0xf5: + x86emuOp_cmc(emu); + break; + case 0xf6: + x86emuOp_opcF6_byte_RM(emu); + break; + case 0xf7: + x86emuOp_opcF7_word_RM(emu); + break; + + case 0xf8: + CLEAR_FLAG(F_CF); + break; + case 0xf9: + SET_FLAG(F_CF); + break; + case 0xfa: + CLEAR_FLAG(F_IF); + break; + case 0xfb: + SET_FLAG(F_IF); + break; + case 0xfc: + CLEAR_FLAG(F_DF); + break; + case 0xfd: + SET_FLAG(F_DF); + break; + case 0xfe: + x86emuOp_opcFE_byte_RM(emu); + break; + case 0xff: + x86emuOp_opcFF_word_RM(emu); + break; + default: + X86EMU_halt_sys(emu); + break; + } + if (op1 != 0x26 && op1 != 0x2e && op1 != 0x36 && op1 != 0x3e && + (op1 | 3) != 0x67) + emu->x86.mode &= ~SYSMODE_CLRMASK; +} + +static void +common_jmp_long(struct X86EMU *emu, bool cond) +{ + int16_t target; + + target = (int16_t) fetch_word_imm(emu); + target += (int16_t) emu->x86.R_IP; + if (cond) + emu->x86.R_IP = (uint16_t) target; +} + +static void +common_set_byte(struct X86EMU *emu, bool cond) +{ + uint32_t destoffset; + uint8_t *destreg, destval; + + fetch_decode_modrm(emu); + destval = cond ? 0x01 : 0x00; + if (emu->cur_mod != 3) { + destoffset = decode_rl_address(emu); + store_data_byte(emu, destoffset, destval); + } else { + destreg = decode_rl_byte_register(emu); + *destreg = destval; + } +} + +static void +common_bitstring32(struct X86EMU *emu, int op) +{ + int bit; + uint32_t srcval, *shiftreg, mask; + + fetch_decode_modrm(emu); + shiftreg = decode_rh_long_register(emu); + srcval = decode_and_fetch_long_disp(emu, (int16_t) *shiftreg >> 5); + bit = *shiftreg & 0x1F; + mask = 0x1 << bit; + CONDITIONAL_SET_FLAG(srcval & mask, F_CF); + + switch (op) { + case 0: + break; + case 1: + write_back_long(emu, srcval | mask); + break; + case 2: + write_back_long(emu, srcval & ~mask); + break; + case 3: + write_back_long(emu, srcval ^ mask); + break; + } +} + +static void +common_bitstring16(struct X86EMU *emu, int op) +{ + int bit; + uint16_t srcval, *shiftreg, mask; + + fetch_decode_modrm(emu); + shiftreg = decode_rh_word_register(emu); + srcval = decode_and_fetch_word_disp(emu, (int16_t) *shiftreg >> 4); + bit = *shiftreg & 0xF; + mask = 0x1 << bit; + CONDITIONAL_SET_FLAG(srcval & mask, F_CF); + + switch (op) { + case 0: + break; + case 1: + write_back_word(emu, srcval | mask); + break; + case 2: + write_back_word(emu, srcval & ~mask); + break; + case 3: + write_back_word(emu, srcval ^ mask); + break; + } +} + +static void +common_bitstring(struct X86EMU *emu, int op) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_bitstring32(emu, op); + else + common_bitstring16(emu, op); +} + +static void +common_bitsearch32(struct X86EMU *emu, int diff) +{ + uint32_t srcval, *dstreg; + + fetch_decode_modrm(emu); + dstreg = decode_rh_long_register(emu); + srcval = decode_and_fetch_long(emu); + CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); + for (*dstreg = 0; *dstreg < 32; *dstreg += diff) { + if ((srcval >> *dstreg) & 1) + break; + } +} + +static void +common_bitsearch16(struct X86EMU *emu, int diff) +{ + uint16_t srcval, *dstreg; + + fetch_decode_modrm(emu); + dstreg = decode_rh_word_register(emu); + srcval = decode_and_fetch_word(emu); + CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); + for (*dstreg = 0; *dstreg < 16; *dstreg += diff) { + if ((srcval >> *dstreg) & 1) + break; + } +} + +static void +common_bitsearch(struct X86EMU *emu, int diff) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_bitsearch32(emu, diff); + else + common_bitsearch16(emu, diff); +} + +static void +common_shift32(struct X86EMU *emu, bool shift_left, bool use_cl) +{ + uint8_t shift; + uint32_t destval, *shiftreg; + + fetch_decode_modrm(emu); + shiftreg = decode_rh_long_register(emu); + if (use_cl) { + destval = decode_and_fetch_long(emu); + shift = emu->x86.R_CL; + } else { + destval = decode_and_fetch_long_imm8(emu, &shift); + } + if (shift_left) + destval = shld_long(emu, destval, *shiftreg, shift); + else + destval = shrd_long(emu, destval, *shiftreg, shift); + write_back_long(emu, destval); +} + +static void +common_shift16(struct X86EMU *emu, bool shift_left, bool use_cl) +{ + uint8_t shift; + uint16_t destval, *shiftreg; + + fetch_decode_modrm(emu); + shiftreg = decode_rh_word_register(emu); + if (use_cl) { + destval = decode_and_fetch_word(emu); + shift = emu->x86.R_CL; + } else { + destval = decode_and_fetch_word_imm8(emu, &shift); + } + if (shift_left) + destval = shld_word(emu, destval, *shiftreg, shift); + else + destval = shrd_word(emu, destval, *shiftreg, shift); + write_back_word(emu, destval); +} + +static void +common_shift(struct X86EMU *emu, bool shift_left, bool use_cl) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + common_shift32(emu, shift_left, use_cl); + else + common_shift16(emu, shift_left, use_cl); +} + +/*----------------------------- Implementation ----------------------------*/ +#define xorl(a,b) ((a) && !(b)) || (!(a) && (b)) + +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0x31 +****************************************************************************/ +static void +x86emuOp2_rdtsc(struct X86EMU *emu) +{ + emu->x86.R_EAX = emu->cur_cycles & 0xffffffff; + emu->x86.R_EDX = emu->cur_cycles >> 32; +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa0 +****************************************************************************/ +static void +x86emuOp2_push_FS(struct X86EMU *emu) +{ + push_word(emu, emu->x86.R_FS); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa1 +****************************************************************************/ +static void +x86emuOp2_pop_FS(struct X86EMU *emu) +{ + emu->x86.R_FS = pop_word(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa1 +****************************************************************************/ +#if defined(__i386__) || defined(__amd64__) +static void +hw_cpuid(uint32_t *a, uint32_t *b, uint32_t *c, uint32_t *d) +{ + __asm__ __volatile__("cpuid" + : "=a" (*a), "=b" (*b), + "=c" (*c), "=d" (*d) + : "a" (*a), "c" (*c) + : "cc"); +} +#endif +static void +x86emuOp2_cpuid(struct X86EMU *emu) +{ +#if defined(__i386__) || defined(__amd64__) + hw_cpuid(&emu->x86.R_EAX, &emu->x86.R_EBX, &emu->x86.R_ECX, + &emu->x86.R_EDX); +#endif + switch (emu->x86.R_EAX) { + case 0: + emu->x86.R_EAX = 1; +#if !defined(__i386__) && !defined(__amd64__) + /* "GenuineIntel" */ + emu->x86.R_EBX = 0x756e6547; + emu->x86.R_EDX = 0x49656e69; + emu->x86.R_ECX = 0x6c65746e; +#endif + break; + case 1: +#if !defined(__i386__) && !defined(__amd64__) + emu->x86.R_EAX = 0x00000480; + emu->x86.R_EBX = emu->x86.R_ECX = 0; + emu->x86.R_EDX = 0x00000002; +#else + emu->x86.R_EDX &= 0x00000012; +#endif + break; + default: + emu->x86.R_EAX = emu->x86.R_EBX = emu->x86.R_ECX = + emu->x86.R_EDX = 0; + break; + } +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa3 +****************************************************************************/ +static void +x86emuOp2_bt_R(struct X86EMU *emu) +{ + common_bitstring(emu, 0); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa4 +****************************************************************************/ +static void +x86emuOp2_shld_IMM(struct X86EMU *emu) +{ + common_shift(emu, true, false); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa5 +****************************************************************************/ +static void +x86emuOp2_shld_CL(struct X86EMU *emu) +{ + common_shift(emu, true, true); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa8 +****************************************************************************/ +static void +x86emuOp2_push_GS(struct X86EMU *emu) +{ + push_word(emu, emu->x86.R_GS); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xa9 +****************************************************************************/ +static void +x86emuOp2_pop_GS(struct X86EMU *emu) +{ + emu->x86.R_GS = pop_word(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xab +****************************************************************************/ +static void +x86emuOp2_bts_R(struct X86EMU *emu) +{ + common_bitstring(emu, 1); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xac +****************************************************************************/ +static void +x86emuOp2_shrd_IMM(struct X86EMU *emu) +{ + common_shift(emu, false, false); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xad +****************************************************************************/ +static void +x86emuOp2_shrd_CL(struct X86EMU *emu) +{ + common_shift(emu, false, true); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xaf +****************************************************************************/ +static void +x86emuOp2_32_imul_R_RM(struct X86EMU *emu) +{ + uint32_t *destreg, srcval; + uint64_t res; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + srcval = decode_and_fetch_long(emu); + res = (int32_t) *destreg * (int32_t)srcval; + if (res > 0xffffffff) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (uint32_t) res; +} + +static void +x86emuOp2_16_imul_R_RM(struct X86EMU *emu) +{ + uint16_t *destreg, srcval; + uint32_t res; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + srcval = decode_and_fetch_word(emu); + res = (int16_t) * destreg * (int16_t)srcval; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (uint16_t) res; +} + +static void +x86emuOp2_imul_R_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp2_32_imul_R_RM(emu); + else + x86emuOp2_16_imul_R_RM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xb2 +****************************************************************************/ +static void +x86emuOp2_lss_R_IMM(struct X86EMU *emu) +{ + common_load_far_pointer(emu, &emu->x86.R_SS); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xb3 +****************************************************************************/ +static void +x86emuOp2_btr_R(struct X86EMU *emu) +{ + common_bitstring(emu, 2); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xb4 +****************************************************************************/ +static void +x86emuOp2_lfs_R_IMM(struct X86EMU *emu) +{ + common_load_far_pointer(emu, &emu->x86.R_FS); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xb5 +****************************************************************************/ +static void +x86emuOp2_lgs_R_IMM(struct X86EMU *emu) +{ + common_load_far_pointer(emu, &emu->x86.R_GS); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xb6 +****************************************************************************/ +static void +x86emuOp2_32_movzx_byte_R_RM(struct X86EMU *emu) +{ + uint32_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + *destreg = decode_and_fetch_byte(emu); +} + +static void +x86emuOp2_16_movzx_byte_R_RM(struct X86EMU *emu) +{ + uint16_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + *destreg = decode_and_fetch_byte(emu); +} + +static void +x86emuOp2_movzx_byte_R_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp2_32_movzx_byte_R_RM(emu); + else + x86emuOp2_16_movzx_byte_R_RM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xb7 +****************************************************************************/ +static void +x86emuOp2_movzx_word_R_RM(struct X86EMU *emu) +{ + uint32_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + *destreg = decode_and_fetch_word(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xba +****************************************************************************/ +static void +x86emuOp2_32_btX_I(struct X86EMU *emu) +{ + int bit; + uint32_t srcval, mask; + uint8_t shift; + + fetch_decode_modrm(emu); + if (emu->cur_rh < 4) + X86EMU_halt_sys(emu); + + srcval = decode_and_fetch_long_imm8(emu, &shift); + bit = shift & 0x1F; + mask = (0x1 << bit); + + switch (emu->cur_rh) { + case 5: + write_back_long(emu, srcval | mask); + break; + case 6: + write_back_long(emu, srcval & ~mask); + break; + case 7: + write_back_long(emu, srcval ^ mask); + break; + } + CONDITIONAL_SET_FLAG(srcval & mask, F_CF); +} + +static void +x86emuOp2_16_btX_I(struct X86EMU *emu) +{ + int bit; + + uint16_t srcval, mask; + uint8_t shift; + + fetch_decode_modrm(emu); + if (emu->cur_rh < 4) + X86EMU_halt_sys(emu); + + srcval = decode_and_fetch_word_imm8(emu, &shift); + bit = shift & 0xF; + mask = (0x1 << bit); + switch (emu->cur_rh) { + case 5: + write_back_word(emu, srcval | mask); + break; + case 6: + write_back_word(emu, srcval & ~mask); + break; + case 7: + write_back_word(emu, srcval ^ mask); + break; + } + CONDITIONAL_SET_FLAG(srcval & mask, F_CF); +} + +static void +x86emuOp2_btX_I(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp2_32_btX_I(emu); + else + x86emuOp2_16_btX_I(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xbb +****************************************************************************/ +static void +x86emuOp2_btc_R(struct X86EMU *emu) +{ + common_bitstring(emu, 3); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xbc +****************************************************************************/ +static void +x86emuOp2_bsf(struct X86EMU *emu) +{ + common_bitsearch(emu, +1); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xbd +****************************************************************************/ +static void +x86emuOp2_bsr(struct X86EMU *emu) +{ + common_bitsearch(emu, -1); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xbe +****************************************************************************/ +static void +x86emuOp2_32_movsx_byte_R_RM(struct X86EMU *emu) +{ + uint32_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + *destreg = (int32_t)(int8_t)decode_and_fetch_byte(emu); +} + +static void +x86emuOp2_16_movsx_byte_R_RM(struct X86EMU *emu) +{ + uint16_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_word_register(emu); + *destreg = (int16_t)(int8_t)decode_and_fetch_byte(emu); +} + +static void +x86emuOp2_movsx_byte_R_RM(struct X86EMU *emu) +{ + if (emu->x86.mode & SYSMODE_PREFIX_DATA) + x86emuOp2_32_movsx_byte_R_RM(emu); + else + x86emuOp2_16_movsx_byte_R_RM(emu); +} +/**************************************************************************** +REMARKS: +Handles opcode 0x0f,0xbf +****************************************************************************/ +static void +x86emuOp2_movsx_word_R_RM(struct X86EMU *emu) +{ + uint32_t *destreg; + + fetch_decode_modrm(emu); + destreg = decode_rh_long_register(emu); + *destreg = (int32_t)(int16_t)decode_and_fetch_word(emu); +} + +static void +X86EMU_exec_two_byte(struct X86EMU * emu) +{ + uint8_t op2; + + op2 = fetch_byte_imm(emu); + + switch (op2) { + /* 0x00 Group F (ring 0 PM) */ + /* 0x01 Group G (ring 0 PM) */ + /* 0x02 lar (ring 0 PM) */ + /* 0x03 lsl (ring 0 PM) */ + /* 0x05 loadall (undocumented) */ + /* 0x06 clts (ring 0 PM) */ + /* 0x07 loadall (undocumented) */ + /* 0x08 invd (ring 0 PM) */ + /* 0x09 wbinvd (ring 0 PM) */ + + /* 0x20 mov reg32(op2); break;creg (ring 0 PM) */ + /* 0x21 mov reg32(op2); break;dreg (ring 0 PM) */ + /* 0x22 mov creg(op2); break;reg32 (ring 0 PM) */ + /* 0x23 mov dreg(op2); break;reg32 (ring 0 PM) */ + /* 0x24 mov reg32(op2); break;treg (ring 0 PM) */ + /* 0x26 mov treg(op2); break;reg32 (ring 0 PM) */ + + case 0x31: + x86emuOp2_rdtsc(emu); + break; + + case 0x80: + common_jmp_long(emu, ACCESS_FLAG(F_OF)); + break; + case 0x81: + common_jmp_long(emu, !ACCESS_FLAG(F_OF)); + break; + case 0x82: + common_jmp_long(emu, ACCESS_FLAG(F_CF)); + break; + case 0x83: + common_jmp_long(emu, !ACCESS_FLAG(F_CF)); + break; + case 0x84: + common_jmp_long(emu, ACCESS_FLAG(F_ZF)); + break; + case 0x85: + common_jmp_long(emu, !ACCESS_FLAG(F_ZF)); + break; + case 0x86: + common_jmp_long(emu, ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); + break; + case 0x87: + common_jmp_long(emu, !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF))); + break; + case 0x88: + common_jmp_long(emu, ACCESS_FLAG(F_SF)); + break; + case 0x89: + common_jmp_long(emu, !ACCESS_FLAG(F_SF)); + break; + case 0x8a: + common_jmp_long(emu, ACCESS_FLAG(F_PF)); + break; + case 0x8b: + common_jmp_long(emu, !ACCESS_FLAG(F_PF)); + break; + case 0x8c: + common_jmp_long(emu, xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF))); + break; + case 0x8d: + common_jmp_long(emu, !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)))); + break; + case 0x8e: + common_jmp_long(emu, + (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || ACCESS_FLAG(F_ZF))); + break; + case 0x8f: + common_jmp_long(emu, + !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || ACCESS_FLAG(F_ZF))); + break; + + case 0x90: + common_set_byte(emu, ACCESS_FLAG(F_OF)); + break; + case 0x91: + common_set_byte(emu, !ACCESS_FLAG(F_OF)); + break; + case 0x92: + common_set_byte(emu, ACCESS_FLAG(F_CF)); + break; + case 0x93: + common_set_byte(emu, !ACCESS_FLAG(F_CF)); + break; + case 0x94: + common_set_byte(emu, ACCESS_FLAG(F_ZF)); + break; + case 0x95: + common_set_byte(emu, !ACCESS_FLAG(F_ZF)); + break; + case 0x96: + common_set_byte(emu, ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); + break; + case 0x97: + common_set_byte(emu, !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF))); + break; + case 0x98: + common_set_byte(emu, ACCESS_FLAG(F_SF)); + break; + case 0x99: + common_set_byte(emu, !ACCESS_FLAG(F_SF)); + break; + case 0x9a: + common_set_byte(emu, ACCESS_FLAG(F_PF)); + break; + case 0x9b: + common_set_byte(emu, !ACCESS_FLAG(F_PF)); + break; + case 0x9c: + common_set_byte(emu, xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF))); + break; + case 0x9d: + common_set_byte(emu, xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF))); + break; + case 0x9e: + common_set_byte(emu, + (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || + ACCESS_FLAG(F_ZF))); + break; + case 0x9f: + common_set_byte(emu, + !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || + ACCESS_FLAG(F_ZF))); + break; + + case 0xa0: + x86emuOp2_push_FS(emu); + break; + case 0xa1: + x86emuOp2_pop_FS(emu); + break; + case 0xa2: + x86emuOp2_cpuid(emu); + break; + case 0xa3: + x86emuOp2_bt_R(emu); + break; + case 0xa4: + x86emuOp2_shld_IMM(emu); + break; + case 0xa5: + x86emuOp2_shld_CL(emu); + break; + case 0xa8: + x86emuOp2_push_GS(emu); + break; + case 0xa9: + x86emuOp2_pop_GS(emu); + break; + case 0xab: + x86emuOp2_bts_R(emu); + break; + case 0xac: + x86emuOp2_shrd_IMM(emu); + break; + case 0xad: + x86emuOp2_shrd_CL(emu); + break; + case 0xaf: + x86emuOp2_imul_R_RM(emu); + break; + + /* 0xb0 TODO: cmpxchg */ + /* 0xb1 TODO: cmpxchg */ + case 0xb2: + x86emuOp2_lss_R_IMM(emu); + break; + case 0xb3: + x86emuOp2_btr_R(emu); + break; + case 0xb4: + x86emuOp2_lfs_R_IMM(emu); + break; + case 0xb5: + x86emuOp2_lgs_R_IMM(emu); + break; + case 0xb6: + x86emuOp2_movzx_byte_R_RM(emu); + break; + case 0xb7: + x86emuOp2_movzx_word_R_RM(emu); + break; + case 0xba: + x86emuOp2_btX_I(emu); + break; + case 0xbb: + x86emuOp2_btc_R(emu); + break; + case 0xbc: + x86emuOp2_bsf(emu); + break; + case 0xbd: + x86emuOp2_bsr(emu); + break; + case 0xbe: + x86emuOp2_movsx_byte_R_RM(emu); + break; + case 0xbf: + x86emuOp2_movsx_word_R_RM(emu); + break; + + /* 0xc0 TODO: xadd */ + /* 0xc1 TODO: xadd */ + /* 0xc8 TODO: bswap */ + /* 0xc9 TODO: bswap */ + /* 0xca TODO: bswap */ + /* 0xcb TODO: bswap */ + /* 0xcc TODO: bswap */ + /* 0xcd TODO: bswap */ + /* 0xce TODO: bswap */ + /* 0xcf TODO: bswap */ + + default: + X86EMU_halt_sys(emu); + break; + } +} + +/* +* Carry Chain Calculation +* +* This represents a somewhat expensive calculation which is +* apparently required to emulate the setting of the OF and AF flag. +* The latter is not so important, but the former is. The overflow +* flag is the XOR of the top two bits of the carry chain for an +* addition (similar for subtraction). Since we do not want to +* simulate the addition in a bitwise manner, we try to calculate the +* carry chain given the two operands and the result. +* +* So, given the following table, which represents the addition of two +* bits, we can derive a formula for the carry chain. +* +* a b cin r cout +* 0 0 0 0 0 +* 0 0 1 1 0 +* 0 1 0 1 0 +* 0 1 1 0 1 +* 1 0 0 1 0 +* 1 0 1 0 1 +* 1 1 0 0 1 +* 1 1 1 1 1 +* +* Construction of table for cout: +* +* ab +* r \ 00 01 11 10 +* |------------------ +* 0 | 0 1 1 1 +* 1 | 0 0 1 0 +* +* By inspection, one gets: cc = ab + r'(a + b) +* +* That represents alot of operations, but NO CHOICE.... +* +* Borrow Chain Calculation. +* +* The following table represents the subtraction of two bits, from +* which we can derive a formula for the borrow chain. +* +* a b bin r bout +* 0 0 0 0 0 +* 0 0 1 1 1 +* 0 1 0 1 1 +* 0 1 1 0 1 +* 1 0 0 1 0 +* 1 0 1 0 0 +* 1 1 0 0 0 +* 1 1 1 1 1 +* +* Construction of table for cout: +* +* ab +* r \ 00 01 11 10 +* |------------------ +* 0 | 0 1 0 0 +* 1 | 1 1 1 0 +* +* By inspection, one gets: bc = a'b + r(a' + b) +* +****************************************************************************/ + +/*------------------------- Global Variables ------------------------------*/ + +static uint32_t x86emu_parity_tab[8] = +{ + 0x96696996, + 0x69969669, + 0x69969669, + 0x96696996, + 0x69969669, + 0x96696996, + 0x96696996, + 0x69969669, +}; +#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0) +#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1) + +/**************************************************************************** +REMARKS: +Implements the AAA instruction and side effects. +****************************************************************************/ +static uint16_t +aaa_word(struct X86EMU *emu, uint16_t d) +{ + uint16_t res; + if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) { + d += 0x6; + d += 0x100; + SET_FLAG(F_AF); + SET_FLAG(F_CF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + } + res = (uint16_t) (d & 0xFF0F); + CLEAR_FLAG(F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the AAA instruction and side effects. +****************************************************************************/ +static uint16_t +aas_word(struct X86EMU *emu, uint16_t d) +{ + uint16_t res; + if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) { + d -= 0x6; + d -= 0x100; + SET_FLAG(F_AF); + SET_FLAG(F_CF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + } + res = (uint16_t) (d & 0xFF0F); + CLEAR_FLAG(F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the AAD instruction and side effects. +****************************************************************************/ +static uint16_t +aad_word(struct X86EMU *emu, uint16_t d) +{ + uint16_t l; + uint8_t hb, lb; + + hb = (uint8_t) ((d >> 8) & 0xff); + lb = (uint8_t) ((d & 0xff)); + l = (uint16_t) ((lb + 10 * hb) & 0xFF); + + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(l & 0x80, F_SF); + CONDITIONAL_SET_FLAG(l == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF); + return l; +} +/**************************************************************************** +REMARKS: +Implements the AAM instruction and side effects. +****************************************************************************/ +static uint16_t +aam_word(struct X86EMU *emu, uint8_t d) +{ + uint16_t h, l; + + h = (uint16_t) (d / 10); + l = (uint16_t) (d % 10); + l |= (uint16_t) (h << 8); + + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(l & 0x80, F_SF); + CONDITIONAL_SET_FLAG(l == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF); + return l; +} +/**************************************************************************** +REMARKS: +Implements the ADC instruction and side effects. +****************************************************************************/ +static uint8_t +adc_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + if (ACCESS_FLAG(F_CF)) + res = 1 + d + s; + else + res = d + s; + + CONDITIONAL_SET_FLAG(res & 0x100, F_CF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (s & d) | ((~res) & (s | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ADC instruction and side effects. +****************************************************************************/ +static uint16_t +adc_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + if (ACCESS_FLAG(F_CF)) + res = 1 + d + s; + else + res = d + s; + + CONDITIONAL_SET_FLAG(res & 0x10000, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (s & d) | ((~res) & (s | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ADC instruction and side effects. +****************************************************************************/ +static uint32_t +adc_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t lo; /* all operands in native machine order */ + uint32_t hi; + uint32_t res; + uint32_t cc; + + if (ACCESS_FLAG(F_CF)) { + lo = 1 + (d & 0xFFFF) + (s & 0xFFFF); + res = 1 + d + s; + } else { + lo = (d & 0xFFFF) + (s & 0xFFFF); + res = d + s; + } + hi = (lo >> 16) + (d >> 16) + (s >> 16); + + CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (s & d) | ((~res) & (s | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the ADD instruction and side effects. +****************************************************************************/ +static uint8_t +add_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + res = d + s; + CONDITIONAL_SET_FLAG(res & 0x100, F_CF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (s & d) | ((~res) & (s | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ADD instruction and side effects. +****************************************************************************/ +static uint16_t +add_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + res = d + s; + CONDITIONAL_SET_FLAG(res & 0x10000, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (s & d) | ((~res) & (s | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ADD instruction and side effects. +****************************************************************************/ +static uint32_t +add_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t lo; /* all operands in native machine order */ + uint32_t hi; + uint32_t res; + uint32_t cc; + + lo = (d & 0xFFFF) + (s & 0xFFFF); + res = d + s; + hi = (lo >> 16) + (d >> 16) + (s >> 16); + + CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (s & d) | ((~res) & (s | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + + return res; +} +/**************************************************************************** +REMARKS: +Implements the AND instruction and side effects. +****************************************************************************/ +static uint8_t +and_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint8_t res; /* all operands in native machine order */ + + res = d & s; + + /* set the flags */ + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the AND instruction and side effects. +****************************************************************************/ +static uint16_t +and_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint16_t res; /* all operands in native machine order */ + + res = d & s; + + /* set the flags */ + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the AND instruction and side effects. +****************************************************************************/ +static uint32_t +and_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + + res = d & s; + + /* set the flags */ + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the CMP instruction and side effects. +****************************************************************************/ +static uint8_t +cmp_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - s; + CLEAR_FLAG(F_CF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return d; +} + +static void +cmp_byte_no_return(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + cmp_byte(emu, d, s); +} +/**************************************************************************** +REMARKS: +Implements the CMP instruction and side effects. +****************************************************************************/ +static uint16_t +cmp_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return d; +} + +static void +cmp_word_no_return(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + cmp_word(emu, d, s); +} +/**************************************************************************** +REMARKS: +Implements the CMP instruction and side effects. +****************************************************************************/ +static uint32_t +cmp_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return d; +} + +static void +cmp_long_no_return(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + cmp_long(emu, d, s); +} +/**************************************************************************** +REMARKS: +Implements the DAA instruction and side effects. +****************************************************************************/ +static uint8_t +daa_byte(struct X86EMU *emu, uint8_t d) +{ + uint32_t res = d; + if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) { + res += 6; + SET_FLAG(F_AF); + } + if (res > 0x9F || ACCESS_FLAG(F_CF)) { + res += 0x60; + SET_FLAG(F_CF); + } + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG((res & 0xFF) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the DAS instruction and side effects. +****************************************************************************/ +static uint8_t +das_byte(struct X86EMU *emu, uint8_t d) +{ + if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) { + d -= 6; + SET_FLAG(F_AF); + } + if (d > 0x9F || ACCESS_FLAG(F_CF)) { + d -= 0x60; + SET_FLAG(F_CF); + } + CONDITIONAL_SET_FLAG(d & 0x80, F_SF); + CONDITIONAL_SET_FLAG(d == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(d & 0xff), F_PF); + return d; +} +/**************************************************************************** +REMARKS: +Implements the DEC instruction and side effects. +****************************************************************************/ +static uint8_t +dec_byte(struct X86EMU *emu, uint8_t d) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - 1; + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + /* based on sub_byte, uses s==1. */ + bc = (res & (~d | 1)) | (~d & 1); + /* carry flag unchanged */ + CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the DEC instruction and side effects. +****************************************************************************/ +static uint16_t +dec_word(struct X86EMU *emu, uint16_t d) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - 1; + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + /* based on the sub_byte routine, with s==1 */ + bc = (res & (~d | 1)) | (~d & 1); + /* carry flag unchanged */ + CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the DEC instruction and side effects. +****************************************************************************/ +static uint32_t +dec_long(struct X86EMU *emu, uint32_t d) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - 1; + + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | 1)) | (~d & 1); + /* carry flag unchanged */ + CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the INC instruction and side effects. +****************************************************************************/ +static uint8_t +inc_byte(struct X86EMU *emu, uint8_t d) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + res = d + 1; + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = ((1 & d) | (~res)) & (1 | d); + CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the INC instruction and side effects. +****************************************************************************/ +static uint16_t +inc_word(struct X86EMU *emu, uint16_t d) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + res = d + 1; + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (1 & d) | ((~res) & (1 | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the INC instruction and side effects. +****************************************************************************/ +static uint32_t +inc_long(struct X86EMU *emu, uint32_t d) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t cc; + + res = d + 1; + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the carry chain SEE NOTE AT TOP. */ + cc = (1 & d) | ((~res) & (1 | d)); + CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF); + CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the OR instruction and side effects. +****************************************************************************/ +static uint8_t +or_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint8_t res; /* all operands in native machine order */ + + res = d | s; + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the OR instruction and side effects. +****************************************************************************/ +static uint16_t +or_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint16_t res; /* all operands in native machine order */ + + res = d | s; + /* set the carry flag to be bit 8 */ + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the OR instruction and side effects. +****************************************************************************/ +static uint32_t +or_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + + res = d | s; + + /* set the carry flag to be bit 8 */ + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the OR instruction and side effects. +****************************************************************************/ +static uint8_t +neg_byte(struct X86EMU *emu, uint8_t s) +{ + uint8_t res; + uint8_t bc; + + CONDITIONAL_SET_FLAG(s != 0, F_CF); + res = (uint8_t) - s; + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res), F_PF); + /* calculate the borrow chain --- modified such that d=0. + * substitutiing d=0 into bc= res&(~d|s)|(~d&s); (the one used for + * sub) and simplifying, since ~d=0xff..., ~d|s == 0xffff..., and + * res&0xfff... == res. Similarly ~d&s == s. So the simplified + * result is: */ + bc = res | s; + CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the OR instruction and side effects. +****************************************************************************/ +static uint16_t +neg_word(struct X86EMU *emu, uint16_t s) +{ + uint16_t res; + uint16_t bc; + + CONDITIONAL_SET_FLAG(s != 0, F_CF); + res = (uint16_t) - s; + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain --- modified such that d=0. + * substitutiing d=0 into bc= res&(~d|s)|(~d&s); (the one used for + * sub) and simplifying, since ~d=0xff..., ~d|s == 0xffff..., and + * res&0xfff... == res. Similarly ~d&s == s. So the simplified + * result is: */ + bc = res | s; + CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the OR instruction and side effects. +****************************************************************************/ +static uint32_t +neg_long(struct X86EMU *emu, uint32_t s) +{ + uint32_t res; + uint32_t bc; + + CONDITIONAL_SET_FLAG(s != 0, F_CF); + res = (uint32_t) - s; + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain --- modified such that d=0. + * substitutiing d=0 into bc= res&(~d|s)|(~d&s); (the one used for + * sub) and simplifying, since ~d=0xff..., ~d|s == 0xffff..., and + * res&0xfff... == res. Similarly ~d&s == s. So the simplified + * result is: */ + bc = res | s; + CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the RCL instruction and side effects. +****************************************************************************/ +static uint8_t +rcl_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + unsigned int res, cnt, mask, cf; + + /* s is the rotate distance. It varies from 0 - 8. */ + /* have + * + * CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 + * + * want to rotate through the carry by "s" bits. We could loop, but + * that's inefficient. So the width is 9, and we split into three + * parts: + * + * The new carry flag (was B_n) the stuff in B_n-1 .. B_0 the stuff in + * B_7 .. B_n+1 + * + * The new rotate is done mod 9, and given this, for a rotation of n bits + * (mod 9) the new carry flag is then located n bits from the MSB. + * The low part is then shifted up cnt bits, and the high part is or'd + * in. Using CAPS for new values, and lowercase for the original + * values, this can be expressed as: + * + * IF n > 0 1) CF <- b_(8-n) 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 + * 3) B_(n-1) <- cf 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */ + res = d; + if ((cnt = s % 9) != 0) { + /* extract the new CARRY FLAG. */ + /* CF <- b_(8-n) */ + cf = (d >> (8 - cnt)) & 0x1; + + /* get the low stuff which rotated into the range B_7 .. B_cnt */ + /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */ + /* note that the right hand side done by the mask */ + res = (d << cnt) & 0xff; + + /* now the high stuff which rotated around into the positions + * B_cnt-2 .. B_0 */ + /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */ + /* shift it downward, 7-(n-2) = 9-n positions. and mask off + * the result before or'ing in. */ + mask = (1 << (cnt - 1)) - 1; + res |= (d >> (9 - cnt)) & mask; + + /* if the carry flag was set, or it in. */ + if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ + /* B_(n-1) <- cf */ + res |= 1 << (cnt - 1); + } + /* set the new carry flag, based on the variable "cf" */ + CONDITIONAL_SET_FLAG(cf, F_CF); + /* OVERFLOW is set *IFF* cnt==1, then it is the xor of CF and + * the most significant bit. Blecck. */ + /* parenthesized this expression since it appears to be + * causing OF to be misset */ + CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)), + F_OF); + + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the RCL instruction and side effects. +****************************************************************************/ +static uint16_t +rcl_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + unsigned int res, cnt, mask, cf; + + res = d; + if ((cnt = s % 17) != 0) { + cf = (d >> (16 - cnt)) & 0x1; + res = (d << cnt) & 0xffff; + mask = (1 << (cnt - 1)) - 1; + res |= (d >> (17 - cnt)) & mask; + if (ACCESS_FLAG(F_CF)) { + res |= 1 << (cnt - 1); + } + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)), + F_OF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the RCL instruction and side effects. +****************************************************************************/ +static uint32_t +rcl_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + uint32_t res, cnt, mask, cf; + + res = d; + if ((cnt = s % 33) != 0) { + cf = (d >> (32 - cnt)) & 0x1; + res = (d << cnt) & 0xffffffff; + mask = (1 << (cnt - 1)) - 1; + res |= (d >> (33 - cnt)) & mask; + if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ + res |= 1 << (cnt - 1); + } + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)), + F_OF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the RCR instruction and side effects. +****************************************************************************/ +static uint8_t +rcr_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res, cnt; + uint32_t mask, cf, ocf = 0; + + /* rotate right through carry */ + /* s is the rotate distance. It varies from 0 - 8. d is the byte + * object rotated. + * + * have + * + * CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 + * + * The new rotate is done mod 9, and given this, for a rotation of n bits + * (mod 9) the new carry flag is then located n bits from the LSB. + * The low part is then shifted up cnt bits, and the high part is or'd + * in. Using CAPS for new values, and lowercase for the original + * values, this can be expressed as: + * + * IF n > 0 1) CF <- b_(n-1) 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) + * 3) B_(8-n) <- cf 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */ + res = d; + if ((cnt = s % 9) != 0) { + /* extract the new CARRY FLAG. */ + /* CF <- b_(n-1) */ + if (cnt == 1) { + cf = d & 0x1; + /* note hackery here. Access_flag(..) evaluates to + * either 0 if flag not set non-zero if flag is set. + * doing access_flag(..) != 0 casts that into either + * 0..1 in any representation of the flags register + * (i.e. packed bit array or unpacked.) */ + ocf = ACCESS_FLAG(F_CF) != 0; + } else + cf = (d >> (cnt - 1)) & 0x1; + + /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */ + /* note that the right hand side done by the mask This is + * effectively done by shifting the object to the right. The + * result must be masked, in case the object came in and was + * treated as a negative number. Needed??? */ + + mask = (1 << (8 - cnt)) - 1; + res = (d >> cnt) & mask; + + /* now the high stuff which rotated around into the positions + * B_cnt-2 .. B_0 */ + /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */ + /* shift it downward, 7-(n-2) = 9-n positions. and mask off + * the result before or'ing in. */ + res |= (d << (9 - cnt)); + + /* if the carry flag was set, or it in. */ + if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ + /* B_(8-n) <- cf */ + res |= 1 << (8 - cnt); + } + /* set the new carry flag, based on the variable "cf" */ + CONDITIONAL_SET_FLAG(cf, F_CF); + /* OVERFLOW is set *IFF* cnt==1, then it is the xor of CF and + * the most significant bit. Blecck. */ + /* parenthesized... */ + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)), + F_OF); + } + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the RCR instruction and side effects. +****************************************************************************/ +static uint16_t +rcr_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + uint32_t res, cnt; + uint32_t mask, cf, ocf = 0; + + /* rotate right through carry */ + res = d; + if ((cnt = s % 17) != 0) { + if (cnt == 1) { + cf = d & 0x1; + ocf = ACCESS_FLAG(F_CF) != 0; + } else + cf = (d >> (cnt - 1)) & 0x1; + mask = (1 << (16 - cnt)) - 1; + res = (d >> cnt) & mask; + res |= (d << (17 - cnt)); + if (ACCESS_FLAG(F_CF)) { + res |= 1 << (16 - cnt); + } + CONDITIONAL_SET_FLAG(cf, F_CF); + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)), + F_OF); + } + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the RCR instruction and side effects. +****************************************************************************/ +static uint32_t +rcr_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + uint32_t res, cnt; + uint32_t mask, cf, ocf = 0; + + /* rotate right through carry */ + res = d; + if ((cnt = s % 33) != 0) { + if (cnt == 1) { + cf = d & 0x1; + ocf = ACCESS_FLAG(F_CF) != 0; + } else + cf = (d >> (cnt - 1)) & 0x1; + mask = (1 << (32 - cnt)) - 1; + res = (d >> cnt) & mask; + if (cnt != 1) + res |= (d << (33 - cnt)); + if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ + res |= 1 << (32 - cnt); + } + CONDITIONAL_SET_FLAG(cf, F_CF); + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)), + F_OF); + } + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the ROL instruction and side effects. +****************************************************************************/ +static uint8_t +rol_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + unsigned int res, cnt, mask; + + /* rotate left */ + /* s is the rotate distance. It varies from 0 - 8. d is the byte + * object rotated. + * + * have + * + * CF B_7 ... B_0 + * + * The new rotate is done mod 8. Much simpler than the "rcl" or "rcr" + * operations. + * + * IF n > 0 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) 2) B_(n-1) .. + * B_(0) <- b_(7) .. b_(8-n) */ + res = d; + if ((cnt = s % 8) != 0) { + /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */ + res = (d << cnt); + + /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */ + mask = (1 << cnt) - 1; + res |= (d >> (8 - cnt)) & mask; + + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x1, F_CF); + /* OVERFLOW is set *IFF* s==1, then it is the xor of CF and + * the most significant bit. Blecck. */ + CONDITIONAL_SET_FLAG(s == 1 && + XOR2((res & 0x1) + ((res >> 6) & 0x2)), + F_OF); + } if (s != 0) { + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x1, F_CF); + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ROL instruction and side effects. +****************************************************************************/ +static uint16_t +rol_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + unsigned int res, cnt, mask; + + res = d; + if ((cnt = s % 16) != 0) { + res = (d << cnt); + mask = (1 << cnt) - 1; + res |= (d >> (16 - cnt)) & mask; + CONDITIONAL_SET_FLAG(res & 0x1, F_CF); + CONDITIONAL_SET_FLAG(s == 1 && + XOR2((res & 0x1) + ((res >> 14) & 0x2)), + F_OF); + } if (s != 0) { + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x1, F_CF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ROL instruction and side effects. +****************************************************************************/ +static uint32_t +rol_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + uint32_t res, cnt, mask; + + res = d; + if ((cnt = s % 32) != 0) { + res = (d << cnt); + mask = (1 << cnt) - 1; + res |= (d >> (32 - cnt)) & mask; + CONDITIONAL_SET_FLAG(res & 0x1, F_CF); + CONDITIONAL_SET_FLAG(s == 1 && + XOR2((res & 0x1) + ((res >> 30) & 0x2)), + F_OF); + } if (s != 0) { + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x1, F_CF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the ROR instruction and side effects. +****************************************************************************/ +static uint8_t +ror_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + unsigned int res, cnt, mask; + + /* rotate right */ + /* s is the rotate distance. It varies from 0 - 8. d is the byte + * object rotated. + * + * have + * + * B_7 ... B_0 + * + * The rotate is done mod 8. + * + * IF n > 0 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) 2) B_(7) .. + * B_(8-n) <- b_(n-1) .. b_(0) */ + res = d; + if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */ + /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */ + res = (d << (8 - cnt)); + + /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */ + mask = (1 << (8 - cnt)) - 1; + res |= (d >> (cnt)) & mask; + + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x80, F_CF); + /* OVERFLOW is set *IFF* s==1, then it is the xor of the two + * most significant bits. Blecck. */ + CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF); + } else if (s != 0) { + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x80, F_CF); + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ROR instruction and side effects. +****************************************************************************/ +static uint16_t +ror_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + unsigned int res, cnt, mask; + + res = d; + if ((cnt = s % 16) != 0) { + res = (d << (16 - cnt)); + mask = (1 << (16 - cnt)) - 1; + res |= (d >> (cnt)) & mask; + CONDITIONAL_SET_FLAG(res & 0x8000, F_CF); + CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF); + } else if (s != 0) { + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x8000, F_CF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the ROR instruction and side effects. +****************************************************************************/ +static uint32_t +ror_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + uint32_t res, cnt, mask; + + res = d; + if ((cnt = s % 32) != 0) { + res = (d << (32 - cnt)); + mask = (1 << (32 - cnt)) - 1; + res |= (d >> (cnt)) & mask; + CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF); + CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF); + } else if (s != 0) { + /* set the new carry flag, Note that it is the low order bit + * of the result!!! */ + CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the SHL instruction and side effects. +****************************************************************************/ +static uint8_t +shl_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 8) { + cnt = s % 8; + + /* last bit shifted out goes into carry flag */ + if (cnt > 0) { + res = d << cnt; + cf = d & (1 << (8 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = (uint8_t) d; + } + + if (cnt == 1) { + /* Needs simplification. */ + CONDITIONAL_SET_FLAG( + (((res & 0x80) == 0x80) ^ + (ACCESS_FLAG(F_CF) != 0)), + /* was (emu->x86.R_FLG&F_CF)==F_CF)), */ + F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x80, F_CF); + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_PF); + SET_FLAG(F_ZF); + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SHL instruction and side effects. +****************************************************************************/ +static uint16_t +shl_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 16) { + cnt = s % 16; + if (cnt > 0) { + res = d << cnt; + cf = d & (1 << (16 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = (uint16_t) d; + } + + if (cnt == 1) { + CONDITIONAL_SET_FLAG( + (((res & 0x8000) == 0x8000) ^ + (ACCESS_FLAG(F_CF) != 0)), + F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x8000, F_CF); + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_PF); + SET_FLAG(F_ZF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SHL instruction and side effects. +****************************************************************************/ +static uint32_t +shl_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 32) { + cnt = s % 32; + if (cnt > 0) { + res = d << cnt; + cf = d & (1 << (32 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + if (cnt == 1) { + CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ + (ACCESS_FLAG(F_CF) != 0)), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x80000000, F_CF); + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_PF); + SET_FLAG(F_ZF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the SHR instruction and side effects. +****************************************************************************/ +static uint8_t +shr_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 8) { + cnt = s % 8; + if (cnt > 0) { + cf = d & (1 << (cnt - 1)); + res = d >> cnt; + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = (uint8_t) d; + } + + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CONDITIONAL_SET_FLAG((d >> (s - 1)) & 0x1, F_CF); + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_PF); + SET_FLAG(F_ZF); + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SHR instruction and side effects. +****************************************************************************/ +static uint16_t +shr_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 16) { + cnt = s % 16; + if (cnt > 0) { + cf = d & (1 << (cnt - 1)); + res = d >> cnt; + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SHR instruction and side effects. +****************************************************************************/ +static uint32_t +shr_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 32) { + cnt = s % 32; + if (cnt > 0) { + cf = d & (1 << (cnt - 1)); + res = d >> cnt; + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the SAR instruction and side effects. +****************************************************************************/ +static uint8_t +sar_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + unsigned int cnt, res, cf, mask, sf; + + res = d; + sf = d & 0x80; + cnt = s % 8; + if (cnt > 0 && cnt < 8) { + mask = (1 << (8 - cnt)) - 1; + cf = d & (1 << (cnt - 1)); + res = (d >> cnt) & mask; + CONDITIONAL_SET_FLAG(cf, F_CF); + if (sf) { + res |= ~mask; + } + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + } else if (cnt >= 8) { + if (sf) { + res = 0xff; + SET_FLAG(F_CF); + CLEAR_FLAG(F_ZF); + SET_FLAG(F_SF); + SET_FLAG(F_PF); + } else { + res = 0; + CLEAR_FLAG(F_CF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + } + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SAR instruction and side effects. +****************************************************************************/ +static uint16_t +sar_word(struct X86EMU *emu, uint16_t d, uint8_t s) +{ + unsigned int cnt, res, cf, mask, sf; + + sf = d & 0x8000; + cnt = s % 16; + res = d; + if (cnt > 0 && cnt < 16) { + mask = (1 << (16 - cnt)) - 1; + cf = d & (1 << (cnt - 1)); + res = (d >> cnt) & mask; + CONDITIONAL_SET_FLAG(cf, F_CF); + if (sf) { + res |= ~mask; + } + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else if (cnt >= 16) { + if (sf) { + res = 0xffff; + SET_FLAG(F_CF); + CLEAR_FLAG(F_ZF); + SET_FLAG(F_SF); + SET_FLAG(F_PF); + } else { + res = 0; + CLEAR_FLAG(F_CF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SAR instruction and side effects. +****************************************************************************/ +static uint32_t +sar_long(struct X86EMU *emu, uint32_t d, uint8_t s) +{ + uint32_t cnt, res, cf, mask, sf; + + sf = d & 0x80000000; + cnt = s % 32; + res = d; + if (cnt > 0 && cnt < 32) { + mask = (1 << (32 - cnt)) - 1; + cf = d & (1 << (cnt - 1)); + res = (d >> cnt) & mask; + CONDITIONAL_SET_FLAG(cf, F_CF); + if (sf) { + res |= ~mask; + } + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else if (cnt >= 32) { + if (sf) { + res = 0xffffffff; + SET_FLAG(F_CF); + CLEAR_FLAG(F_ZF); + SET_FLAG(F_SF); + SET_FLAG(F_PF); + } else { + res = 0; + CLEAR_FLAG(F_CF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the SHLD instruction and side effects. +****************************************************************************/ +static uint16_t +shld_word(struct X86EMU *emu, uint16_t d, uint16_t fill, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 16) { + cnt = s % 16; + if (cnt > 0) { + res = (d << cnt) | (fill >> (16 - cnt)); + cf = d & (1 << (16 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + if (cnt == 1) { + CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^ + (ACCESS_FLAG(F_CF) != 0)), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x8000, F_CF); + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_PF); + SET_FLAG(F_ZF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SHLD instruction and side effects. +****************************************************************************/ +static uint32_t +shld_long(struct X86EMU *emu, uint32_t d, uint32_t fill, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 32) { + cnt = s % 32; + if (cnt > 0) { + res = (d << cnt) | (fill >> (32 - cnt)); + cf = d & (1 << (32 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + if (cnt == 1) { + CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ + (ACCESS_FLAG(F_CF) != 0)), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CONDITIONAL_SET_FLAG((d << (s - 1)) & 0x80000000, F_CF); + CLEAR_FLAG(F_OF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_PF); + SET_FLAG(F_ZF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the SHRD instruction and side effects. +****************************************************************************/ +static uint16_t +shrd_word(struct X86EMU *emu, uint16_t d, uint16_t fill, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 16) { + cnt = s % 16; + if (cnt > 0) { + cf = d & (1 << (cnt - 1)); + res = (d >> cnt) | (fill << (16 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SHRD instruction and side effects. +****************************************************************************/ +static uint32_t +shrd_long(struct X86EMU *emu, uint32_t d, uint32_t fill, uint8_t s) +{ + unsigned int cnt, res, cf; + + if (s < 32) { + cnt = s % 32; + if (cnt > 0) { + cf = d & (1 << (cnt - 1)); + res = (d >> cnt) | (fill << (32 - cnt)); + CONDITIONAL_SET_FLAG(cf, F_CF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + } else { + res = d; + } + if (cnt == 1) { + CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); + } else { + CLEAR_FLAG(F_OF); + } + } else { + res = 0; + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + SET_FLAG(F_ZF); + CLEAR_FLAG(F_SF); + CLEAR_FLAG(F_PF); + } + return res; +} +/**************************************************************************** +REMARKS: +Implements the SBB instruction and side effects. +****************************************************************************/ +static uint8_t +sbb_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + if (ACCESS_FLAG(F_CF)) + res = d - s - 1; + else + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SBB instruction and side effects. +****************************************************************************/ +static uint16_t +sbb_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + if (ACCESS_FLAG(F_CF)) + res = d - s - 1; + else + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SBB instruction and side effects. +****************************************************************************/ +static uint32_t +sbb_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + if (ACCESS_FLAG(F_CF)) + res = d - s - 1; + else + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the SUB instruction and side effects. +****************************************************************************/ +static uint8_t +sub_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return (uint8_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SUB instruction and side effects. +****************************************************************************/ +static uint16_t +sub_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return (uint16_t) res; +} +/**************************************************************************** +REMARKS: +Implements the SUB instruction and side effects. +****************************************************************************/ +static uint32_t +sub_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + uint32_t bc; + + res = d - s; + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + + /* calculate the borrow chain. See note at top */ + bc = (res & (~d | s)) | (~d & s); + CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); + CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); + CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the TEST instruction and side effects. +****************************************************************************/ +static void +test_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint32_t res; /* all operands in native machine order */ + + res = d & s; + + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + /* AF == dont care */ + CLEAR_FLAG(F_CF); +} +/**************************************************************************** +REMARKS: +Implements the TEST instruction and side effects. +****************************************************************************/ +static void +test_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint32_t res; /* all operands in native machine order */ + + res = d & s; + + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + /* AF == dont care */ + CLEAR_FLAG(F_CF); +} +/**************************************************************************** +REMARKS: +Implements the TEST instruction and side effects. +****************************************************************************/ +static void +test_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + + res = d & s; + + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + /* AF == dont care */ + CLEAR_FLAG(F_CF); +} +/**************************************************************************** +REMARKS: +Implements the XOR instruction and side effects. +****************************************************************************/ +static uint8_t +xor_byte(struct X86EMU *emu, uint8_t d, uint8_t s) +{ + uint8_t res; /* all operands in native machine order */ + + res = d ^ s; + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(res & 0x80, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res), F_PF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the XOR instruction and side effects. +****************************************************************************/ +static uint16_t +xor_word(struct X86EMU *emu, uint16_t d, uint16_t s) +{ + uint16_t res; /* all operands in native machine order */ + + res = d ^ s; + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the XOR instruction and side effects. +****************************************************************************/ +static uint32_t +xor_long(struct X86EMU *emu, uint32_t d, uint32_t s) +{ + uint32_t res; /* all operands in native machine order */ + + res = d ^ s; + CLEAR_FLAG(F_OF); + CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); + CONDITIONAL_SET_FLAG(res == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + return res; +} +/**************************************************************************** +REMARKS: +Implements the IMUL instruction and side effects. +****************************************************************************/ +static void +imul_byte(struct X86EMU *emu, uint8_t s) +{ + int16_t res = (int16_t) ((int8_t) emu->x86.R_AL * (int8_t) s); + + emu->x86.R_AX = res; + if (((emu->x86.R_AL & 0x80) == 0 && emu->x86.R_AH == 0x00) || + ((emu->x86.R_AL & 0x80) != 0 && emu->x86.R_AH == 0xFF)) { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } else { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } +} +/**************************************************************************** +REMARKS: +Implements the IMUL instruction and side effects. +****************************************************************************/ +static void +imul_word(struct X86EMU *emu, uint16_t s) +{ + int32_t res = (int16_t) emu->x86.R_AX * (int16_t) s; + + emu->x86.R_AX = (uint16_t) res; + emu->x86.R_DX = (uint16_t) (res >> 16); + if (((emu->x86.R_AX & 0x8000) == 0 && emu->x86.R_DX == 0x00) || + ((emu->x86.R_AX & 0x8000) != 0 && emu->x86.R_DX == 0xFF)) { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } else { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } +} +/**************************************************************************** +REMARKS: +Implements the IMUL instruction and side effects. +****************************************************************************/ +static void +imul_long(struct X86EMU *emu, uint32_t s) +{ + int64_t res; + + res = (int64_t)(int32_t)emu->x86.R_EAX * (int32_t)s; + emu->x86.R_EAX = (uint32_t)res; + emu->x86.R_EDX = ((uint64_t)res) >> 32; + if (((emu->x86.R_EAX & 0x80000000) == 0 && emu->x86.R_EDX == 0x00) || + ((emu->x86.R_EAX & 0x80000000) != 0 && emu->x86.R_EDX == 0xFF)) { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } else { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } +} +/**************************************************************************** +REMARKS: +Implements the MUL instruction and side effects. +****************************************************************************/ +static void +mul_byte(struct X86EMU *emu, uint8_t s) +{ + uint16_t res = (uint16_t) (emu->x86.R_AL * s); + + emu->x86.R_AX = res; + if (emu->x86.R_AH == 0) { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } else { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } +} +/**************************************************************************** +REMARKS: +Implements the MUL instruction and side effects. +****************************************************************************/ +static void +mul_word(struct X86EMU *emu, uint16_t s) +{ + uint32_t res = emu->x86.R_AX * s; + + emu->x86.R_AX = (uint16_t) res; + emu->x86.R_DX = (uint16_t) (res >> 16); + if (emu->x86.R_DX == 0) { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } else { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } +} +/**************************************************************************** +REMARKS: +Implements the MUL instruction and side effects. +****************************************************************************/ +static void +mul_long(struct X86EMU *emu, uint32_t s) +{ + uint64_t res = (uint64_t) emu->x86.R_EAX * s; + + emu->x86.R_EAX = (uint32_t) res; + emu->x86.R_EDX = (uint32_t) (res >> 32); + + if (emu->x86.R_EDX == 0) { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } else { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } +} +/**************************************************************************** +REMARKS: +Implements the IDIV instruction and side effects. +****************************************************************************/ +static void +idiv_byte(struct X86EMU *emu, uint8_t s) +{ + int32_t dvd, div, mod; + + dvd = (int16_t) emu->x86.R_AX; + if (s == 0) { + x86emu_intr_raise(emu, 8); + return; + } + div = dvd / (int8_t) s; + mod = dvd % (int8_t) s; + if (div > 0x7f || div < -0x7f) { + x86emu_intr_raise(emu, 8); + return; + } + emu->x86.R_AL = (int8_t) div; + emu->x86.R_AH = (int8_t) mod; +} +/**************************************************************************** +REMARKS: +Implements the IDIV instruction and side effects. +****************************************************************************/ +static void +idiv_word(struct X86EMU *emu, uint16_t s) +{ + int32_t dvd, div, mod; + + dvd = (((int32_t) emu->x86.R_DX) << 16) | emu->x86.R_AX; + if (s == 0) { + x86emu_intr_raise(emu, 8); + return; + } + div = dvd / (int16_t) s; + mod = dvd % (int16_t) s; + if (div > 0x7fff || div < -0x7fff) { + x86emu_intr_raise(emu, 8); + return; + } + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_SF); + CONDITIONAL_SET_FLAG(div == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF); + + emu->x86.R_AX = (uint16_t) div; + emu->x86.R_DX = (uint16_t) mod; +} +/**************************************************************************** +REMARKS: +Implements the IDIV instruction and side effects. +****************************************************************************/ +static void +idiv_long(struct X86EMU *emu, uint32_t s) +{ + int64_t dvd, div, mod; + + dvd = (((int64_t) emu->x86.R_EDX) << 32) | emu->x86.R_EAX; + if (s == 0) { + x86emu_intr_raise(emu, 8); + return; + } + div = dvd / (int32_t) s; + mod = dvd % (int32_t) s; + if (div > 0x7fffffff || div < -0x7fffffff) { + x86emu_intr_raise(emu, 8); + return; + } + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_ZF); + CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF); + + emu->x86.R_EAX = (uint32_t) div; + emu->x86.R_EDX = (uint32_t) mod; +} +/**************************************************************************** +REMARKS: +Implements the DIV instruction and side effects. +****************************************************************************/ +static void +div_byte(struct X86EMU *emu, uint8_t s) +{ + uint32_t dvd, div, mod; + + dvd = emu->x86.R_AX; + if (s == 0) { + x86emu_intr_raise(emu, 8); + return; + } + div = dvd / (uint8_t) s; + mod = dvd % (uint8_t) s; + if (div > 0xff) { + x86emu_intr_raise(emu, 8); + return; + } + emu->x86.R_AL = (uint8_t) div; + emu->x86.R_AH = (uint8_t) mod; +} +/**************************************************************************** +REMARKS: +Implements the DIV instruction and side effects. +****************************************************************************/ +static void +div_word(struct X86EMU *emu, uint16_t s) +{ + uint32_t dvd, div, mod; + + dvd = (((uint32_t) emu->x86.R_DX) << 16) | emu->x86.R_AX; + if (s == 0) { + x86emu_intr_raise(emu, 8); + return; + } + div = dvd / (uint16_t) s; + mod = dvd % (uint16_t) s; + if (div > 0xffff) { + x86emu_intr_raise(emu, 8); + return; + } + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_SF); + CONDITIONAL_SET_FLAG(div == 0, F_ZF); + CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF); + + emu->x86.R_AX = (uint16_t) div; + emu->x86.R_DX = (uint16_t) mod; +} +/**************************************************************************** +REMARKS: +Implements the DIV instruction and side effects. +****************************************************************************/ +static void +div_long(struct X86EMU *emu, uint32_t s) +{ + uint64_t dvd, div, mod; + + dvd = (((uint64_t) emu->x86.R_EDX) << 32) | emu->x86.R_EAX; + if (s == 0) { + x86emu_intr_raise(emu, 8); + return; + } + div = dvd / (uint32_t) s; + mod = dvd % (uint32_t) s; + if (div > 0xffffffff) { + x86emu_intr_raise(emu, 8); + return; + } + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_AF); + CLEAR_FLAG(F_SF); + SET_FLAG(F_ZF); + CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF); + + emu->x86.R_EAX = (uint32_t) div; + emu->x86.R_EDX = (uint32_t) mod; +} +/**************************************************************************** +REMARKS: +Implements the IN string instruction and side effects. +****************************************************************************/ +static void +ins(struct X86EMU *emu, int size) +{ + int inc = size; + + if (ACCESS_FLAG(F_DF)) { + inc = -size; + } + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* in until CX is ZERO. */ + uint32_t count = ((emu->x86.mode & SYSMODE_PREFIX_DATA) ? + emu->x86.R_ECX : emu->x86.R_CX); + switch (size) { + case 1: + while (count--) { + store_byte(emu, emu->x86.R_ES, emu->x86.R_DI, + (*emu->emu_inb) (emu, emu->x86.R_DX)); + emu->x86.R_DI += inc; + } + break; + + case 2: + while (count--) { + store_word(emu, emu->x86.R_ES, emu->x86.R_DI, + (*emu->emu_inw) (emu, emu->x86.R_DX)); + emu->x86.R_DI += inc; + } + break; + case 4: + while (count--) { + store_long(emu, emu->x86.R_ES, emu->x86.R_DI, + (*emu->emu_inl) (emu, emu->x86.R_DX)); + emu->x86.R_DI += inc; + break; + } + } + emu->x86.R_CX = 0; + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_ECX = 0; + } + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } else { + switch (size) { + case 1: + store_byte(emu, emu->x86.R_ES, emu->x86.R_DI, + (*emu->emu_inb) (emu, emu->x86.R_DX)); + break; + case 2: + store_word(emu, emu->x86.R_ES, emu->x86.R_DI, + (*emu->emu_inw) (emu, emu->x86.R_DX)); + break; + case 4: + store_long(emu, emu->x86.R_ES, emu->x86.R_DI, + (*emu->emu_inl) (emu, emu->x86.R_DX)); + break; + } + emu->x86.R_DI += inc; + } +} +/**************************************************************************** +REMARKS: +Implements the OUT string instruction and side effects. +****************************************************************************/ +static void +outs(struct X86EMU *emu, int size) +{ + int inc = size; + + if (ACCESS_FLAG(F_DF)) { + inc = -size; + } + if (emu->x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { + /* dont care whether REPE or REPNE */ + /* out until CX is ZERO. */ + uint32_t count = ((emu->x86.mode & SYSMODE_PREFIX_DATA) ? + emu->x86.R_ECX : emu->x86.R_CX); + switch (size) { + case 1: + while (count--) { + (*emu->emu_outb) (emu, emu->x86.R_DX, + fetch_byte(emu, emu->x86.R_ES, emu->x86.R_SI)); + emu->x86.R_SI += inc; + } + break; + + case 2: + while (count--) { + (*emu->emu_outw) (emu, emu->x86.R_DX, + fetch_word(emu, emu->x86.R_ES, emu->x86.R_SI)); + emu->x86.R_SI += inc; + } + break; + case 4: + while (count--) { + (*emu->emu_outl) (emu, emu->x86.R_DX, + fetch_long(emu, emu->x86.R_ES, emu->x86.R_SI)); + emu->x86.R_SI += inc; + break; + } + } + emu->x86.R_CX = 0; + if (emu->x86.mode & SYSMODE_PREFIX_DATA) { + emu->x86.R_ECX = 0; + } + emu->x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + } else { + switch (size) { + case 1: + (*emu->emu_outb) (emu, emu->x86.R_DX, + fetch_byte(emu, emu->x86.R_ES, emu->x86.R_SI)); + break; + case 2: + (*emu->emu_outw) (emu, emu->x86.R_DX, + fetch_word(emu, emu->x86.R_ES, emu->x86.R_SI)); + break; + case 4: + (*emu->emu_outl) (emu, emu->x86.R_DX, + fetch_long(emu, emu->x86.R_ES, emu->x86.R_SI)); + break; + } + emu->x86.R_SI += inc; + } +} +/**************************************************************************** +REMARKS: +Pushes a word onto the stack. + +NOTE: Do not inline this, as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +push_word(struct X86EMU *emu, uint16_t w) +{ + emu->x86.R_SP -= 2; + store_word(emu, emu->x86.R_SS, emu->x86.R_SP, w); +} +/**************************************************************************** +REMARKS: +Pushes a long onto the stack. + +NOTE: Do not inline this, as (*emu->emu_wrX) is already inline! +****************************************************************************/ +static void +push_long(struct X86EMU *emu, uint32_t w) +{ + emu->x86.R_SP -= 4; + store_long(emu, emu->x86.R_SS, emu->x86.R_SP, w); +} +/**************************************************************************** +REMARKS: +Pops a word from the stack. + +NOTE: Do not inline this, as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint16_t +pop_word(struct X86EMU *emu) +{ + uint16_t res; + + res = fetch_word(emu, emu->x86.R_SS, emu->x86.R_SP); + emu->x86.R_SP += 2; + return res; +} +/**************************************************************************** +REMARKS: +Pops a long from the stack. + +NOTE: Do not inline this, as (*emu->emu_rdX) is already inline! +****************************************************************************/ +static uint32_t +pop_long(struct X86EMU *emu) +{ + uint32_t res; + + res = fetch_long(emu, emu->x86.R_SS, emu->x86.R_SP); + emu->x86.R_SP += 4; + return res; +} diff --git a/BaS_gcc/x86emu/x86fpu.c b/BaS_gcc/x86emu/x86fpu.c deleted file mode 100644 index a1cdcef..0000000 --- a/BaS_gcc/x86emu/x86fpu.c +++ /dev/null @@ -1,999 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file contains the code to implement the decoding and - * emulation of the FPU instructions. - * - ****************************************************************************/ - -#include "x86debug.h" -#include "x86emui.h" -#include "x86fpu.h" -#include "x86fpu_regs.h" - -/*----------------------------- Implementation ----------------------------*/ - -/* opcode=0xd8 */ -void x86emuOp_esc_coprocess_d8(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("ESC D8\r\n"); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_d9_tab[] = -{ - "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", - "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", - - "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", - "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", - - "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", - "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t", -}; - -static char *x86emu_fpu_op_d9_tab1[] = -{ - "FLD\t", "FLD\t", "FLD\t", "FLD\t", - "FLD\t", "FLD\t", "FLD\t", "FLD\t", - - "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t", - "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t", - - "FNOP", "ESC_D9", "ESC_D9", "ESC_D9", - "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9", - - "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t", - "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t", - - "FCHS", "FABS", "ESC_D9", "ESC_D9", - "FTST", "FXAM", "ESC_D9", "ESC_D9", - - "FLD1", "FLDL2T", "FLDL2E", "FLDPI", - "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9", - - "F2XM1", "FYL2X", "FPTAN", "FPATAN", - "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP", - - "FPREM", "FYL2XP1", "FSQRT", "ESC_D9", - "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xd9 */ -void x86emuOp_esc_coprocess_d9(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (mod != 3) - { - DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl); - } - else - { - DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]); - } -#endif - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - if (rh < 4) - { - DECODE_PRINTF2("ST(%d)\r\n", stkelem); - } - else - { - DECODE_PRINTF("\r\n"); - } - break; - } -#ifdef X86EMU_FPU_PRESENT - /* execute */ - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem); - break; - case 1: - x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem); - break; - case 2: - switch (rl) - { - case 0: - x86emu_fpu_R_nop(); - break; - default: - x86emu_fpu_illegal(); - break; - } - case 3: - x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem); - break; - case 4: - switch (rl) - { - case 0: - x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP); - break; - default: - /* 2,3,6,7 */ - x86emu_fpu_illegal(); - break; - } - break; - - case 5: - switch (rl) - { - case 0: - x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP); - break; - default: - /* 7 */ - x86emu_fpu_illegal(); - break; - } - break; - - case 6: - switch (rl) - { - case 0: - x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_illegal(); - break; - case 6: - x86emu_fpu_R_decstp(); - break; - case 7: - x86emu_fpu_R_incstp(); - break; - } - break; - - case 7: - switch (rl) - { - case 0: - x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_illegal(); - break; - case 4: - x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP); - break; - case 6: - case 7: - default: - x86emu_fpu_illegal(); - break; - } - break; - - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset); - break; - case 3: - x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset); - break; - case 4: - x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset); - break; - case 6: - x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset); - break; - } - } - } -#endif /* X86EMU_FPU_PRESENT */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -char *x86emu_fpu_op_da_tab[] = -{ - "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", - "FICOMP\tDWORD PTR ", - "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", - "FIDIVR\tDWORD PTR ", - - "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", - "FICOMP\tDWORD PTR ", - "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", - "FIDIVR\tDWORD PTR ", - - "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", - "FICOMP\tDWORD PTR ", - "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", - "FIDIVR\tDWORD PTR ", - - "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ", - "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ", -}; -#endif /* DBG_X86EMU */ - -/* opcode=0xda */ -void x86emuOp_esc_coprocess_da(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - x86emu_fpu_illegal(); - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset); - break; - case 1: - x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset); - break; - case 2: - x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset); - break; - case 3: - x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset); - break; - case 4: - x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset); - break; - case 5: - x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset); - break; - case 6: - x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset); - break; - case 7: - x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -char *x86emu_fpu_op_db_tab[] = -{ - "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", - "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", - - "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", - "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", - - "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", - "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xdb */ -void x86emuOp_esc_coprocess_db(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (mod != 3) - { - DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl); - } - else if (rh == 4) - { /* === 11 10 0 nnn */ - switch (rl) - { - case 0: - DECODE_PRINTF("FENI\r\n"); - break; - case 1: - DECODE_PRINTF("FDISI\r\n"); - break; - case 2: - DECODE_PRINTF("FCLEX\r\n"); - break; - case 3: - DECODE_PRINTF("FINIT\r\n"); - break; - } - } - else - { - DECODE_PRINTF2("ESC_DB %0x\r\n", (mod << 6) + (rh << 3) + (rl)); - } -#endif /* DBG_X86EMU */ - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - break; - case 1: - destoffset = decode_rm01_address(rl); - break; - case 2: - destoffset = decode_rm10_address(rl); - break; - case 3: /* register to register */ - break; - } -#ifdef X86EMU_FPU_PRESENT - /* execute */ - switch (mod) - { - case 3: - switch (rh) - { - case 4: - switch (rl) - { - case 0: - x86emu_fpu_R_feni(); - break; - case 1: - x86emu_fpu_R_fdisi(); - break; - case 2: - x86emu_fpu_R_fclex(); - break; - case 3: - x86emu_fpu_R_finit(); - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset); - break; - case 3: - x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset); - break; - case 4: - x86emu_fpu_illegal(); - break; - case 5: - x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset); - break; - case 6: - x86emu_fpu_illegal(); - break; - case 7: - x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU -char *x86emu_fpu_op_dc_tab[] = -{ - "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", - "FCOMP\tQWORD PTR ", - "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", - "FDIVR\tQWORD PTR ", - - "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", - "FCOMP\tQWORD PTR ", - "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", - "FDIVR\tQWORD PTR ", - - "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", - "FCOMP\tQWORD PTR ", - "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ", - "FDIVR\tQWORD PTR ", - - "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t", - "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t", -}; -#endif /* DBG_X86EMU */ - -/* opcode=0xdc */ -void x86emuOp_esc_coprocess_dc(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - /* execute */ - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP); - break; - case 7: - x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset); - break; - case 1: - x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset); - break; - case 2: - x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset); - break; - case 3: - x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset); - break; - case 4: - x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset); - break; - case 5: - x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset); - break; - case 6: - x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset); - break; - case 7: - x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_dd_tab[] = -{ - "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", - "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", - - "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", - "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", - - "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", - "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t", - - "FFREE\t", "FXCH\t", "FST\t", "FSTP\t", - "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xdd */ -void x86emuOp_esc_coprocess_dd(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_ffree(stkelem); - break; - case 1: - x86emu_fpu_R_fxch(stkelem); - break; - case 2: - x86emu_fpu_R_fst(stkelem); /* register version */ - break; - case 3: - x86emu_fpu_R_fstp(stkelem); /* register version */ - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset); - break; - case 3: - x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset); - break; - case 4: - x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_illegal(); - break; - case 6: - x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_de_tab[] = -{ - "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", - "FICOMP\tWORD PTR ", - "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", - "FIDIVR\tWORD PTR ", - - "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", - "FICOMP\tWORD PTR ", - "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", - "FIDIVR\tWORD PTR ", - - "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ", - "FICOMP\tWORD PTR ", - "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ", - "FIDIVR\tWORD PTR ", - - "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t", - "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t", -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xde */ -void x86emuOp_esc_coprocess_de(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d),ST\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); - break; - case 3: - if (stkelem == 1) - x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP); - else - x86emu_fpu_illegal(); - break; - case 4: - x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP); - break; - case 7: - x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset); - break; - case 1: - x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset); - break; - case 2: - x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset); - break; - case 3: - x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset); - break; - case 4: - x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset); - break; - case 6: - x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} - -#ifdef DBG_X86EMU - -static char *x86emu_fpu_op_df_tab[] = -{ - /* mod == 00 */ - "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ", - "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ", - "FISTP\tQWORD PTR ", - - /* mod == 01 */ - "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ", - "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ", - "FISTP\tQWORD PTR ", - - /* mod == 10 */ - "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ", - "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ", - "FISTP\tQWORD PTR ", - - /* mod == 11 */ - "FFREE\t", "FXCH\t", "FST\t", "FSTP\t", - "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F," -}; - -#endif /* DBG_X86EMU */ - -/* opcode=0xdf */ -void x86emuOp_esc_coprocess_df(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t stkelem; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl); - switch (mod) - { - case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\r\n"); - break; - case 3: /* register to register */ - stkelem = (uint8_t)rl; - DECODE_PRINTF2("\tST(%d)\r\n", stkelem); - break; - } -#ifdef X86EMU_FPU_PRESENT - switch (mod) - { - case 3: - switch (rh) - { - case 0: - x86emu_fpu_R_ffree(stkelem); - break; - case 1: - x86emu_fpu_R_fxch(stkelem); - break; - case 2: - x86emu_fpu_R_fst(stkelem); /* register version */ - break; - case 3: - x86emu_fpu_R_fstp(stkelem); /* register version */ - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - switch (rh) - { - case 0: - x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset); - break; - case 3: - x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset); - break; - case 4: - x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset); - break; - case 5: - x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset); - break; - case 6: - x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset); - break; - case 7: - x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset); - break; - } - } -#endif - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR_NO_TRACE(); -} diff --git a/BaS_gcc/x86emu/x86ops.c b/BaS_gcc/x86emu/x86ops.c deleted file mode 100644 index 2ee7c7b..0000000 --- a/BaS_gcc/x86emu/x86ops.c +++ /dev/null @@ -1,5428 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file includes subroutines to implement the decoding - * and emulation of all the x86 processor instructions. - * - * There are approximately 250 subroutines in here, which correspond - * to the 256 byte-"opcodes" found on the 8086. The table which - * dispatches this is found in the files optab.[ch]. - * - * Each opcode proc has a comment preceeding it which gives it's table - * address. Several opcodes are missing (undefined) in the table. - * - * Each proc includes information for decoding (DECODE_PRINTF and - * DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc - * functions (START_OF_INSTR, END_OF_INSTR). - * - * Many of the procedures are *VERY* similar in coding. This has - * allowed for a very large amount of code to be generated in a fairly - * short amount of time (i.e. cut, paste, and modify). The result is - * that much of the code below could have been folded into subroutines - * for a large reduction in size of this file. The downside would be - * that there would be a penalty in execution speed. The file could - * also have been *MUCH* larger by inlining certain functions which - * were called. This could have resulted even faster execution. The - * prime directive I used to decide whether to inline the code or to - * modularize it, was basically: 1) no unnecessary subroutine calls, - * 2) no routines more than about 200 lines in size, and 3) modularize - * any code that I might not get right the first time. The fetch_* - * subroutines fall into the latter category. The The decode_* fall - * into the second category. The coding of the "switch(mod){ .... }" - * in many of the subroutines below falls into the first category. - * Especially, the coding of {add,and,or,sub,...}_{byte,word} - * subroutines are an especially glaring case of the third guideline. - * Since so much of the code is cloned from other modules (compare - * opcode #00 to opcode #01), making the basic operations subroutine - * calls is especially important; otherwise mistakes in coding an - * "add" would represent a nightmare in maintenance. - * - ****************************************************************************/ - -#include "x86debug.h" -#include "x86emui.h" - -extern unsigned decode_rmXX_address(int mod, int rm); - -/*----------------------------- Implementation ----------------------------*/ - -/* constant arrays to do several instructions in just one function */ - -#ifdef DBG_X86EMU -static char *x86emu_GenOpName[8] = -{ - "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP" -}; -#endif - -/* used by several opcodes */ -static uint8_t (*genop_byte_operation[])(uint8_t d, uint8_t s) = -{ - add_byte, /* 00 */ - or_byte, /* 01 */ - adc_byte, /* 02 */ - sbb_byte, /* 03 */ - and_byte, /* 04 */ - sub_byte, /* 05 */ - xor_byte, /* 06 */ - cmp_byte, /* 07 */ -}; - -static uint16_t (*genop_word_operation[])(uint16_t d, uint16_t s) = -{ - add_word, /*00 */ - or_word, /*01 */ - adc_word, /*02 */ - sbb_word, /*03 */ - and_word, /*04 */ - sub_word, /*05 */ - xor_word, /*06 */ - cmp_word, /*07 */ -}; - -static uint32_t (*genop_long_operation[])(uint32_t d, uint32_t s) = -{ - add_long, /*00 */ - or_long, /*01 */ - adc_long, /*02 */ - sbb_long, /*03 */ - and_long, /*04 */ - sub_long, /*05 */ - xor_long, /*06 */ - cmp_long, /*07 */ -}; - -/* used by opcodes 80, c0, d0, and d2. */ -static uint8_t(*opcD0_byte_operation[])(uint8_t d, uint8_t s) = -{ - rol_byte, - ror_byte, - rcl_byte, - rcr_byte, - shl_byte, - shr_byte, - shl_byte, /* sal_byte === shl_byte by definition */ - sar_byte, -}; - -/* used by opcodes c1, d1, and d3. */ -static uint16_t(*opcD1_word_operation[])(uint16_t s, uint8_t d) = -{ - rol_word, - ror_word, - rcl_word, - rcr_word, - shl_word, - shr_word, - shl_word, /* sal_byte === shl_byte by definition */ - sar_word, -}; - -/* used by opcodes c1, d1, and d3. */ -static uint32_t (*opcD1_long_operation[])(uint32_t s, uint8_t d) = -{ - rol_long, - ror_long, - rcl_long, - rcr_long, - shl_long, - shr_long, - shl_long, /* sal_byte === shl_byte by definition */ - sar_long, -}; - -#ifdef DBG_X86EMU - -static char *opF6_names[8] = -{ "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" }; - -#endif - -/* - * PARAMETERS: - * op1 - Instruction op code - * - * REMARKS: - * Handles illegal opcodes. - */ -void x86emuOp_illegal_op(uint8_t op1) -{ - START_OF_INSTR(); - if (M.x86.R_SP != 0) { - DECODE_PRINTF("ILLEGAL X86 OPCODE\r\n"); - TRACE_REGS(); - dbg("%04x:%04x: %02X ILLEGAL X86 OPCODE!\r\n", M.x86.R_CS, M.x86.R_IP - 1, op1); - dbg(" ILLEGAL X86 OPCODE!\r\n"); - HALT_SYS(); - } - else { - /* If we get here, it means the stack pointer is back to zero - * so we are just returning from an emulator service call - * so therte is no need to display an error message. We trap - * the emulator with an 0xF1 opcode to finish the service - * call. - */ - X86EMU_halt_sys(); - } - END_OF_INSTR(); -} - -/* - * REMARKS: - * Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38 - */ -void x86emuOp_genop_byte_RM_R(uint8_t op1) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t *destreg, *srcreg; - uint8_t destval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) - { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = genop_byte_operation[op1](destval, *srcreg); - store_data_byte(destoffset, destval); - } - else - { - /* register to register */ - - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_byte_operation[op1](*destreg, *srcreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* - * REMARKS: - * Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39 - */ -void x86emuOp_genop_word_RM_R(uint8_t op1) -{ - int mod, rl, rh; - unsigned int destoffset; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - - if (mod < 3) - { - destoffset = decode_rmXX_address(mod,rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) - { - uint32_t destval; - uint32_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = genop_long_operation[op1](destval, *srcreg); - if (op1 != 7) - store_data_long(destoffset, destval); - } - else - { - uint16_t destval; - uint16_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = genop_word_operation[op1](destval, *srcreg); - if (op1 != 7) - store_data_word(destoffset, destval); - } - } - else - { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) - { - uint32_t *destreg, *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_long_operation[op1](*destreg, *srcreg); - } - else - { - uint16_t *destreg, *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_word_operation[op1](*destreg, *srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* - * REMARKS: - * Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a - */ -void x86emuOp_genop_byte_R_RM(uint8_t op1) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int srcoffset; - uint8_t srcval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod,rl); - srcval = fetch_data_byte(srcoffset); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - srcval = *srcreg; - } - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_byte_operation[op1](*destreg, srcval); - - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b - ****************************************************************************/ -void x86emuOp_genop_word_R_RM(uint8_t op1) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint32_t *destreg32, srcval; - uint16_t *destreg; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod,rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - destreg32 = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg32 = genop_long_operation[op1](*destreg32, srcval); - } else { - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_word_operation[op1](*destreg, srcval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - destreg32 = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg32 = genop_long_operation[op1](*destreg32, *srcreg); - } else { - uint16_t *srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = genop_word_operation[op1](*destreg, *srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c - ****************************************************************************/ -void x86emuOp_genop_byte_AL_IMM(uint8_t op1) -{ - uint8_t srcval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\tAL,"); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d - ****************************************************************************/ -void x86emuOp_genop_word_AX_IMM(uint8_t op1) -{ - uint32_t srcval; - - op1 = (op1 >> 3) & 0x7; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\tEAX,"); - srcval = fetch_long_imm(); - } else { - DECODE_PRINTF(x86emu_GenOpName[op1]); - DECODE_PRINTF("\tAX,"); - srcval = fetch_word_imm(); - } - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval); - } else { - M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (uint16_t)srcval); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x06 - ****************************************************************************/ -void x86emuOp_push_ES(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tES\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_ES); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x07 - ****************************************************************************/ -void x86emuOp_pop_ES(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tES\r\n"); - TRACE_AND_STEP(); - M.x86.R_ES = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0e - ****************************************************************************/ -void x86emuOp_push_CS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tCS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f. Escape for two-byte opcode (286 or better) - ****************************************************************************/ -void x86emuOp_two_byte(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t op2 = (*sys_rdb)(((uint32_t)M.x86.R_CS << 4) + (M.x86.R_IP++)); - INC_DECODED_INST_LEN(1); - (*x86emu_optab2[op2])(op2); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x16 - ****************************************************************************/ -void x86emuOp_push_SS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tSS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_SS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x17 - ****************************************************************************/ -void x86emuOp_pop_SS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tSS\r\n"); - TRACE_AND_STEP(); - M.x86.R_SS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x1e - ****************************************************************************/ -void x86emuOp_push_DS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tDS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_DS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x1f - ****************************************************************************/ -void x86emuOp_pop_DS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tDS\r\n"); - TRACE_AND_STEP(); - M.x86.R_DS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x26 - ****************************************************************************/ -void x86emuOp_segovr_ES(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("ES:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_ES; - /* - * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4 - * opcode subroutines we do not want to do this. - */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x27 - ****************************************************************************/ -void x86emuOp_daa(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DAA\r\n"); - TRACE_AND_STEP(); - M.x86.R_AL = daa_byte(M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x2e - ****************************************************************************/ -void x86emuOp_segovr_CS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("CS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_CS; - /* note no DECODE_CLEAR_SEGOVR here. */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x2f - ****************************************************************************/ -void x86emuOp_das(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DAS\r\n"); - TRACE_AND_STEP(); - M.x86.R_AL = das_byte(M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x36 - ****************************************************************************/ -void x86emuOp_segovr_SS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("SS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_SS; - /* no DECODE_CLEAR_SEGOVR ! */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x37 - ****************************************************************************/ -void x86emuOp_aaa(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("AAA\r\n"); - TRACE_AND_STEP(); - M.x86.R_AX = aaa_word(M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x3e - ****************************************************************************/ -void x86emuOp_segovr_DS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_DS; - /* NO DECODE_CLEAR_SEGOVR! */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x3f - ****************************************************************************/ -void x86emuOp_aas(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("AAS\r\n"); - TRACE_AND_STEP(); - M.x86.R_AX = aas_word(M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x40 - 0x47 - ****************************************************************************/ -void x86emuOp_inc_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("INC\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = inc_long(*reg); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = inc_word(*reg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x48 - 0x4F - ****************************************************************************/ -void x86emuOp_dec_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("DEC\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = dec_long(*reg); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = dec_word(*reg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x50 - 0x57 - ****************************************************************************/ -void x86emuOp_push_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("PUSH\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_long(*reg); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_word(*reg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x58 - 0x5F - ****************************************************************************/ -void x86emuOp_pop_register(uint8_t op1) -{ - START_OF_INSTR(); - op1 &= 0x7; - DECODE_PRINTF("POP\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg; - reg = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = pop_long(); - } else { - uint16_t *reg; - reg = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *reg = pop_word(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x60 - ****************************************************************************/ -void x86emuOp_push_all(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSHAD\r\n"); - } else { - DECODE_PRINTF("PUSHA\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t old_sp = M.x86.R_ESP; - - push_long(M.x86.R_EAX); - push_long(M.x86.R_ECX); - push_long(M.x86.R_EDX); - push_long(M.x86.R_EBX); - push_long(old_sp); - push_long(M.x86.R_EBP); - push_long(M.x86.R_ESI); - push_long(M.x86.R_EDI); - } else { - uint16_t old_sp = M.x86.R_SP; - - push_word(M.x86.R_AX); - push_word(M.x86.R_CX); - push_word(M.x86.R_DX); - push_word(M.x86.R_BX); - push_word(old_sp); - push_word(M.x86.R_BP); - push_word(M.x86.R_SI); - push_word(M.x86.R_DI); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x61 - ****************************************************************************/ -void x86emuOp_pop_all(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POPAD\r\n"); - } else { - DECODE_PRINTF("POPA\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = pop_long(); - M.x86.R_ESI = pop_long(); - M.x86.R_EBP = pop_long(); - M.x86.R_ESP += 4; /* skip ESP */ - M.x86.R_EBX = pop_long(); - M.x86.R_EDX = pop_long(); - M.x86.R_ECX = pop_long(); - M.x86.R_EAX = pop_long(); - } else { - M.x86.R_DI = pop_word(); - M.x86.R_SI = pop_word(); - M.x86.R_BP = pop_word(); - M.x86.R_SP += 2; /* skip SP */ - M.x86.R_BX = pop_word(); - M.x86.R_DX = pop_word(); - M.x86.R_CX = pop_word(); - M.x86.R_AX = pop_word(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */ -/*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */ - -/**************************************************************************** -REMARKS: -Handles opcode 0x64 - ****************************************************************************/ -void x86emuOp_segovr_FS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("FS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_FS; - /* - * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4 - * opcode subroutines we do not want to do this. - */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x65 - ****************************************************************************/ -void x86emuOp_segovr_GS(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("GS:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_SEGOVR_GS; - /* - * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4 - * opcode subroutines we do not want to do this. - */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x66 - prefix for 32-bit register - ****************************************************************************/ -void x86emuOp_prefix_data(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("DATA:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_DATA; - /* note no DECODE_CLEAR_SEGOVR here. */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x67 - prefix for 32-bit address - ****************************************************************************/ -void x86emuOp_prefix_addr(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("ADDR:\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_ADDR; - /* note no DECODE_CLEAR_SEGOVR here. */ - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x68 - ****************************************************************************/ -void x86emuOp_push_word_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t imm; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - imm = fetch_long_imm(); - } else { - imm = fetch_word_imm(); - } - DECODE_PRINTF2("PUSH\t%x\r\n", imm); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(imm); - } else { - push_word((uint16_t)imm); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x69 - ****************************************************************************/ -void x86emuOp_imul_word_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("IMUL\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - uint32_t res_lo,res_hi; - int32_t imm; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_long(srcoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)srcval,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg; - uint16_t srcval; - uint32_t res; - int16_t imm; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_word(srcoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - res = (int16_t)srcval * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t res_lo,res_hi; - int32_t imm; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*srcreg,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg,*srcreg; - uint32_t res; - int16_t imm; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - res = (int16_t)*srcreg * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6a - ****************************************************************************/ -void x86emuOp_push_byte_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t imm; - - START_OF_INSTR(); - imm = (int8_t)fetch_byte_imm(); - DECODE_PRINTF2("PUSH\t%d\r\n", imm); - TRACE_AND_STEP(); - push_word(imm); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6b - ****************************************************************************/ -void x86emuOp_imul_byte_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int8_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("IMUL\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_long(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)srcval,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg; - uint16_t srcval; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcval = fetch_data_word(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - res = (int16_t)srcval * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*srcreg,(int32_t)imm); - if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) || - (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg,*srcreg; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", (int32_t)imm); - TRACE_AND_STEP(); - res = (int16_t)*srcreg * (int16_t)imm; - if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) || - (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6c - ****************************************************************************/ -void x86emuOp_ins_byte(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("INSB\r\n"); - ins(1); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6d - ****************************************************************************/ -void x86emuOp_ins_word(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INSD\r\n"); - ins(4); - } else { - DECODE_PRINTF("INSW\r\n"); - ins(2); - } - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6e - ****************************************************************************/ -void x86emuOp_outs_byte(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("OUTSB\r\n"); - outs(1); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x6f - ****************************************************************************/ -void x86emuOp_outs_word(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OUTSD\r\n"); - outs(4); - } else { - DECODE_PRINTF("OUTSW\r\n"); - outs(2); - } - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x70 - 0x7F - ****************************************************************************/ -int x86emu_check_jump_condition(uint8_t op); - -void x86emuOp_jump_near_cond(uint8_t op1) -{ - int8_t offset; - uint16_t target; - int cond; - - /* jump to byte offset if overflow flag is set */ - START_OF_INSTR(); - cond = x86emu_check_jump_condition(op1 & 0xF); - offset = (int8_t)fetch_byte_imm(); - target = (uint16_t)(M.x86.R_IP + (int16_t)offset); - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - if (cond) - M.x86.R_IP = target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x80 - ****************************************************************************/ -void x86emuOp_opc80_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t imm; - uint8_t destval; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_byte_operation[rh]) (*destreg, imm); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x81 - ****************************************************************************/ -void x86emuOp_opc81_word_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* - * Know operation, decode the mod byte to find the addressing - * mode. - */ - if (mod < 3) { - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval,imm; - - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - uint16_t destval,imm; - - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg, imm; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_long_operation[rh]) (*destreg, imm); - } else { - uint16_t *destreg, imm; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_word_operation[rh]) (*destreg, imm); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x82 - ****************************************************************************/ -void x86emuOp_opc82_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t imm; - uint8_t destval; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction Similar to opcode 81, except that - * the immediate byte is sign extended to a word length. - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_byte_operation[rh]) (*destreg, imm); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x83 - ****************************************************************************/ -void x86emuOp_opc83_word_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - /* - * Weirdo special case instruction format. Part of the opcode - * held below in "RH". Doubly nested case would result, except - * that the decoded instruction Similar to opcode 81, except that - * the immediate byte is sign extended to a word length. - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod,rl); - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval,imm; - - destval = fetch_data_long(destoffset); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - uint16_t destval,imm; - - destval = fetch_data_word(destoffset); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - destval = (*genop_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg, imm; - - destreg = DECODE_RM_LONG_REGISTER(rl); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_long_operation[rh]) (*destreg, imm); - } else { - uint16_t *destreg, imm; - - destreg = DECODE_RM_WORD_REGISTER(rl); - imm = (int8_t) fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = (*genop_word_operation[rh]) (*destreg, imm); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x84 - ****************************************************************************/ -void x86emuOp_test_byte_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int destoffset; - uint8_t destval; - - START_OF_INSTR(); - DECODE_PRINTF("TEST\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_byte(destval, *srcreg); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_byte(*destreg, *srcreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x85 - ****************************************************************************/ -void x86emuOp_test_word_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("TEST\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_long(destval, *srcreg); - } else { - uint16_t destval; - uint16_t *srcreg; - - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_word(destval, *srcreg); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_long(*destreg, *srcreg); - } else { - uint16_t *destreg,*srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - test_word(*destreg, *srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x86 - ****************************************************************************/ -void x86emuOp_xchg_byte_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int destoffset; - uint8_t destval; - uint8_t tmp; - - START_OF_INSTR(); - DECODE_PRINTF("XCHG\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x87 - ****************************************************************************/ -void x86emuOp_xchg_word_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("XCHG\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - uint32_t destval,tmp; - - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_long(destoffset, destval); - } else { - uint16_t *srcreg; - uint16_t destval,tmp; - - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t tmp; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } else { - uint16_t *destreg,*srcreg; - uint16_t tmp; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x88 - ****************************************************************************/ -void x86emuOp_mov_byte_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - store_data_byte(destoffset, *srcreg); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x89 - ****************************************************************************/ -void x86emuOp_mov_word_RM_R(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - store_data_long(destoffset, *srcreg); - } else { - uint16_t *srcreg; - - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - store_data_word(destoffset, *srcreg); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - uint16_t *destreg,*srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8a - ****************************************************************************/ -void x86emuOp_mov_byte_R_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg, *srcreg; - unsigned int srcoffset; - uint8_t srcval; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8b - ****************************************************************************/ -void x86emuOp_mov_word_R_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg, *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - uint16_t *destreg, *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8c - ****************************************************************************/ -void x86emuOp_mov_word_RM_SR(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint16_t *destreg, *srcreg; - unsigned int destoffset; - uint16_t destval; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = *srcreg; - store_data_word(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8d - ****************************************************************************/ -void x86emuOp_lea_word_R_M(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint16_t *srcreg; - unsigned int destoffset; - - /* - * TODO: Need to handle address size prefix! - * - * lea eax,[eax+ebx*2] ?? - */ - - START_OF_INSTR(); - DECODE_PRINTF("LEA\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *srcreg = (uint16_t)destoffset; - } - /* } else { undefined. Do nothing. } */ -DECODE_CLEAR_SEGOVR(); -END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8e - ****************************************************************************/ -void x86emuOp_mov_word_SR_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint16_t *destreg, *srcreg; - unsigned int srcoffset; - uint16_t srcval; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - /* - * Clean up, and reset all the R_xSP pointers to the correct - * locations. This is about 3x too much overhead (doing all the - * segreg ptrs when only one is needed, but this instruction - * *cannot* be that common, and this isn't too much work anyway. - */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x8f - ****************************************************************************/ -void x86emuOp_pop_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("POP\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\r\n"); - HALT_SYS(); - } - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = pop_long(); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = pop_word(); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = pop_long(); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = pop_word(); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x90 - ****************************************************************************/ -void x86emuOp_nop(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("NOP\r\n"); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x91-0x97 - ****************************************************************************/ -void x86emuOp_xchg_word_AX_register(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t tmp; - - op1 &= 0x7; - - START_OF_INSTR(); - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg32; - DECODE_PRINTF("XCHG\tEAX,"); - reg32 = DECODE_RM_LONG_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = M.x86.R_EAX; - M.x86.R_EAX = *reg32; - *reg32 = tmp; - } else { - uint16_t *reg16; - DECODE_PRINTF("XCHG\tAX,"); - reg16 = DECODE_RM_WORD_REGISTER(op1); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - tmp = M.x86.R_AX; - M.x86.R_AX = *reg16; - *reg16 = (uint16_t)tmp; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x98 - ****************************************************************************/ -void x86emuOp_cbw(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CWDE\r\n"); - } else { - DECODE_PRINTF("CBW\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - if (M.x86.R_AX & 0x8000) { - M.x86.R_EAX |= 0xffff0000; - } else { - M.x86.R_EAX &= 0x0000ffff; - } - } else { - if (M.x86.R_AL & 0x80) { - M.x86.R_AH = 0xff; - } else { - M.x86.R_AH = 0x0; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x99 - ****************************************************************************/ -void x86emuOp_cwd(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CDQ\r\n"); - } else { - DECODE_PRINTF("CWD\r\n"); - } - DECODE_PRINTF("CWD\r\n"); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - if (M.x86.R_EAX & 0x80000000) { - M.x86.R_EDX = 0xffffffff; - } else { - M.x86.R_EDX = 0x0; - } - } else { - if (M.x86.R_AX & 0x8000) { - M.x86.R_DX = 0xffff; - } else { - M.x86.R_DX = 0x0; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9a - ****************************************************************************/ -void x86emuOp_call_far_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t farseg, faroff; - - START_OF_INSTR(); - DECODE_PRINTF("CALL\t"); - faroff = fetch_word_imm(); - farseg = fetch_word_imm(); - DECODE_PRINTF2("%x:", farseg); - DECODE_PRINTF2("%x\r\n", faroff); - CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR "); - - /* XXX - * - * Hooked interrupt vectors calling into our "BIOS" will cause - * problems unless all intersegment stuff is checked for BIOS - * access. Check needed here. For moment, let it alone. - */ - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = farseg; - push_word(M.x86.R_IP); - M.x86.R_IP = faroff; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9b - ****************************************************************************/ -void x86emuOp_wait(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("WAIT"); - TRACE_AND_STEP(); - /* NADA. */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9c - ****************************************************************************/ -void x86emuOp_pushf_word(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t flags; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSHFD\r\n"); - } else { - DECODE_PRINTF("PUSHF\r\n"); - } - TRACE_AND_STEP(); - - /* clear out *all* bits not representing flags, and turn on real bits */ - flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON; - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(flags); - } else { - push_word((uint16_t)flags); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9d - ****************************************************************************/ -void x86emuOp_popf_word(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POPFD\r\n"); - } else { - DECODE_PRINTF("POPF\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EFLG = pop_long(); - } else { - M.x86.R_FLG = pop_word(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9e - ****************************************************************************/ -void x86emuOp_sahf(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("SAHF\r\n"); - TRACE_AND_STEP(); - /* clear the lower bits of the flag register */ - M.x86.R_FLG &= 0xffffff00; - /* or in the AH register into the flags register */ - M.x86.R_FLG |= M.x86.R_AH; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x9f - ****************************************************************************/ -void x86emuOp_lahf(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("LAHF\r\n"); - TRACE_AND_STEP(); - M.x86.R_AH = (uint8_t)(M.x86.R_FLG & 0xff); - /*undocumented TC++ behavior??? Nope. It's documented, but - you have too look real hard to notice it. */ - M.x86.R_AH |= 0x2; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa0 - ****************************************************************************/ -void x86emuOp_mov_AL_M_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\tAL,"); - offset = fetch_word_imm(); - DECODE_PRINTF2("[%x]\r\n", offset); - TRACE_AND_STEP(); - M.x86.R_AL = fetch_data_byte(offset); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa1 - ****************************************************************************/ -void x86emuOp_mov_AX_M_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - offset = fetch_word_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("MOV\tEAX,[%x]\r\n", offset); - } else { - DECODE_PRINTF2("MOV\tAX,[%x]\r\n", offset); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = fetch_data_long(offset); - } else { - M.x86.R_AX = fetch_data_word(offset); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa2 - ****************************************************************************/ -void x86emuOp_mov_M_AL_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - offset = fetch_word_imm(); - DECODE_PRINTF2("[%x],AL\r\n", offset); - TRACE_AND_STEP(); - store_data_byte(offset, M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa3 - ****************************************************************************/ -void x86emuOp_mov_M_AX_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t offset; - - START_OF_INSTR(); - offset = fetch_word_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("MOV\t[%x],EAX\r\n", offset); - } else { - DECODE_PRINTF2("MOV\t[%x],AX\r\n", offset); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - store_data_long(offset, M.x86.R_EAX); - } else { - store_data_word(offset, M.x86.R_AX); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa4 - ****************************************************************************/ -void x86emuOp_movs_byte(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t val; - uint32_t count; - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("MOVS\tBYTE\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - val = fetch_data_byte(M.x86.R_SI); - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val); - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa5 - ****************************************************************************/ -void x86emuOp_movs_word(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t val; - int inc; - uint32_t count; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOVS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("MOVS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long(M.x86.R_SI); - store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val); - } else { - val = fetch_data_word(M.x86.R_SI); - store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (uint16_t)val); - } - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa6 - ****************************************************************************/ -void x86emuOp_cmps_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int8_t val1, val2; - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("CMPS\tBYTE\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && (ACCESS_FLAG(F_ZF) == 0) ) break; - if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa7 - ****************************************************************************/ -void x86emuOp_cmps_word(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t val1,val2; - int inc; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CMPS\tDWORD\r\n"); - inc = 4; - } else { - DECODE_PRINTF("CMPS\tWORD\r\n"); - inc = 2; - } - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -inc; - - TRACE_AND_STEP(); - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((uint16_t)val1, (uint16_t)val2); - } - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && ACCESS_FLAG(F_ZF) == 0 ) break; - if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((uint16_t)val1, (uint16_t)val2); - } - M.x86.R_SI += inc; - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa8 - ****************************************************************************/ -void x86emuOp_test_AL_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int imm; - - START_OF_INSTR(); - DECODE_PRINTF("TEST\tAL,"); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - test_byte(M.x86.R_AL, (uint8_t)imm); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xa9 - ****************************************************************************/ -void x86emuOp_test_AX_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t srcval; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("TEST\tEAX,"); - srcval = fetch_long_imm(); - } else { - DECODE_PRINTF("TEST\tAX,"); - srcval = fetch_word_imm(); - } - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - test_long(M.x86.R_EAX, srcval); - } else { - test_word(M.x86.R_AX, (uint16_t)srcval); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xaa - ****************************************************************************/ -void x86emuOp_stos_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("STOS\tBYTE\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - TRACE_AND_STEP(); - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xab - ****************************************************************************/ -void x86emuOp_stos_word(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - uint32_t count; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("STOS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("STOS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX); - } else { - store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX); - } - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xac - ****************************************************************************/ -void x86emuOp_lods_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("LODS\tBYTE\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - M.x86.R_AL = fetch_data_byte(M.x86.R_SI); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - M.x86.R_AL = fetch_data_byte(M.x86.R_SI); - M.x86.R_SI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xad - ****************************************************************************/ -void x86emuOp_lods_word(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - uint32_t count; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("LODS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("LODS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - count = 1; - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } - while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = fetch_data_long(M.x86.R_SI); - } else { - M.x86.R_AX = fetch_data_word(M.x86.R_SI); - } - M.x86.R_SI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xae - ****************************************************************************/ -void x86emuOp_scas_byte(uint8_t X86EMU_UNUSED(op1)) -{ - int8_t val2; - int inc; - - START_OF_INSTR(); - DECODE_PRINTF("SCAS\tBYTE\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; - else - inc = 1; - if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; - } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; - } else { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xaf - ****************************************************************************/ -void x86emuOp_scas_word(uint8_t X86EMU_UNUSED(op1)) -{ - int inc; - uint32_t val; - - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("SCAS\tDWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; - } else { - DECODE_PRINTF("SCAS\tWORD\r\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (uint16_t)val); - } - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; - } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (uint16_t)val); - } - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; - } else { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (uint16_t)val); - } - M.x86.R_DI += inc; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xb0 - 0xb7 - ****************************************************************************/ -void x86emuOp_mov_byte_register_IMM(uint8_t op1) -{ - uint8_t imm, *ptr; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - ptr = DECODE_RM_BYTE_REGISTER(op1 & 0x7); - DECODE_PRINTF(","); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", imm); - TRACE_AND_STEP(); - *ptr = imm; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xb8 - 0xbf - ****************************************************************************/ -void x86emuOp_mov_word_register_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint32_t srcval; - - op1 &= 0x7; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *reg32; - reg32 = DECODE_RM_LONG_REGISTER(op1); - srcval = fetch_long_imm(); - DECODE_PRINTF2(",%x\r\n", srcval); - TRACE_AND_STEP(); - *reg32 = srcval; - } else { - uint16_t *reg16; - reg16 = DECODE_RM_WORD_REGISTER(op1); - srcval = fetch_word_imm(); - DECODE_PRINTF2(",%x\r\n", srcval); - TRACE_AND_STEP(); - *reg16 = (uint16_t)srcval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc0 - ****************************************************************************/ -void x86emuOp_opcC0_byte_RM_MEM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, amt); - *destreg = destval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc1 - ****************************************************************************/ -void x86emuOp_opcC1_word_RM_MEM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - TRACE_AND_STEP(); - *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", amt); - TRACE_AND_STEP(); - *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc2 - ****************************************************************************/ -void x86emuOp_ret_near_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("RET\t"); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - RETURN_TRACE("RET", M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - M.x86.R_SP += imm; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc3 - ****************************************************************************/ -void x86emuOp_ret_near(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("RET\r\n"); - RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc4 - ****************************************************************************/ -void x86emuOp_les_R_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LES\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_ES = fetch_data_word(srcoffset + 2); - } - /* else UNDEFINED! register to register */ - - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc5 - ****************************************************************************/ -void x86emuOp_lds_R_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LDS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_DS = fetch_data_word(srcoffset + 2); - } - /* else UNDEFINED! */ - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc6 - ****************************************************************************/ -void x86emuOp_mov_byte_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\r\n"); - HALT_SYS(); - } - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - store_data_byte(destoffset, imm); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc7 - ****************************************************************************/ -void x86emuOp_mov_word_RM_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOV\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\r\n"); - HALT_SYS(); - } - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t imm; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - store_data_long(destoffset, imm); - } else { - uint16_t imm; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - store_data_word(destoffset, imm); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t imm; - - destreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } else { - uint16_t *destreg; - uint16_t imm; - - destreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\r\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc8 - ****************************************************************************/ -void x86emuOp_enter(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t local,frame_pointer; - uint8_t nesting; - int i; - - START_OF_INSTR(); - local = fetch_word_imm(); - nesting = fetch_byte_imm(); - DECODE_PRINTF2("ENTER %x\r\n", local); - DECODE_PRINTF2(",%x\r\n", nesting); - TRACE_AND_STEP(); - push_word(M.x86.R_BP); - frame_pointer = M.x86.R_SP; - if (nesting > 0) { - for (i = 1; i < nesting; i++) { - M.x86.R_BP -= 2; - push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP)); - } - push_word(frame_pointer); - } - M.x86.R_BP = frame_pointer; - M.x86.R_SP = (uint16_t)(M.x86.R_SP - local); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xc9 - ****************************************************************************/ -void x86emuOp_leave(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("LEAVE\r\n"); - TRACE_AND_STEP(); - M.x86.R_SP = M.x86.R_BP; - M.x86.R_BP = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xca - ****************************************************************************/ -void x86emuOp_ret_far_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t imm; - - START_OF_INSTR(); - DECODE_PRINTF("RETF\t"); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", imm); - RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - M.x86.R_CS = pop_word(); - M.x86.R_SP += imm; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcb - ****************************************************************************/ -void x86emuOp_ret_far(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("RETF\r\n"); - RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip); - TRACE_AND_STEP(); - M.x86.R_IP = pop_word(); - M.x86.R_CS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcc - ****************************************************************************/ -void x86emuOp_int3(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t tmp; - - START_OF_INSTR(); - DECODE_PRINTF("INT 3\r\n"); - tmp = (uint16_t) mem_access_word(3 * 4 + 2); - /* access the segment register */ - TRACE_AND_STEP(); - if (_X86EMU_intrTab[3]) { - (*_X86EMU_intrTab[3])(3); - } else { - push_word((uint16_t)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(3 * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(3 * 4); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcd - ****************************************************************************/ -void x86emuOp_int_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t tmp; - uint8_t intnum; - - START_OF_INSTR(); - DECODE_PRINTF("INT\t"); - intnum = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", intnum); - tmp = mem_access_word(intnum * 4 + 2); - TRACE_AND_STEP(); - if (_X86EMU_intrTab[intnum]) { - (*_X86EMU_intrTab[intnum])(intnum); - } else { - push_word((uint16_t)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(intnum * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(intnum * 4); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xce - ****************************************************************************/ -void x86emuOp_into(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t tmp; - - START_OF_INSTR(); - DECODE_PRINTF("INTO\r\n"); - TRACE_AND_STEP(); - if (ACCESS_FLAG(F_OF)) { - tmp = mem_access_word(4 * 4 + 2); - if (_X86EMU_intrTab[4]) { - (*_X86EMU_intrTab[4])(4); - } else { - push_word((uint16_t)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(4 * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(4 * 4); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xcf - ****************************************************************************/ -void x86emuOp_iret(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("IRET\r\n"); - - TRACE_AND_STEP(); - - M.x86.R_IP = pop_word(); - M.x86.R_CS = pop_word(); - M.x86.R_FLG = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd0 - ****************************************************************************/ -void x86emuOp_opcD0_byte_RM_1(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",1\r\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, 1); - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(",1\r\n"); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, 1); - *destreg = destval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd1 - ****************************************************************************/ -void x86emuOp_opcD1_word_RM_1(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",1\r\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, 1); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",1\r\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, 1); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(",1\r\n"); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (*destreg, 1); - *destreg = destval; - } else { - uint16_t destval; - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(",1\r\n"); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (*destreg, 1); - *destreg = destval; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd2 - ****************************************************************************/ -void x86emuOp_opcD2_byte_RM_CL(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - amt = M.x86.R_CL; - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",CL\r\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, amt); - *destreg = destval; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd3 - ****************************************************************************/ -void x86emuOp_opcD3_word_RM_CL(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t amt; - - /* - * Yet another weirdo special case instruction format. Part of - * the opcode held below in "RH". Doubly nested case would - * result, except that the decoded instruction - */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } - } -#endif - /* know operation, decode the mod byte to find the addressing - mode. */ - amt = M.x86.R_CL; - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",CL\r\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(",CL\r\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd4 - ****************************************************************************/ -void x86emuOp_aam(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t a; - - START_OF_INSTR(); - DECODE_PRINTF("AAM\r\n"); - a = fetch_byte_imm(); /* this is a stupid encoding. */ - if (a != 10) { - DECODE_PRINTF("ERROR DECODING AAM\r\n"); - TRACE_REGS(); - HALT_SYS(); - } - TRACE_AND_STEP(); - /* note the type change here --- returning AL and AH in AX. */ - M.x86.R_AX = aam_word(M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xd5 - ****************************************************************************/ -void x86emuOp_aad(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t a; - - START_OF_INSTR(); - DECODE_PRINTF("AAD\r\n"); - a = fetch_byte_imm(); - TRACE_AND_STEP(); - M.x86.R_AX = aad_word(M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* opcode 0xd6 ILLEGAL OPCODE */ - -/**************************************************************************** -REMARKS: -Handles opcode 0xd7 - ****************************************************************************/ -void x86emuOp_xlat(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t addr; - - START_OF_INSTR(); - DECODE_PRINTF("XLAT\r\n"); - TRACE_AND_STEP(); - addr = (uint16_t)(M.x86.R_BX + (uint8_t)M.x86.R_AL); - M.x86.R_AL = fetch_data_byte(addr); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/* instuctions D8 .. DF are in i87_ops.c */ - -/**************************************************************************** -REMARKS: -Handles opcode 0xe0 - ****************************************************************************/ -void x86emuOp_loopne(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("LOOPNE\t"); - ip = (int8_t) fetch_byte_imm(); - ip += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_CX -= 1; - if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */ - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe1 - ****************************************************************************/ -void x86emuOp_loope(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("LOOPE\t"); - ip = (int8_t) fetch_byte_imm(); - ip += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_CX -= 1; - if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */ - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe2 - ****************************************************************************/ -void x86emuOp_loop(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("LOOP\t"); - ip = (int8_t) fetch_byte_imm(); - ip += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_CX -= 1; - if (M.x86.R_CX != 0) - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe3 - ****************************************************************************/ -void x86emuOp_jcxz(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t target; - int8_t offset; - - /* jump to byte offset if overflow flag is set */ - START_OF_INSTR(); - DECODE_PRINTF("JCXZ\t"); - offset = (int8_t)fetch_byte_imm(); - target = (uint16_t)(M.x86.R_IP + offset); - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - if (M.x86.R_CX == 0) - M.x86.R_IP = target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe4 - ****************************************************************************/ -void x86emuOp_in_byte_AL_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("IN\t"); - port = (uint8_t) fetch_byte_imm(); - DECODE_PRINTF2("%x,AL\r\n", port); - TRACE_AND_STEP(); - M.x86.R_AL = (*sys_inb)(port); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe5 - ****************************************************************************/ -void x86emuOp_in_word_AX_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("IN\t"); - port = (uint8_t) fetch_byte_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("EAX,%x\r\n", port); - } else { - DECODE_PRINTF2("AX,%x\r\n", port); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = (*sys_inl)(port); - } else { - M.x86.R_AX = (*sys_inw)(port); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe6 - ****************************************************************************/ -void x86emuOp_out_byte_IMM_AL(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("OUT\t"); - port = (uint8_t) fetch_byte_imm(); - DECODE_PRINTF2("%x,AL\r\n", port); - TRACE_AND_STEP(); - (*sys_outb)(port, M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe7 - ****************************************************************************/ -void x86emuOp_out_word_IMM_AX(uint8_t X86EMU_UNUSED(op1)) -{ - uint8_t port; - - START_OF_INSTR(); - DECODE_PRINTF("OUT\t"); - port = (uint8_t) fetch_byte_imm(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("%x,EAX\r\n", port); - } else { - DECODE_PRINTF2("%x,AX\r\n", port); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - (*sys_outl)(port, M.x86.R_EAX); - } else { - (*sys_outw)(port, M.x86.R_AX); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe8 - ****************************************************************************/ -void x86emuOp_call_near_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int16_t ip; - - START_OF_INSTR(); - DECODE_PRINTF("CALL\t"); - ip = (int16_t) fetch_word_imm(); - ip += (int16_t) M.x86.R_IP; /* CHECK SIGN */ - DECODE_PRINTF2("%x\r\n", ip); - CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, ""); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xe9 - ****************************************************************************/ -void x86emuOp_jump_near_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - int ip; - - START_OF_INSTR(); - DECODE_PRINTF("JMP\t"); - ip = (int16_t)fetch_word_imm(); - ip += (int16_t)M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_IP = (uint16_t)ip; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xea - ****************************************************************************/ -void x86emuOp_jump_far_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t cs, ip; - - START_OF_INSTR(); - DECODE_PRINTF("JMP\tFAR "); - ip = fetch_word_imm(); - cs = fetch_word_imm(); - DECODE_PRINTF2("%x:", cs); - DECODE_PRINTF2("%x\r\n", ip); - TRACE_AND_STEP(); - M.x86.R_IP = ip; - M.x86.R_CS = cs; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xeb - ****************************************************************************/ -void x86emuOp_jump_byte_IMM(uint8_t X86EMU_UNUSED(op1)) -{ - uint16_t target; - int8_t offset; - - START_OF_INSTR(); - DECODE_PRINTF("JMP\t"); - offset = (int8_t)fetch_byte_imm(); - target = (uint16_t)(M.x86.R_IP + offset); - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - M.x86.R_IP = target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xec - ****************************************************************************/ -void x86emuOp_in_byte_AL_DX(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("IN\tAL,DX\r\n"); - TRACE_AND_STEP(); - M.x86.R_AL = (*sys_inb)(M.x86.R_DX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xed - ****************************************************************************/ -void x86emuOp_in_word_AX_DX(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("IN\tEAX,DX\r\n"); - } else { - DECODE_PRINTF("IN\tAX,DX\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = (*sys_inl)(M.x86.R_DX); - } else { - M.x86.R_AX = (*sys_inw)(M.x86.R_DX); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xee - ****************************************************************************/ -void x86emuOp_out_byte_DX_AL(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("OUT\tDX,AL\r\n"); - TRACE_AND_STEP(); - (*sys_outb)(M.x86.R_DX, M.x86.R_AL); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xef - ****************************************************************************/ -void x86emuOp_out_word_DX_AX(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OUT\tDX,EAX\r\n"); - } else { - DECODE_PRINTF("OUT\tDX,AX\r\n"); - } - TRACE_AND_STEP(); - if (M.x86.mode & SYSMODE_PREFIX_DATA) - (*sys_outl)(M.x86.R_DX, M.x86.R_EAX); - else - (*sys_outw)(M.x86.R_DX, M.x86.R_AX); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf0 - ****************************************************************************/ -void x86emuOp_lock(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("LOCK:\r\n"); - TRACE_AND_STEP(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*opcode 0xf1 ILLEGAL OPERATION */ - -/**************************************************************************** -REMARKS: -Handles opcode 0xf2 - ****************************************************************************/ -void x86emuOp_repne(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("REPNE\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_REPNE; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf3 - ****************************************************************************/ -void x86emuOp_repe(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("REPE\r\n"); - TRACE_AND_STEP(); - M.x86.mode |= SYSMODE_PREFIX_REPE; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf4 - ****************************************************************************/ -void x86emuOp_halt(uint8_t X86EMU_UNUSED(op1)) -{ - START_OF_INSTR(); - DECODE_PRINTF("HALT\r\n"); - TRACE_AND_STEP(); - HALT_SYS(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf5 - ****************************************************************************/ -void x86emuOp_cmc(uint8_t X86EMU_UNUSED(op1)) -{ - /* complement the carry flag. */ - START_OF_INSTR(); - DECODE_PRINTF("CMC\r\n"); - TRACE_AND_STEP(); - TOGGLE_FLAG(F_CF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf6 - ****************************************************************************/ -void x86emuOp_opcF6_byte_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - uint8_t *destreg; - unsigned int destoffset; - uint8_t destval, srcval; - - /* long, drawn out code follows. Double switch for a total - of 32 cases. */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTF(opF6_names[rh]); - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_byte(destoffset); - - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_byte(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = not_byte(destval); - store_data_byte(destoffset, destval); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = neg_byte(destval); - store_data_byte(destoffset, destval); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_byte(destval); - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_byte(destval); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_byte(destval); - break; - default: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_byte(destval); - break; - } - } else { /* mod=11 */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_byte(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = not_byte(*destreg); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = neg_byte(*destreg); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_byte(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_byte(*destreg); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_byte(*destreg); - break; - default: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_byte(*destreg); - break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf7 - ****************************************************************************/ -void x86emuOp_opcF7_word_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - DECODE_PRINTF(opF6_names[rh]); - if (mod < 3) { - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval, srcval; - - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_long(destoffset); - - switch (rh) { - case 0: - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_long(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = not_long(destval); - store_data_long(destoffset, destval); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = neg_long(destval); - store_data_long(destoffset, destval); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_long(destval); - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_long(destval); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_long(destval); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_long(destval); - break; - } - } else { - uint16_t destval, srcval; - - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rmXX_address(mod, rl); - destval = fetch_data_word(destoffset); - - switch (rh) { - case 0: /* test word imm */ - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_word(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = not_word(destval); - store_data_word(destoffset, destval); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - destval = neg_word(destval); - store_data_word(destoffset, destval); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_word(destval); - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_word(destval); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_word(destval); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_word(destval); - break; - } - } - - } else { /* mod=11 */ - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rl); - - switch (rh) { - case 0: /* test word imm */ - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_long(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = not_long(*destreg); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = neg_long(*destreg); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_long(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_long(*destreg); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_long(*destreg); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_long(*destreg); - break; - } - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rl); - - switch (rh) { - case 0: /* test word imm */ - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\r\n", srcval); - TRACE_AND_STEP(); - test_word(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\r\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = not_word(*destreg); - break; - case 3: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = neg_word(*destreg); - break; - case 4: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - mul_word(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - imul_word(*destreg); - break; - case 6: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - div_word(*destreg); - break; - case 7: - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - idiv_word(*destreg); - break; - } - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf8 - ****************************************************************************/ -void x86emuOp_clc(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear the carry flag. */ - START_OF_INSTR(); - DECODE_PRINTF("CLC\r\n"); - TRACE_AND_STEP(); - CLEAR_FLAG(F_CF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xf9 - ****************************************************************************/ -void x86emuOp_stc(uint8_t X86EMU_UNUSED(op1)) -{ - /* set the carry flag. */ - START_OF_INSTR(); - DECODE_PRINTF("STC\r\n"); - TRACE_AND_STEP(); - SET_FLAG(F_CF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfa - ****************************************************************************/ -void x86emuOp_cli(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("CLI\r\n"); - TRACE_AND_STEP(); - CLEAR_FLAG(F_IF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfb - ****************************************************************************/ -void x86emuOp_sti(uint8_t X86EMU_UNUSED(op1)) -{ - /* enable interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("STI\r\n"); - TRACE_AND_STEP(); - SET_FLAG(F_IF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfc - ****************************************************************************/ -void x86emuOp_cld(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("CLD\r\n"); - TRACE_AND_STEP(); - CLEAR_FLAG(F_DF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfd - ****************************************************************************/ -void x86emuOp_std(uint8_t X86EMU_UNUSED(op1)) -{ - /* clear interrupts. */ - START_OF_INSTR(); - DECODE_PRINTF("STD\r\n"); - TRACE_AND_STEP(); - SET_FLAG(F_DF); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xfe - ****************************************************************************/ -void x86emuOp_opcFE_byte_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - uint8_t destval; - unsigned int destoffset; - uint8_t *destreg; - - /* Yet another special case instruction. */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - DECODE_PRINTF("INC\t"); - break; - case 1: - DECODE_PRINTF("DEC\t"); - break; - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: - DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \r\n", mod); - HALT_SYS(); - break; - } - } -#endif - if (mod < 3) { - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - if (rh == 0) - destval = inc_byte(destval); - else - destval = dec_byte(destval); - store_data_byte(destoffset, destval); - } else { - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - if (rh == 0) - *destreg = inc_byte(*destreg); - else - *destreg = dec_byte(*destreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0xff - ****************************************************************************/ -void x86emuOp_opcFF_word_RM(uint8_t X86EMU_UNUSED(op1)) -{ - int mod, rh, rl; - unsigned int destoffset = 0; - uint16_t *destreg; - uint16_t destval,destval2; - - /* Yet another special case instruction. */ - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef DBG_X86EMU - if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tDWORD PTR "); - } else { - DECODE_PRINTF("INC\tWORD PTR "); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tDWORD PTR "); - } else { - DECODE_PRINTF("DEC\tWORD PTR "); - } - break; - case 2: - DECODE_PRINTF("CALL\t "); - break; - case 3: - DECODE_PRINTF("CALL\tFAR "); - break; - case 4: - DECODE_PRINTF("JMP\t"); - break; - case 5: - DECODE_PRINTF("JMP\tFAR "); - break; - case 6: - DECODE_PRINTF("PUSH\t"); - break; - case 7: - DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t"); - HALT_SYS(); - break; - } - } -#endif - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - switch (rh) { - case 0: /* inc word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = inc_long(destval); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = inc_word(destval); - store_data_word(destoffset, destval); - } - break; - case 1: /* dec word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = dec_long(destval); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = dec_word(destval); - store_data_word(destoffset, destval); - } - break; - case 2: /* call word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 3: /* call far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = destval2; - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 4: /* jmp word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - break; - case 5: /* jmp far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - M.x86.R_CS = destval2; - break; - case 6: /* push word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - push_long(destval); - } else { - uint16_t destval; - - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(destval); - } - break; - } - } else { - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = inc_long(*destreg); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = inc_word(*destreg); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = dec_long(*destreg); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = dec_word(*destreg); - } - break; - case 2: /* call word ptr ... */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = *destreg; - break; - case 3: /* jmp far ptr ... */ - DECODE_PRINTF("OPERATION UNDEFINED 0XFF \r\n"); - TRACE_AND_STEP(); - HALT_SYS(); - break; - - case 4: /* jmp ... */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - M.x86.R_IP = (uint16_t) (*destreg); - break; - case 5: /* jmp far ptr ... */ - DECODE_PRINTF("OPERATION UNDEFINED 0XFF \r\n"); - TRACE_AND_STEP(); - HALT_SYS(); - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_long(*destreg); - } else { - uint16_t *destreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - push_word(*destreg); - } - break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*************************************************************************** - * Single byte operation code table: - **************************************************************************/ -void (*x86emu_optab[256])(uint8_t) = -{ - /* 0x00 */ x86emuOp_genop_byte_RM_R, - /* 0x01 */ x86emuOp_genop_word_RM_R, - /* 0x02 */ x86emuOp_genop_byte_R_RM, - /* 0x03 */ x86emuOp_genop_word_R_RM, - /* 0x04 */ x86emuOp_genop_byte_AL_IMM, - /* 0x05 */ x86emuOp_genop_word_AX_IMM, - /* 0x06 */ x86emuOp_push_ES, - /* 0x07 */ x86emuOp_pop_ES, - - /* 0x08 */ x86emuOp_genop_byte_RM_R, - /* 0x09 */ x86emuOp_genop_word_RM_R, - /* 0x0a */ x86emuOp_genop_byte_R_RM, - /* 0x0b */ x86emuOp_genop_word_R_RM, - /* 0x0c */ x86emuOp_genop_byte_AL_IMM, - /* 0x0d */ x86emuOp_genop_word_AX_IMM, - /* 0x0e */ x86emuOp_push_CS, - /* 0x0f */ x86emuOp_two_byte, - - /* 0x10 */ x86emuOp_genop_byte_RM_R, - /* 0x11 */ x86emuOp_genop_word_RM_R, - /* 0x12 */ x86emuOp_genop_byte_R_RM, - /* 0x13 */ x86emuOp_genop_word_R_RM, - /* 0x14 */ x86emuOp_genop_byte_AL_IMM, - /* 0x15 */ x86emuOp_genop_word_AX_IMM, - /* 0x16 */ x86emuOp_push_SS, - /* 0x17 */ x86emuOp_pop_SS, - - /* 0x18 */ x86emuOp_genop_byte_RM_R, - /* 0x19 */ x86emuOp_genop_word_RM_R, - /* 0x1a */ x86emuOp_genop_byte_R_RM, - /* 0x1b */ x86emuOp_genop_word_R_RM, - /* 0x1c */ x86emuOp_genop_byte_AL_IMM, - /* 0x1d */ x86emuOp_genop_word_AX_IMM, - /* 0x1e */ x86emuOp_push_DS, - /* 0x1f */ x86emuOp_pop_DS, - - /* 0x20 */ x86emuOp_genop_byte_RM_R, - /* 0x21 */ x86emuOp_genop_word_RM_R, - /* 0x22 */ x86emuOp_genop_byte_R_RM, - /* 0x23 */ x86emuOp_genop_word_R_RM, - /* 0x24 */ x86emuOp_genop_byte_AL_IMM, - /* 0x25 */ x86emuOp_genop_word_AX_IMM, - /* 0x26 */ x86emuOp_segovr_ES, - /* 0x27 */ x86emuOp_daa, - - /* 0x28 */ x86emuOp_genop_byte_RM_R, - /* 0x29 */ x86emuOp_genop_word_RM_R, - /* 0x2a */ x86emuOp_genop_byte_R_RM, - /* 0x2b */ x86emuOp_genop_word_R_RM, - /* 0x2c */ x86emuOp_genop_byte_AL_IMM, - /* 0x2d */ x86emuOp_genop_word_AX_IMM, - /* 0x2e */ x86emuOp_segovr_CS, - /* 0x2f */ x86emuOp_das, - - /* 0x30 */ x86emuOp_genop_byte_RM_R, - /* 0x31 */ x86emuOp_genop_word_RM_R, - /* 0x32 */ x86emuOp_genop_byte_R_RM, - /* 0x33 */ x86emuOp_genop_word_R_RM, - /* 0x34 */ x86emuOp_genop_byte_AL_IMM, - /* 0x35 */ x86emuOp_genop_word_AX_IMM, - /* 0x36 */ x86emuOp_segovr_SS, - /* 0x37 */ x86emuOp_aaa, - - /* 0x38 */ x86emuOp_genop_byte_RM_R, - /* 0x39 */ x86emuOp_genop_word_RM_R, - /* 0x3a */ x86emuOp_genop_byte_R_RM, - /* 0x3b */ x86emuOp_genop_word_R_RM, - /* 0x3c */ x86emuOp_genop_byte_AL_IMM, - /* 0x3d */ x86emuOp_genop_word_AX_IMM, - /* 0x3e */ x86emuOp_segovr_DS, - /* 0x3f */ x86emuOp_aas, - - /* 0x40 */ x86emuOp_inc_register, - /* 0x41 */ x86emuOp_inc_register, - /* 0x42 */ x86emuOp_inc_register, - /* 0x43 */ x86emuOp_inc_register, - /* 0x44 */ x86emuOp_inc_register, - /* 0x45 */ x86emuOp_inc_register, - /* 0x46 */ x86emuOp_inc_register, - /* 0x47 */ x86emuOp_inc_register, - - /* 0x48 */ x86emuOp_dec_register, - /* 0x49 */ x86emuOp_dec_register, - /* 0x4a */ x86emuOp_dec_register, - /* 0x4b */ x86emuOp_dec_register, - /* 0x4c */ x86emuOp_dec_register, - /* 0x4d */ x86emuOp_dec_register, - /* 0x4e */ x86emuOp_dec_register, - /* 0x4f */ x86emuOp_dec_register, - - /* 0x50 */ x86emuOp_push_register, - /* 0x51 */ x86emuOp_push_register, - /* 0x52 */ x86emuOp_push_register, - /* 0x53 */ x86emuOp_push_register, - /* 0x54 */ x86emuOp_push_register, - /* 0x55 */ x86emuOp_push_register, - /* 0x56 */ x86emuOp_push_register, - /* 0x57 */ x86emuOp_push_register, - - /* 0x58 */ x86emuOp_pop_register, - /* 0x59 */ x86emuOp_pop_register, - /* 0x5a */ x86emuOp_pop_register, - /* 0x5b */ x86emuOp_pop_register, - /* 0x5c */ x86emuOp_pop_register, - /* 0x5d */ x86emuOp_pop_register, - /* 0x5e */ x86emuOp_pop_register, - /* 0x5f */ x86emuOp_pop_register, - - /* 0x60 */ x86emuOp_push_all, - /* 0x61 */ x86emuOp_pop_all, - /* 0x62 */ x86emuOp_illegal_op, /* bound */ - /* 0x63 */ x86emuOp_illegal_op, /* arpl */ - /* 0x64 */ x86emuOp_segovr_FS, - /* 0x65 */ x86emuOp_segovr_GS, - /* 0x66 */ x86emuOp_prefix_data, - /* 0x67 */ x86emuOp_prefix_addr, - - /* 0x68 */ x86emuOp_push_word_IMM, - /* 0x69 */ x86emuOp_imul_word_IMM, - /* 0x6a */ x86emuOp_push_byte_IMM, - /* 0x6b */ x86emuOp_imul_byte_IMM, - /* 0x6c */ x86emuOp_ins_byte, - /* 0x6d */ x86emuOp_ins_word, - /* 0x6e */ x86emuOp_outs_byte, - /* 0x6f */ x86emuOp_outs_word, - - /* 0x70 */ x86emuOp_jump_near_cond, - /* 0x71 */ x86emuOp_jump_near_cond, - /* 0x72 */ x86emuOp_jump_near_cond, - /* 0x73 */ x86emuOp_jump_near_cond, - /* 0x74 */ x86emuOp_jump_near_cond, - /* 0x75 */ x86emuOp_jump_near_cond, - /* 0x76 */ x86emuOp_jump_near_cond, - /* 0x77 */ x86emuOp_jump_near_cond, - - /* 0x78 */ x86emuOp_jump_near_cond, - /* 0x79 */ x86emuOp_jump_near_cond, - /* 0x7a */ x86emuOp_jump_near_cond, - /* 0x7b */ x86emuOp_jump_near_cond, - /* 0x7c */ x86emuOp_jump_near_cond, - /* 0x7d */ x86emuOp_jump_near_cond, - /* 0x7e */ x86emuOp_jump_near_cond, - /* 0x7f */ x86emuOp_jump_near_cond, - - /* 0x80 */ x86emuOp_opc80_byte_RM_IMM, - /* 0x81 */ x86emuOp_opc81_word_RM_IMM, - /* 0x82 */ x86emuOp_opc82_byte_RM_IMM, - /* 0x83 */ x86emuOp_opc83_word_RM_IMM, - /* 0x84 */ x86emuOp_test_byte_RM_R, - /* 0x85 */ x86emuOp_test_word_RM_R, - /* 0x86 */ x86emuOp_xchg_byte_RM_R, - /* 0x87 */ x86emuOp_xchg_word_RM_R, - - /* 0x88 */ x86emuOp_mov_byte_RM_R, - /* 0x89 */ x86emuOp_mov_word_RM_R, - /* 0x8a */ x86emuOp_mov_byte_R_RM, - /* 0x8b */ x86emuOp_mov_word_R_RM, - /* 0x8c */ x86emuOp_mov_word_RM_SR, - /* 0x8d */ x86emuOp_lea_word_R_M, - /* 0x8e */ x86emuOp_mov_word_SR_RM, - /* 0x8f */ x86emuOp_pop_RM, - - /* 0x90 */ x86emuOp_nop, - /* 0x91 */ x86emuOp_xchg_word_AX_register, - /* 0x92 */ x86emuOp_xchg_word_AX_register, - /* 0x93 */ x86emuOp_xchg_word_AX_register, - /* 0x94 */ x86emuOp_xchg_word_AX_register, - /* 0x95 */ x86emuOp_xchg_word_AX_register, - /* 0x96 */ x86emuOp_xchg_word_AX_register, - /* 0x97 */ x86emuOp_xchg_word_AX_register, - - /* 0x98 */ x86emuOp_cbw, - /* 0x99 */ x86emuOp_cwd, - /* 0x9a */ x86emuOp_call_far_IMM, - /* 0x9b */ x86emuOp_wait, - /* 0x9c */ x86emuOp_pushf_word, - /* 0x9d */ x86emuOp_popf_word, - /* 0x9e */ x86emuOp_sahf, - /* 0x9f */ x86emuOp_lahf, - - /* 0xa0 */ x86emuOp_mov_AL_M_IMM, - /* 0xa1 */ x86emuOp_mov_AX_M_IMM, - /* 0xa2 */ x86emuOp_mov_M_AL_IMM, - /* 0xa3 */ x86emuOp_mov_M_AX_IMM, - /* 0xa4 */ x86emuOp_movs_byte, - /* 0xa5 */ x86emuOp_movs_word, - /* 0xa6 */ x86emuOp_cmps_byte, - /* 0xa7 */ x86emuOp_cmps_word, - /* 0xa8 */ x86emuOp_test_AL_IMM, - /* 0xa9 */ x86emuOp_test_AX_IMM, - /* 0xaa */ x86emuOp_stos_byte, - /* 0xab */ x86emuOp_stos_word, - /* 0xac */ x86emuOp_lods_byte, - /* 0xad */ x86emuOp_lods_word, - /* 0xac */ x86emuOp_scas_byte, - /* 0xad */ x86emuOp_scas_word, - - /* 0xb0 */ x86emuOp_mov_byte_register_IMM, - /* 0xb1 */ x86emuOp_mov_byte_register_IMM, - /* 0xb2 */ x86emuOp_mov_byte_register_IMM, - /* 0xb3 */ x86emuOp_mov_byte_register_IMM, - /* 0xb4 */ x86emuOp_mov_byte_register_IMM, - /* 0xb5 */ x86emuOp_mov_byte_register_IMM, - /* 0xb6 */ x86emuOp_mov_byte_register_IMM, - /* 0xb7 */ x86emuOp_mov_byte_register_IMM, - - /* 0xb8 */ x86emuOp_mov_word_register_IMM, - /* 0xb9 */ x86emuOp_mov_word_register_IMM, - /* 0xba */ x86emuOp_mov_word_register_IMM, - /* 0xbb */ x86emuOp_mov_word_register_IMM, - /* 0xbc */ x86emuOp_mov_word_register_IMM, - /* 0xbd */ x86emuOp_mov_word_register_IMM, - /* 0xbe */ x86emuOp_mov_word_register_IMM, - /* 0xbf */ x86emuOp_mov_word_register_IMM, - - /* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM, - /* 0xc1 */ x86emuOp_opcC1_word_RM_MEM, - /* 0xc2 */ x86emuOp_ret_near_IMM, - /* 0xc3 */ x86emuOp_ret_near, - /* 0xc4 */ x86emuOp_les_R_IMM, - /* 0xc5 */ x86emuOp_lds_R_IMM, - /* 0xc6 */ x86emuOp_mov_byte_RM_IMM, - /* 0xc7 */ x86emuOp_mov_word_RM_IMM, - /* 0xc8 */ x86emuOp_enter, - /* 0xc9 */ x86emuOp_leave, - /* 0xca */ x86emuOp_ret_far_IMM, - /* 0xcb */ x86emuOp_ret_far, - /* 0xcc */ x86emuOp_int3, - /* 0xcd */ x86emuOp_int_IMM, - /* 0xce */ x86emuOp_into, - /* 0xcf */ x86emuOp_iret, - - /* 0xd0 */ x86emuOp_opcD0_byte_RM_1, - /* 0xd1 */ x86emuOp_opcD1_word_RM_1, - /* 0xd2 */ x86emuOp_opcD2_byte_RM_CL, - /* 0xd3 */ x86emuOp_opcD3_word_RM_CL, - /* 0xd4 */ x86emuOp_aam, - /* 0xd5 */ x86emuOp_aad, - /* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */ - /* 0xd7 */ x86emuOp_xlat, - /* 0xd8 */ x86emuOp_esc_coprocess_d8, - /* 0xd9 */ x86emuOp_esc_coprocess_d9, - /* 0xda */ x86emuOp_esc_coprocess_da, - /* 0xdb */ x86emuOp_esc_coprocess_db, - /* 0xdc */ x86emuOp_esc_coprocess_dc, - /* 0xdd */ x86emuOp_esc_coprocess_dd, - /* 0xde */ x86emuOp_esc_coprocess_de, - /* 0xdf */ x86emuOp_esc_coprocess_df, - - /* 0xe0 */ x86emuOp_loopne, - /* 0xe1 */ x86emuOp_loope, - /* 0xe2 */ x86emuOp_loop, - /* 0xe3 */ x86emuOp_jcxz, - /* 0xe4 */ x86emuOp_in_byte_AL_IMM, - /* 0xe5 */ x86emuOp_in_word_AX_IMM, - /* 0xe6 */ x86emuOp_out_byte_IMM_AL, - /* 0xe7 */ x86emuOp_out_word_IMM_AX, - - /* 0xe8 */ x86emuOp_call_near_IMM, - /* 0xe9 */ x86emuOp_jump_near_IMM, - /* 0xea */ x86emuOp_jump_far_IMM, - /* 0xeb */ x86emuOp_jump_byte_IMM, - /* 0xec */ x86emuOp_in_byte_AL_DX, - /* 0xed */ x86emuOp_in_word_AX_DX, - /* 0xee */ x86emuOp_out_byte_DX_AL, - /* 0xef */ x86emuOp_out_word_DX_AX, - - /* 0xf0 */ x86emuOp_lock, - /* 0xf1 */ x86emuOp_illegal_op, - /* 0xf2 */ x86emuOp_repne, - /* 0xf3 */ x86emuOp_repe, - /* 0xf4 */ x86emuOp_halt, - /* 0xf5 */ x86emuOp_cmc, - /* 0xf6 */ x86emuOp_opcF6_byte_RM, - /* 0xf7 */ x86emuOp_opcF7_word_RM, - - /* 0xf8 */ x86emuOp_clc, - /* 0xf9 */ x86emuOp_stc, - /* 0xfa */ x86emuOp_cli, - /* 0xfb */ x86emuOp_sti, - /* 0xfc */ x86emuOp_cld, - /* 0xfd */ x86emuOp_std, - /* 0xfe */ x86emuOp_opcFE_byte_RM, - /* 0xff */ x86emuOp_opcFF_word_RM, -}; diff --git a/BaS_gcc/x86emu/x86ops2.c b/BaS_gcc/x86emu/x86ops2.c deleted file mode 100644 index 3167ea0..0000000 --- a/BaS_gcc/x86emu/x86ops2.c +++ /dev/null @@ -1,1768 +0,0 @@ -/**************************************************************************** - * - * Realmode X86 Emulator Library - * - * Copyright (C) 1991-2004 SciTech Software, Inc. - * Copyright (C) David Mosberger-Tang - * Copyright (C) 1999 Egbert Eich - * - * ======================================================================== - * - * Permission to use, copy, modify, distribute, and sell this software and - * its documentation for any purpose is hereby granted without fee, - * provided that the above copyright notice appear in all copies and that - * both that copyright notice and this permission notice appear in - * supporting documentation, and that the name of the authors not be used - * in advertising or publicity pertaining to distribution of the software - * without specific, written prior permission. The authors makes no - * representations about the suitability of this software for any purpose. - * It is provided "as is" without express or implied warranty. - * - * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF - * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR - * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - * - * ======================================================================== - * - * Language: ANSI C - * Environment: Any - * Developer: Kendall Bennett - * - * Description: This file includes subroutines to implement the decoding - * and emulation of all the x86 extended two-byte processor - * instructions. - * - ****************************************************************************/ - -#include "x86debug.h" -#include "x86emui.h" - -extern unsigned decode_rmXX_address(int mod, int rm); - -/*----------------------------- Implementation ----------------------------*/ - -/**************************************************************************** -PARAMETERS: -op1 - Instruction op code - -REMARKS: -Handles illegal opcodes. - ****************************************************************************/ -void x86emuOp2_illegal_op( - uint8_t op2) -{ - START_OF_INSTR(); - DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\r\n"); - TRACE_REGS(); - dbg("%x:%x: %x", M.x86.R_CS, M.x86.R_IP - 2, op2); - dbg(" ILLEGAL EXTENDED X86 OPCODE!\r\n"); - HALT_SYS(); - END_OF_INSTR(); -} - -#define xorl(a,b) (((a) && !(b)) || (!(a) && (b))) - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0x80-0x8F - ****************************************************************************/ -int x86emu_check_jump_condition(uint8_t op) -{ - switch (op) { - case 0x0: - DECODE_PRINTF("JO\t"); - return ACCESS_FLAG(F_OF); - case 0x1: - DECODE_PRINTF("JNO\t"); - return !ACCESS_FLAG(F_OF); - break; - case 0x2: - DECODE_PRINTF("JB\t"); - return ACCESS_FLAG(F_CF); - break; - case 0x3: - DECODE_PRINTF("JNB\t"); - return !ACCESS_FLAG(F_CF); - break; - case 0x4: - DECODE_PRINTF("JZ\t"); - return ACCESS_FLAG(F_ZF); - break; - case 0x5: - DECODE_PRINTF("JNZ\t"); - return !ACCESS_FLAG(F_ZF); - break; - case 0x6: - DECODE_PRINTF("JBE\t"); - return ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); - break; - case 0x7: - DECODE_PRINTF("JNBE\t"); - return !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); - break; - case 0x8: - DECODE_PRINTF("JS\t"); - return ACCESS_FLAG(F_SF); - break; - case 0x9: - DECODE_PRINTF("JNS\t"); - return !ACCESS_FLAG(F_SF); - break; - case 0xa: - DECODE_PRINTF("JP\t"); - return ACCESS_FLAG(F_PF); - break; - case 0xb: - DECODE_PRINTF("JNP\t"); - return !ACCESS_FLAG(F_PF); - break; - case 0xc: - DECODE_PRINTF("JL\t"); - return xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0xd: - DECODE_PRINTF("JNL\t"); - return !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0xe: - DECODE_PRINTF("JLE\t"); - return (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; - default: - DECODE_PRINTF("JNLE\t"); - return !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - } -} - -void x86emuOp2_long_jump(uint8_t op2) -{ - int32_t target; - int cond; - - /* conditional jump to word offset. */ - START_OF_INSTR(); - cond = x86emu_check_jump_condition(op2 & 0xF); - target = (int16_t) fetch_word_imm(); - target += (int16_t) M.x86.R_IP; - DECODE_PRINTF2("%x\r\n", target); - TRACE_AND_STEP(); - if (cond) - M.x86.R_IP = (uint16_t)target; - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0x90-0x9F - ****************************************************************************/ -void x86emuOp2_set_byte(uint8_t op2) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t *destreg; - char *name = 0; - int cond = 0; - - START_OF_INSTR(); - switch (op2) { - case 0x90: - name = "SETO\t"; - cond = ACCESS_FLAG(F_OF); - break; - case 0x91: - name = "SETNO\t"; - cond = !ACCESS_FLAG(F_OF); - break; - case 0x92: - name = "SETB\t"; - cond = ACCESS_FLAG(F_CF); - break; - case 0x93: - name = "SETNB\t"; - cond = !ACCESS_FLAG(F_CF); - break; - case 0x94: - name = "SETZ\t"; - cond = ACCESS_FLAG(F_ZF); - break; - case 0x95: - name = "SETNZ\t"; - cond = !ACCESS_FLAG(F_ZF); - break; - case 0x96: - name = "SETBE\t"; - cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); - break; - case 0x97: - name = "SETNBE\t"; - cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); - break; - case 0x98: - name = "SETS\t"; - cond = ACCESS_FLAG(F_SF); - break; - case 0x99: - name = "SETNS\t"; - cond = !ACCESS_FLAG(F_SF); - break; - case 0x9a: - name = "SETP\t"; - cond = ACCESS_FLAG(F_PF); - break; - case 0x9b: - name = "SETNP\t"; - cond = !ACCESS_FLAG(F_PF); - break; - case 0x9c: - name = "SETL\t"; - cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0x9d: - name = "SETNL\t"; - cond = !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; - case 0x9e: - name = "SETLE\t"; - cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; - case 0x9f: - name = "SETNLE\t"; - cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; - } - DECODE_PRINTF(name); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - TRACE_AND_STEP(); - store_data_byte(destoffset, cond ? 0x01 : 0x00); - } else { /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - TRACE_AND_STEP(); - *destreg = cond ? 0x01 : 0x00; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa0 - ****************************************************************************/ -void x86emuOp2_push_FS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tFS\r\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_FS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa1 - ****************************************************************************/ -void x86emuOp2_pop_FS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tFS\n"); - TRACE_AND_STEP(); - M.x86.R_FS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa3 - ****************************************************************************/ -void x86emuOp2_bt_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BT\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } else { - uint16_t srcval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); - } else { - uint16_t *srcreg,*shiftreg; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa4 - ****************************************************************************/ -void x86emuOp2_shld_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t shift; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shld_long(*destreg,*shiftreg,shift); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shld_word(*destreg,*shiftreg,shift); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa5 - ****************************************************************************/ -void x86emuOp2_shld_CL(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa8 - ****************************************************************************/ -void x86emuOp2_push_GS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("PUSH\tGS\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_GS); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xa9 - ****************************************************************************/ -void x86emuOp2_pop_GS(uint8_t X86EMU_UNUSED(op2)) -{ - START_OF_INSTR(); - DECODE_PRINTF("POP\tGS\r\n"); - TRACE_AND_STEP(); - M.x86.R_GS = pop_word(); - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xaa - ****************************************************************************/ -void x86emuOp2_bts_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BTS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval,mask; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval | mask); - } else { - uint16_t srcval,mask; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, srcval | mask); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg |= mask; - } else { - uint16_t *srcreg,*shiftreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg |= mask; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xac - ****************************************************************************/ -void x86emuOp2_shrd_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - uint8_t shift; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shrd_long(*destreg,*shiftreg,shift); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\r\n", shift); - TRACE_AND_STEP(); - *destreg = shrd_word(*destreg,*shiftreg,shift); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xad - ****************************************************************************/ -void x86emuOp2_shrd_CL(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int destoffset; - - START_OF_INSTR(); - DECODE_PRINTF("SHLD\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t destval; - uint32_t *shiftreg; - - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - uint16_t destval; - uint16_t *shiftreg; - - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*shiftreg; - - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL); - } else { - uint16_t *destreg,*shiftreg; - - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\r\n"); - TRACE_AND_STEP(); - *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xaf - ****************************************************************************/ -void x86emuOp2_imul_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("IMUL\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_long(srcoffset); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*destreg,(int32_t)srcval); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg; - uint16_t srcval; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - TRACE_AND_STEP(); - res = (int16_t)*destreg * (int16_t)srcval; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg,*srcreg; - uint32_t res_lo,res_hi; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(int32_t)*destreg,(int32_t)*srcreg); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint32_t)res_lo; - } else { - uint16_t *destreg,*srcreg; - uint32_t res; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - res = (int16_t)*destreg * (int16_t)*srcreg; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (uint16_t)res; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb2 - ****************************************************************************/ -void x86emuOp2_lss_R_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LSS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_SS = fetch_data_word(srcoffset + 2); - } else { /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb3 - ****************************************************************************/ -void x86emuOp2_btr_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BTR\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval,mask; - uint32_t *shiftreg; - - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval & ~mask); - } else { - uint16_t srcval,mask; - uint16_t *shiftreg; - - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, (uint16_t)(srcval & ~mask)); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg &= ~mask; - } else { - uint16_t *srcreg,*shiftreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg &= ~mask; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb4 - ****************************************************************************/ -void x86emuOp2_lfs_R_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LFS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_FS = fetch_data_word(srcoffset + 2); - } else { /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb5 - ****************************************************************************/ -void x86emuOp2_lgs_R_IMM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rh, rl; - uint16_t *dstreg; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("LGS\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_GS = fetch_data_word(srcoffset + 2); - } else { /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb6 - ****************************************************************************/ -void x86emuOp2_movzx_byte_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOVZX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - uint16_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xb7 - ****************************************************************************/ -void x86emuOp2_movzx_word_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint32_t *destreg; - uint32_t srcval; - uint16_t *srcreg; - - START_OF_INSTR(); - DECODE_PRINTF("MOVZX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xba - ****************************************************************************/ -void x86emuOp2_btX_I(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint8_t shift; - int bit; - - START_OF_INSTR(); - FETCH_DECODE_MODRM(mod, rh, rl); - switch (rh) { - case 4: - DECODE_PRINTF("BT\t"); - break; - case 5: - DECODE_PRINTF("BTS\t"); - break; - case 6: - DECODE_PRINTF("BTR\t"); - break; - case 7: - DECODE_PRINTF("BTC\t"); - break; - default: - dbg("ILLEGAL EXTENDED X86 OPCODE\n"); - TRACE_REGS(); - dbg("%x:%x: %x", M.x86.R_CS, M.x86.R_IP - 3, op2); - dbg(" %x", (mod << 6) | (rh << 3) | rl); - dbg(" ILLEGAL EXTENDED X86 OPCODE EXTENSION!\r\n"); - HALT_SYS(); - } - if (mod < 3) { - - srcoffset = decode_rmXX_address(mod, rl); - shift = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", shift); - TRACE_AND_STEP(); - - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval, mask; - - bit = shift & 0x1F; - srcval = fetch_data_long(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 5: - store_data_long(srcoffset, srcval | mask); - break; - case 6: - store_data_long(srcoffset, srcval & ~mask); - break; - case 7: - store_data_long(srcoffset, srcval ^ mask); - break; - default: - break; - } - } else { - uint16_t srcval, mask; - - bit = shift & 0xF; - srcval = fetch_data_word(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 5: - store_data_word(srcoffset, srcval | mask); - break; - case 6: - store_data_word(srcoffset, srcval & ~mask); - break; - case 7: - store_data_word(srcoffset, srcval ^ mask); - break; - default: - break; - } - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - shift = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", shift); - TRACE_AND_STEP(); - bit = shift & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - switch (rh) { - case 5: - *srcreg |= mask; - break; - case 6: - *srcreg &= ~mask; - break; - case 7: - *srcreg ^= mask; - break; - default: - break; - } - } else { - uint16_t *srcreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - shift = fetch_byte_imm(); - DECODE_PRINTF2(",%d\r\n", shift); - TRACE_AND_STEP(); - bit = shift & 0xF; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - switch (rh) { - case 5: - *srcreg |= mask; - break; - case 6: - *srcreg &= ~mask; - break; - case 7: - *srcreg ^= mask; - break; - default: - break; - } - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbb - ****************************************************************************/ -void x86emuOp2_btc_R(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - int bit,disp; - - START_OF_INSTR(); - DECODE_PRINTF("BTC\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval,mask; - uint32_t *shiftreg; - - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (int16_t)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval ^ mask); - } else { - uint16_t srcval,mask; - uint16_t *shiftreg; - - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (int16_t)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, (uint16_t)(srcval ^ mask)); - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg,*shiftreg; - uint32_t mask; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg ^= mask; - } else { - uint16_t *srcreg,*shiftreg; - uint16_t mask; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - mask = (uint16_t)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg ^= mask; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbc - ****************************************************************************/ -void x86emuOp2_bsf(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("BSF\r\n"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval, *dstreg; - - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_long(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 0; *dstreg < 32; (*dstreg)++) - if ((srcval >> *dstreg) & 1) break; - } else { - uint16_t srcval, *dstreg; - - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_word(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 0; *dstreg < 16; (*dstreg)++) - if ((srcval >> *dstreg) & 1) break; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg, *dstreg; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 0; *dstreg < 32; (*dstreg)++) - if ((*srcreg >> *dstreg) & 1) break; - } else { - uint16_t *srcreg, *dstreg; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 0; *dstreg < 16; (*dstreg)++) - if ((*srcreg >> *dstreg) & 1) break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbd - ****************************************************************************/ -void x86emuOp2_bsr(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("BSF\r\n"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - srcoffset = decode_rmXX_address(mod, rl); - DECODE_PRINTF(","); - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t srcval, *dstreg; - - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_long(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 31; *dstreg > 0; (*dstreg)--) - if ((srcval >> *dstreg) & 1) break; - } else { - uint16_t srcval, *dstreg; - - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - srcval = fetch_data_word(srcoffset); - CONDITIONAL_SET_FLAG(srcval == 0, F_ZF); - for(*dstreg = 15; *dstreg > 0; (*dstreg)--) - if ((srcval >> *dstreg) & 1) break; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *srcreg, *dstreg; - - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 31; *dstreg > 0; (*dstreg)--) - if ((*srcreg >> *dstreg) & 1) break; - } else { - uint16_t *srcreg, *dstreg; - - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - dstreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF); - for(*dstreg = 15; *dstreg > 0; (*dstreg)--) - if ((*srcreg >> *dstreg) & 1) break; - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbe - ****************************************************************************/ -void x86emuOp2_movsx_byte_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - - START_OF_INSTR(); - DECODE_PRINTF("MOVSX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint32_t srcval; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = (int32_t)((int8_t)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - uint16_t *destreg; - uint16_t srcval; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = (int16_t)((int8_t)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - } else { /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - uint32_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = (int32_t)((int8_t)*srcreg); - } else { - uint16_t *destreg; - uint8_t *srcreg; - - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = (int16_t)((int8_t)*srcreg); - } - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/**************************************************************************** -REMARKS: -Handles opcode 0x0f,0xbf - ****************************************************************************/ -void x86emuOp2_movsx_word_R_RM(uint8_t X86EMU_UNUSED(op2)) -{ - int mod, rl, rh; - unsigned int srcoffset; - uint32_t *destreg; - uint32_t srcval; - uint16_t *srcreg; - - START_OF_INSTR(); - DECODE_PRINTF("MOVSX\t"); - FETCH_DECODE_MODRM(mod, rh, rl); - if (mod < 3) { - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rmXX_address(mod, rl); - srcval = (int32_t)((int16_t)fetch_data_word(srcoffset)); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { /* register to register */ - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\r\n"); - TRACE_AND_STEP(); - *destreg = (int32_t)((int16_t)*srcreg); - } - DECODE_CLEAR_SEGOVR(); - END_OF_INSTR(); -} - -/*************************************************************************** - * Double byte operation code table: - **************************************************************************/ -void (*x86emu_optab2[256])(uint8_t) = -{ - /* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */ - /* 0x01 */ x86emuOp2_illegal_op, /* Group G (ring 0 PM) */ - /* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */ - /* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */ - /* 0x04 */ x86emuOp2_illegal_op, - /* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */ - /* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */ - /* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */ - /* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */ - /* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */ - /* 0x0a */ x86emuOp2_illegal_op, - /* 0x0b */ x86emuOp2_illegal_op, - /* 0x0c */ x86emuOp2_illegal_op, - /* 0x0d */ x86emuOp2_illegal_op, - /* 0x0e */ x86emuOp2_illegal_op, - /* 0x0f */ x86emuOp2_illegal_op, - - /* 0x10 */ x86emuOp2_illegal_op, - /* 0x11 */ x86emuOp2_illegal_op, - /* 0x12 */ x86emuOp2_illegal_op, - /* 0x13 */ x86emuOp2_illegal_op, - /* 0x14 */ x86emuOp2_illegal_op, - /* 0x15 */ x86emuOp2_illegal_op, - /* 0x16 */ x86emuOp2_illegal_op, - /* 0x17 */ x86emuOp2_illegal_op, - /* 0x18 */ x86emuOp2_illegal_op, - /* 0x19 */ x86emuOp2_illegal_op, - /* 0x1a */ x86emuOp2_illegal_op, - /* 0x1b */ x86emuOp2_illegal_op, - /* 0x1c */ x86emuOp2_illegal_op, - /* 0x1d */ x86emuOp2_illegal_op, - /* 0x1e */ x86emuOp2_illegal_op, - /* 0x1f */ x86emuOp2_illegal_op, - - /* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */ - /* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */ - /* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */ - /* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */ - /* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */ - /* 0x25 */ x86emuOp2_illegal_op, - /* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */ - /* 0x27 */ x86emuOp2_illegal_op, - /* 0x28 */ x86emuOp2_illegal_op, - /* 0x29 */ x86emuOp2_illegal_op, - /* 0x2a */ x86emuOp2_illegal_op, - /* 0x2b */ x86emuOp2_illegal_op, - /* 0x2c */ x86emuOp2_illegal_op, - /* 0x2d */ x86emuOp2_illegal_op, - /* 0x2e */ x86emuOp2_illegal_op, - /* 0x2f */ x86emuOp2_illegal_op, - - /* 0x30 */ x86emuOp2_illegal_op, - /* 0x31 */ x86emuOp2_illegal_op, - /* 0x32 */ x86emuOp2_illegal_op, - /* 0x33 */ x86emuOp2_illegal_op, - /* 0x34 */ x86emuOp2_illegal_op, - /* 0x35 */ x86emuOp2_illegal_op, - /* 0x36 */ x86emuOp2_illegal_op, - /* 0x37 */ x86emuOp2_illegal_op, - /* 0x38 */ x86emuOp2_illegal_op, - /* 0x39 */ x86emuOp2_illegal_op, - /* 0x3a */ x86emuOp2_illegal_op, - /* 0x3b */ x86emuOp2_illegal_op, - /* 0x3c */ x86emuOp2_illegal_op, - /* 0x3d */ x86emuOp2_illegal_op, - /* 0x3e */ x86emuOp2_illegal_op, - /* 0x3f */ x86emuOp2_illegal_op, - - /* 0x40 */ x86emuOp2_illegal_op, - /* 0x41 */ x86emuOp2_illegal_op, - /* 0x42 */ x86emuOp2_illegal_op, - /* 0x43 */ x86emuOp2_illegal_op, - /* 0x44 */ x86emuOp2_illegal_op, - /* 0x45 */ x86emuOp2_illegal_op, - /* 0x46 */ x86emuOp2_illegal_op, - /* 0x47 */ x86emuOp2_illegal_op, - /* 0x48 */ x86emuOp2_illegal_op, - /* 0x49 */ x86emuOp2_illegal_op, - /* 0x4a */ x86emuOp2_illegal_op, - /* 0x4b */ x86emuOp2_illegal_op, - /* 0x4c */ x86emuOp2_illegal_op, - /* 0x4d */ x86emuOp2_illegal_op, - /* 0x4e */ x86emuOp2_illegal_op, - /* 0x4f */ x86emuOp2_illegal_op, - - /* 0x50 */ x86emuOp2_illegal_op, - /* 0x51 */ x86emuOp2_illegal_op, - /* 0x52 */ x86emuOp2_illegal_op, - /* 0x53 */ x86emuOp2_illegal_op, - /* 0x54 */ x86emuOp2_illegal_op, - /* 0x55 */ x86emuOp2_illegal_op, - /* 0x56 */ x86emuOp2_illegal_op, - /* 0x57 */ x86emuOp2_illegal_op, - /* 0x58 */ x86emuOp2_illegal_op, - /* 0x59 */ x86emuOp2_illegal_op, - /* 0x5a */ x86emuOp2_illegal_op, - /* 0x5b */ x86emuOp2_illegal_op, - /* 0x5c */ x86emuOp2_illegal_op, - /* 0x5d */ x86emuOp2_illegal_op, - /* 0x5e */ x86emuOp2_illegal_op, - /* 0x5f */ x86emuOp2_illegal_op, - - /* 0x60 */ x86emuOp2_illegal_op, - /* 0x61 */ x86emuOp2_illegal_op, - /* 0x62 */ x86emuOp2_illegal_op, - /* 0x63 */ x86emuOp2_illegal_op, - /* 0x64 */ x86emuOp2_illegal_op, - /* 0x65 */ x86emuOp2_illegal_op, - /* 0x66 */ x86emuOp2_illegal_op, - /* 0x67 */ x86emuOp2_illegal_op, - /* 0x68 */ x86emuOp2_illegal_op, - /* 0x69 */ x86emuOp2_illegal_op, - /* 0x6a */ x86emuOp2_illegal_op, - /* 0x6b */ x86emuOp2_illegal_op, - /* 0x6c */ x86emuOp2_illegal_op, - /* 0x6d */ x86emuOp2_illegal_op, - /* 0x6e */ x86emuOp2_illegal_op, - /* 0x6f */ x86emuOp2_illegal_op, - - /* 0x70 */ x86emuOp2_illegal_op, - /* 0x71 */ x86emuOp2_illegal_op, - /* 0x72 */ x86emuOp2_illegal_op, - /* 0x73 */ x86emuOp2_illegal_op, - /* 0x74 */ x86emuOp2_illegal_op, - /* 0x75 */ x86emuOp2_illegal_op, - /* 0x76 */ x86emuOp2_illegal_op, - /* 0x77 */ x86emuOp2_illegal_op, - /* 0x78 */ x86emuOp2_illegal_op, - /* 0x79 */ x86emuOp2_illegal_op, - /* 0x7a */ x86emuOp2_illegal_op, - /* 0x7b */ x86emuOp2_illegal_op, - /* 0x7c */ x86emuOp2_illegal_op, - /* 0x7d */ x86emuOp2_illegal_op, - /* 0x7e */ x86emuOp2_illegal_op, - /* 0x7f */ x86emuOp2_illegal_op, - - /* 0x80 */ x86emuOp2_long_jump, - /* 0x81 */ x86emuOp2_long_jump, - /* 0x82 */ x86emuOp2_long_jump, - /* 0x83 */ x86emuOp2_long_jump, - /* 0x84 */ x86emuOp2_long_jump, - /* 0x85 */ x86emuOp2_long_jump, - /* 0x86 */ x86emuOp2_long_jump, - /* 0x87 */ x86emuOp2_long_jump, - /* 0x88 */ x86emuOp2_long_jump, - /* 0x89 */ x86emuOp2_long_jump, - /* 0x8a */ x86emuOp2_long_jump, - /* 0x8b */ x86emuOp2_long_jump, - /* 0x8c */ x86emuOp2_long_jump, - /* 0x8d */ x86emuOp2_long_jump, - /* 0x8e */ x86emuOp2_long_jump, - /* 0x8f */ x86emuOp2_long_jump, - - /* 0x90 */ x86emuOp2_set_byte, - /* 0x91 */ x86emuOp2_set_byte, - /* 0x92 */ x86emuOp2_set_byte, - /* 0x93 */ x86emuOp2_set_byte, - /* 0x94 */ x86emuOp2_set_byte, - /* 0x95 */ x86emuOp2_set_byte, - /* 0x96 */ x86emuOp2_set_byte, - /* 0x97 */ x86emuOp2_set_byte, - /* 0x98 */ x86emuOp2_set_byte, - /* 0x99 */ x86emuOp2_set_byte, - /* 0x9a */ x86emuOp2_set_byte, - /* 0x9b */ x86emuOp2_set_byte, - /* 0x9c */ x86emuOp2_set_byte, - /* 0x9d */ x86emuOp2_set_byte, - /* 0x9e */ x86emuOp2_set_byte, - /* 0x9f */ x86emuOp2_set_byte, - - /* 0xa0 */ x86emuOp2_push_FS, - /* 0xa1 */ x86emuOp2_pop_FS, - /* 0xa2 */ x86emuOp2_illegal_op, - /* 0xa3 */ x86emuOp2_bt_R, - /* 0xa4 */ x86emuOp2_shld_IMM, - /* 0xa5 */ x86emuOp2_shld_CL, - /* 0xa6 */ x86emuOp2_illegal_op, - /* 0xa7 */ x86emuOp2_illegal_op, - /* 0xa8 */ x86emuOp2_push_GS, - /* 0xa9 */ x86emuOp2_pop_GS, - /* 0xaa */ x86emuOp2_illegal_op, - /* 0xab */ x86emuOp2_bt_R, - /* 0xac */ x86emuOp2_shrd_IMM, - /* 0xad */ x86emuOp2_shrd_CL, - /* 0xae */ x86emuOp2_illegal_op, - /* 0xaf */ x86emuOp2_imul_R_RM, - - /* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */ - /* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */ - /* 0xb2 */ x86emuOp2_lss_R_IMM, - /* 0xb3 */ x86emuOp2_btr_R, - /* 0xb4 */ x86emuOp2_lfs_R_IMM, - /* 0xb5 */ x86emuOp2_lgs_R_IMM, - /* 0xb6 */ x86emuOp2_movzx_byte_R_RM, - /* 0xb7 */ x86emuOp2_movzx_word_R_RM, - /* 0xb8 */ x86emuOp2_illegal_op, - /* 0xb9 */ x86emuOp2_illegal_op, - /* 0xba */ x86emuOp2_btX_I, - /* 0xbb */ x86emuOp2_btc_R, - /* 0xbc */ x86emuOp2_bsf, - /* 0xbd */ x86emuOp2_bsr, - /* 0xbe */ x86emuOp2_movsx_byte_R_RM, - /* 0xbf */ x86emuOp2_movsx_word_R_RM, - - /* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */ - /* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */ - /* 0xc2 */ x86emuOp2_illegal_op, - /* 0xc3 */ x86emuOp2_illegal_op, - /* 0xc4 */ x86emuOp2_illegal_op, - /* 0xc5 */ x86emuOp2_illegal_op, - /* 0xc6 */ x86emuOp2_illegal_op, - /* 0xc7 */ x86emuOp2_illegal_op, - /* 0xc8 */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xc9 */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xca */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcb */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcc */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcd */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xce */ x86emuOp2_illegal_op, /* TODO: bswap */ - /* 0xcf */ x86emuOp2_illegal_op, /* TODO: bswap */ - - /* 0xd0 */ x86emuOp2_illegal_op, - /* 0xd1 */ x86emuOp2_illegal_op, - /* 0xd2 */ x86emuOp2_illegal_op, - /* 0xd3 */ x86emuOp2_illegal_op, - /* 0xd4 */ x86emuOp2_illegal_op, - /* 0xd5 */ x86emuOp2_illegal_op, - /* 0xd6 */ x86emuOp2_illegal_op, - /* 0xd7 */ x86emuOp2_illegal_op, - /* 0xd8 */ x86emuOp2_illegal_op, - /* 0xd9 */ x86emuOp2_illegal_op, - /* 0xda */ x86emuOp2_illegal_op, - /* 0xdb */ x86emuOp2_illegal_op, - /* 0xdc */ x86emuOp2_illegal_op, - /* 0xdd */ x86emuOp2_illegal_op, - /* 0xde */ x86emuOp2_illegal_op, - /* 0xdf */ x86emuOp2_illegal_op, - - /* 0xe0 */ x86emuOp2_illegal_op, - /* 0xe1 */ x86emuOp2_illegal_op, - /* 0xe2 */ x86emuOp2_illegal_op, - /* 0xe3 */ x86emuOp2_illegal_op, - /* 0xe4 */ x86emuOp2_illegal_op, - /* 0xe5 */ x86emuOp2_illegal_op, - /* 0xe6 */ x86emuOp2_illegal_op, - /* 0xe7 */ x86emuOp2_illegal_op, - /* 0xe8 */ x86emuOp2_illegal_op, - /* 0xe9 */ x86emuOp2_illegal_op, - /* 0xea */ x86emuOp2_illegal_op, - /* 0xeb */ x86emuOp2_illegal_op, - /* 0xec */ x86emuOp2_illegal_op, - /* 0xed */ x86emuOp2_illegal_op, - /* 0xee */ x86emuOp2_illegal_op, - /* 0xef */ x86emuOp2_illegal_op, - - /* 0xf0 */ x86emuOp2_illegal_op, - /* 0xf1 */ x86emuOp2_illegal_op, - /* 0xf2 */ x86emuOp2_illegal_op, - /* 0xf3 */ x86emuOp2_illegal_op, - /* 0xf4 */ x86emuOp2_illegal_op, - /* 0xf5 */ x86emuOp2_illegal_op, - /* 0xf6 */ x86emuOp2_illegal_op, - /* 0xf7 */ x86emuOp2_illegal_op, - /* 0xf8 */ x86emuOp2_illegal_op, - /* 0xf9 */ x86emuOp2_illegal_op, - /* 0xfa */ x86emuOp2_illegal_op, - /* 0xfb */ x86emuOp2_illegal_op, - /* 0xfc */ x86emuOp2_illegal_op, - /* 0xfd */ x86emuOp2_illegal_op, - /* 0xfe */ x86emuOp2_illegal_op, - /* 0xff */ x86emuOp2_illegal_op, -}; diff --git a/BaS_gcc/x86emu/x86pcibios.c b/BaS_gcc/x86emu/x86pcibios.c index 441fb16..c27f423 100644 --- a/BaS_gcc/x86emu/x86pcibios.c +++ b/BaS_gcc/x86emu/x86pcibios.c @@ -2,7 +2,6 @@ #include "pci.h" #include "x86emu.h" #include "x86pcibios.h" -#include "x86debug.h" extern unsigned short offset_port; diff --git a/BaS_gcc/x86emu/x86prim_ops.c b/BaS_gcc/x86emu/x86prim_ops.c deleted file mode 100644 index 152e07d..0000000 --- a/BaS_gcc/x86emu/x86prim_ops.c +++ /dev/null @@ -1,2452 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1991-2004 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: This file contains the code to implement the primitive -* machine operations used by the emulation code in ops.c -* -* Carry Chain Calculation -* -* This represents a somewhat expensive calculation which is -* apparently required to emulate the setting of the OF and AF flag. -* The latter is not so important, but the former is. The overflow -* flag is the XOR of the top two bits of the carry chain for an -* addition (similar for subtraction). Since we do not want to -* simulate the addition in a bitwise manner, we try to calculate the -* carry chain given the two operands and the result. -* -* So, given the following table, which represents the addition of two -* bits, we can derive a formula for the carry chain. -* -* a b cin r cout -* 0 0 0 0 0 -* 0 0 1 1 0 -* 0 1 0 1 0 -* 0 1 1 0 1 -* 1 0 0 1 0 -* 1 0 1 0 1 -* 1 1 0 0 1 -* 1 1 1 1 1 -* -* Construction of table for cout: -* -* ab -* r \ 00 01 11 10 -* |------------------ -* 0 | 0 1 1 1 -* 1 | 0 0 1 0 -* -* By inspection, one gets: cc = ab + r'(a + b) -* -* That represents alot of operations, but NO CHOICE.... -* -* Borrow Chain Calculation. -* -* The following table represents the subtraction of two bits, from -* which we can derive a formula for the borrow chain. -* -* a b bin r bout -* 0 0 0 0 0 -* 0 0 1 1 1 -* 0 1 0 1 1 -* 0 1 1 0 1 -* 1 0 0 1 0 -* 1 0 1 0 0 -* 1 1 0 0 0 -* 1 1 1 1 1 -* -* Construction of table for cout: -* -* ab -* r \ 00 01 11 10 -* |------------------ -* 0 | 0 1 0 0 -* 1 | 1 1 1 0 -* -* By inspection, one gets: bc = a'b + r(a' + b) -* -****************************************************************************/ - -#define PRIM_OPS_NO_REDEFINE_ASM -#include "x86debug.h" -#include "x86emui.h" - -#define abs(x) ({ \ - int __x = (x); \ - (__x < 0) ? -__x : __x; \ - }) - -#define labs(x) ({ \ - long __x = (x); \ - (__x < 0) ? -__x : __x; \ - }) - -/*------------------------- Global Variables ------------------------------*/ - -static uint32_t x86emu_parity_tab[8] = -{ - 0x96696996, - 0x69969669, - 0x69969669, - 0x96696996, - 0x69969669, - 0x96696996, - 0x96696996, - 0x69969669, -}; - -#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0) -#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1) - -/*----------------------------- Implementation ----------------------------*/ - - -/*--------- Side effects helper functions -------*/ - -/**************************************************************************** -REMARKS: -implements side efects for byte operations that don't overflow -****************************************************************************/ - -static void set_parity_flag(uint32_t res) -{ - CONDITIONAL_SET_FLAG(PARITY(res & 0xFF), F_PF); -} - -static void set_szp_flags_8(uint8_t res) -{ - CONDITIONAL_SET_FLAG(res & 0x80, F_SF); - CONDITIONAL_SET_FLAG(res == 0, F_ZF); - set_parity_flag(res); -} - -static void set_szp_flags_16(uint16_t res) -{ - CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); - CONDITIONAL_SET_FLAG(res == 0, F_ZF); - set_parity_flag(res); -} - -static void set_szp_flags_32(uint32_t res) -{ - CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); - CONDITIONAL_SET_FLAG(res == 0, F_ZF); - set_parity_flag(res); -} - -static void no_carry_byte_side_eff(uint8_t res) -{ - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - set_szp_flags_8(res); -} - -static void no_carry_word_side_eff(uint16_t res) -{ - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - set_szp_flags_16(res); -} - -static void no_carry_long_side_eff(uint32_t res) -{ - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - set_szp_flags_32(res); -} - -static void calc_carry_chain(int bits, uint32_t d, uint32_t s, uint32_t res, int set_carry) -{ - uint32_t cc; - - cc = (s & d) | ((~res) & (s | d)); - CONDITIONAL_SET_FLAG(XOR2(cc >> (bits - 2)), F_OF); - CONDITIONAL_SET_FLAG(cc & 0x8, F_AF); - if (set_carry) { - CONDITIONAL_SET_FLAG(res & (1 << bits), F_CF); - } -} - -static void calc_borrow_chain(int bits, uint32_t d, uint32_t s, uint32_t res, int set_carry) -{ - uint32_t bc; - - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(XOR2(bc >> (bits - 2)), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - if (set_carry) { - CONDITIONAL_SET_FLAG(bc & (1 << (bits - 1)), F_CF); - } -} - -/**************************************************************************** -REMARKS: -Implements the AAA instruction and side effects. -****************************************************************************/ -uint16_t aaa_word(uint16_t d) -{ - uint16_t res; - if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) { - d += 0x6; - d += 0x100; - SET_FLAG(F_AF); - SET_FLAG(F_CF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - } - res = (uint16_t)(d & 0xFF0F); - set_szp_flags_16(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AAA instruction and side effects. -****************************************************************************/ -uint16_t aas_word(uint16_t d) -{ - uint16_t res; - if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) { - d -= 0x6; - d -= 0x100; - SET_FLAG(F_AF); - SET_FLAG(F_CF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - } - res = (uint16_t)(d & 0xFF0F); - set_szp_flags_16(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AAD instruction and side effects. -****************************************************************************/ -uint16_t aad_word(uint16_t d) -{ - uint16_t l; - uint8_t hb, lb; - - hb = (uint8_t)((d >> 8) & 0xff); - lb = (uint8_t)((d & 0xff)); - l = (uint16_t)((lb + 10 * hb) & 0xFF); - - no_carry_byte_side_eff(l & 0xFF); - return l; -} - -/**************************************************************************** -REMARKS: -Implements the AAM instruction and side effects. -****************************************************************************/ -uint16_t aam_word(uint8_t d) -{ - uint16_t h, l; - - h = (uint16_t)(d / 10); - l = (uint16_t)(d % 10); - l |= (uint16_t)(h << 8); - - no_carry_byte_side_eff(l & 0xFF); - return l; -} - -/**************************************************************************** -REMARKS: -Implements the ADC instruction and side effects. -****************************************************************************/ -uint8_t adc_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - if (ACCESS_FLAG(F_CF)) res++; - - set_szp_flags_8(res); - calc_carry_chain(8,s,d,res,1); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADC instruction and side effects. -****************************************************************************/ -uint16_t adc_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - if (ACCESS_FLAG(F_CF)) - res++; - - set_szp_flags_16((uint16_t)res); - calc_carry_chain(16,s,d,res,1); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADC instruction and side effects. -****************************************************************************/ -uint32_t adc_long(uint32_t d, uint32_t s) -{ - uint32_t lo; /* all operands in native machine order */ - uint32_t hi; - uint32_t res; - - lo = (d & 0xFFFF) + (s & 0xFFFF); - res = d + s; - - if (ACCESS_FLAG(F_CF)) { - lo++; - res++; - } - - hi = (lo >> 16) + (d >> 16) + (s >> 16); - - set_szp_flags_32(res); - calc_carry_chain(32,s,d,res,0); - - CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the ADD instruction and side effects. -****************************************************************************/ -uint8_t add_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - set_szp_flags_8((uint8_t)res); - calc_carry_chain(8,s,d,res,1); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADD instruction and side effects. -****************************************************************************/ -uint16_t add_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + s; - set_szp_flags_16((uint16_t)res); - calc_carry_chain(16,s,d,res,1); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ADD instruction and side effects. -****************************************************************************/ -uint32_t add_long(uint32_t d, uint32_t s) -{ - uint32_t res; - - res = d + s; - set_szp_flags_32(res); - calc_carry_chain(32,s,d,res,0); - - CONDITIONAL_SET_FLAG(res < d || res < s, F_CF); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AND instruction and side effects. -****************************************************************************/ -uint8_t and_byte(uint8_t d, uint8_t s) -{ - uint8_t res; /* all operands in native machine order */ - - res = d & s; - - no_carry_byte_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AND instruction and side effects. -****************************************************************************/ -uint16_t and_word(uint16_t d, uint16_t s) -{ - uint16_t res; /* all operands in native machine order */ - - res = d & s; - - no_carry_word_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the AND instruction and side effects. -****************************************************************************/ -uint32_t and_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - no_carry_long_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the CMP instruction and side effects. -****************************************************************************/ -uint8_t cmp_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - s; - set_szp_flags_8((uint8_t)res); - calc_borrow_chain(8, d, s, res, 1); - - return d; -} - -/**************************************************************************** -REMARKS: -Implements the CMP instruction and side effects. -****************************************************************************/ -uint16_t cmp_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - s; - set_szp_flags_16((uint16_t)res); - calc_borrow_chain(16, d, s, res, 1); - - return d; -} - -/**************************************************************************** -REMARKS: -Implements the CMP instruction and side effects. -****************************************************************************/ -uint32_t cmp_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - s; - set_szp_flags_32(res); - calc_borrow_chain(32, d, s, res, 1); - - return d; -} - -/**************************************************************************** -REMARKS: -Implements the DAA instruction and side effects. -****************************************************************************/ -uint8_t daa_byte(uint8_t d) -{ - uint32_t res = d; - if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) { - res += 6; - SET_FLAG(F_AF); - } - if (res > 0x9F || ACCESS_FLAG(F_CF)) { - res += 0x60; - SET_FLAG(F_CF); - } - set_szp_flags_8((uint8_t)res); - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the DAS instruction and side effects. -****************************************************************************/ -uint8_t das_byte(uint8_t d) -{ - if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) { - d -= 6; - SET_FLAG(F_AF); - } - if (d > 0x9F || ACCESS_FLAG(F_CF)) { - d -= 0x60; - SET_FLAG(F_CF); - } - set_szp_flags_8(d); - return d; -} - -/**************************************************************************** -REMARKS: -Implements the DEC instruction and side effects. -****************************************************************************/ -uint8_t dec_byte(uint8_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - 1; - set_szp_flags_8((uint8_t)res); - calc_borrow_chain(8, d, 1, res, 0); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the DEC instruction and side effects. -****************************************************************************/ -uint16_t dec_word(uint16_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - 1; - set_szp_flags_16((uint16_t)res); - calc_borrow_chain(16, d, 1, res, 0); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the DEC instruction and side effects. -****************************************************************************/ -uint32_t dec_long(uint32_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d - 1; - - set_szp_flags_32(res); - calc_borrow_chain(32, d, 1, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the INC instruction and side effects. -****************************************************************************/ -uint8_t inc_byte(uint8_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + 1; - set_szp_flags_8((uint8_t)res); - calc_carry_chain(8, d, 1, res, 0); - - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the INC instruction and side effects. -****************************************************************************/ -uint16_t inc_word(uint16_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + 1; - set_szp_flags_16((uint16_t)res); - calc_carry_chain(16, d, 1, res, 0); - - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the INC instruction and side effects. -****************************************************************************/ -uint32_t inc_long(uint32_t d) -{ - uint32_t res; /* all operands in native machine order */ - - res = d + 1; - set_szp_flags_32(res); - calc_carry_chain(32, d, 1, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint8_t or_byte(uint8_t d, uint8_t s) -{ - uint8_t res; /* all operands in native machine order */ - - res = d | s; - no_carry_byte_side_eff(res); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint16_t or_word(uint16_t d, uint16_t s) -{ - uint16_t res; /* all operands in native machine order */ - - res = d | s; - no_carry_word_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint32_t or_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d | s; - no_carry_long_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint8_t neg_byte(uint8_t s) -{ - uint8_t res; - - CONDITIONAL_SET_FLAG(s != 0, F_CF); - res = (uint8_t)-s; - set_szp_flags_8(res); - calc_borrow_chain(8, 0, s, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint16_t neg_word(uint16_t s) -{ - uint16_t res; - - CONDITIONAL_SET_FLAG(s != 0, F_CF); - res = (uint16_t)-s; - set_szp_flags_16((uint16_t)res); - calc_borrow_chain(16, 0, s, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the OR instruction and side effects. -****************************************************************************/ -uint32_t neg_long(uint32_t s) -{ - uint32_t res; - - CONDITIONAL_SET_FLAG(s != 0, F_CF); - res = (uint32_t)-s; - set_szp_flags_32(res); - calc_borrow_chain(32, 0, s, res, 0); - - return res; -} - -/**************************************************************************** -REMARKS: -Implements the NOT instruction and side effects. -****************************************************************************/ -uint8_t not_byte(uint8_t s) -{ - return ~s; -} - -/**************************************************************************** -REMARKS: -Implements the NOT instruction and side effects. -****************************************************************************/ -uint16_t not_word(uint16_t s) -{ - return ~s; -} - -/**************************************************************************** -REMARKS: -Implements the NOT instruction and side effects. -****************************************************************************/ -uint32_t not_long(uint32_t s) -{ - return ~s; -} - -/**************************************************************************** -REMARKS: -Implements the RCL instruction and side effects. -****************************************************************************/ -uint8_t rcl_byte(uint8_t d, uint8_t s) -{ - unsigned int res, cnt, mask, cf; - - /* s is the rotate distance. It varies from 0 - 8. */ - /* have - - CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 - - want to rotate through the carry by "s" bits. We could - loop, but that's inefficient. So the width is 9, - and we split into three parts: - - The new carry flag (was B_n) - the stuff in B_n-1 .. B_0 - the stuff in B_7 .. B_n+1 - - The new rotate is done mod 9, and given this, - for a rotation of n bits (mod 9) the new carry flag is - then located n bits from the MSB. The low part is - then shifted up cnt bits, and the high part is or'd - in. Using CAPS for new values, and lowercase for the - original values, this can be expressed as: - - IF n > 0 - 1) CF <- b_(8-n) - 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 - 3) B_(n-1) <- cf - 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) - */ - res = d; - if ((cnt = s % 9) != 0) { - /* extract the new CARRY FLAG. */ - /* CF <- b_(8-n) */ - cf = (d >> (8 - cnt)) & 0x1; - - /* get the low stuff which rotated - into the range B_7 .. B_cnt */ - /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */ - /* note that the right hand side done by the mask */ - res = (d << cnt) & 0xff; - - /* now the high stuff which rotated around - into the positions B_cnt-2 .. B_0 */ - /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */ - /* shift it downward, 7-(n-2) = 9-n positions. - and mask off the result before or'ing in. - */ - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (9 - cnt)) & mask; - - /* if the carry flag was set, or it in. */ - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - /* B_(n-1) <- cf */ - res |= 1 << (cnt - 1); - } - /* set the new carry flag, based on the variable "cf" */ - CONDITIONAL_SET_FLAG(cf, F_CF); - /* OVERFLOW is set *IFF* cnt==1, then it is the - xor of CF and the most significant bit. Blecck. */ - /* parenthesized this expression since it appears to - be causing OF to be misset */ - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)), - F_OF); - - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCL instruction and side effects. -****************************************************************************/ -uint16_t rcl_word(uint16_t d, uint8_t s) -{ - unsigned int res, cnt, mask, cf; - - res = d; - if ((cnt = s % 17) != 0) { - cf = (d >> (16 - cnt)) & 0x1; - res = (d << cnt) & 0xffff; - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (17 - cnt)) & mask; - if (ACCESS_FLAG(F_CF)) { - res |= 1 << (cnt - 1); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)), - F_OF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCL instruction and side effects. -****************************************************************************/ -uint32_t rcl_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt, mask, cf; - - res = d; - if ((cnt = s % 33) != 0) { - cf = (d >> (32 - cnt)) & 0x1; - res = (d << cnt) & 0xffffffff; - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (33 - cnt)) & mask; - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - res |= 1 << (cnt - 1); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)), - F_OF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the RCR instruction and side effects. -****************************************************************************/ -uint8_t rcr_byte(uint8_t d, uint8_t s) -{ - uint32_t res, cnt; - uint32_t mask, cf, ocf = 0; - - /* rotate right through carry */ - /* - s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. - - have - - CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 - - The new rotate is done mod 9, and given this, - for a rotation of n bits (mod 9) the new carry flag is - then located n bits from the LSB. The low part is - then shifted up cnt bits, and the high part is or'd - in. Using CAPS for new values, and lowercase for the - original values, this can be expressed as: - - IF n > 0 - 1) CF <- b_(n-1) - 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) - 3) B_(8-n) <- cf - 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) - */ - res = d; - if ((cnt = s % 9) != 0) { - /* extract the new CARRY FLAG. */ - /* CF <- b_(n-1) */ - if (cnt == 1) { - cf = d & 0x1; - /* note hackery here. Access_flag(..) evaluates to either - 0 if flag not set - non-zero if flag is set. - doing access_flag(..) != 0 casts that into either - 0..1 in any representation of the flags register - (i.e. packed bit array or unpacked.) - */ - ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; - - /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */ - /* note that the right hand side done by the mask - This is effectively done by shifting the - object to the right. The result must be masked, - in case the object came in and was treated - as a negative number. Needed??? */ - - mask = (1 << (8 - cnt)) - 1; - res = (d >> cnt) & mask; - - /* now the high stuff which rotated around - into the positions B_cnt-2 .. B_0 */ - /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */ - /* shift it downward, 7-(n-2) = 9-n positions. - and mask off the result before or'ing in. - */ - res |= (d << (9 - cnt)); - - /* if the carry flag was set, or it in. */ - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - /* B_(8-n) <- cf */ - res |= 1 << (8 - cnt); - } - /* set the new carry flag, based on the variable "cf" */ - CONDITIONAL_SET_FLAG(cf, F_CF); - /* OVERFLOW is set *IFF* cnt==1, then it is the - xor of CF and the most significant bit. Blecck. */ - /* parenthesized... */ - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)), - F_OF); - } - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCR instruction and side effects. -****************************************************************************/ -uint16_t rcr_word(uint16_t d, uint8_t s) -{ - uint32_t res, cnt; - uint32_t mask, cf, ocf = 0; - - /* rotate right through carry */ - res = d; - if ((cnt = s % 17) != 0) { - if (cnt == 1) { - cf = d & 0x1; - ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; - mask = (1 << (16 - cnt)) - 1; - res = (d >> cnt) & mask; - res |= (d << (17 - cnt)); - if (ACCESS_FLAG(F_CF)) { - res |= 1 << (16 - cnt); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)), - F_OF); - } - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the RCR instruction and side effects. -****************************************************************************/ -uint32_t rcr_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt; - uint32_t mask, cf, ocf = 0; - - /* rotate right through carry */ - res = d; - if ((cnt = s % 33) != 0) { - if (cnt == 1) { - cf = d & 0x1; - ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; - mask = (1 << (32 - cnt)) - 1; - res = (d >> cnt) & mask; - if (cnt != 1) - res |= (d << (33 - cnt)); - if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - res |= 1 << (32 - cnt); - } - CONDITIONAL_SET_FLAG(cf, F_CF); - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)), - F_OF); - } - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the ROL instruction and side effects. -****************************************************************************/ -uint8_t rol_byte(uint8_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - /* rotate left */ - /* - s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. - - have - - CF B_7 ... B_0 - - The new rotate is done mod 8. - Much simpler than the "rcl" or "rcr" operations. - - IF n > 0 - 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) - 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) - */ - res = d; - if ((cnt = s % 8) != 0) { - /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */ - res = (d << cnt); - - /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */ - mask = (1 << cnt) - 1; - res |= (d >> (8 - cnt)) & mask; - - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - /* OVERFLOW is set *IFF* s==1, then it is the - xor of CF and the most significant bit. Blecck. */ - CONDITIONAL_SET_FLAG(s == 1 && - XOR2((res & 0x1) + ((res >> 6) & 0x2)), - F_OF); - } if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROL instruction and side effects. -****************************************************************************/ -uint16_t rol_word(uint16_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - res = d; - if ((cnt = s % 16) != 0) { - res = (d << cnt); - mask = (1 << cnt) - 1; - res |= (d >> (16 - cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && - XOR2((res & 0x1) + ((res >> 14) & 0x2)), - F_OF); - } if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROL instruction and side effects. -****************************************************************************/ -uint32_t rol_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt, mask; - - res = d; - if ((cnt = s % 32) != 0) { - res = (d << cnt); - mask = (1 << cnt) - 1; - res |= (d >> (32 - cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && - XOR2((res & 0x1) + ((res >> 30) & 0x2)), - F_OF); - } if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x1, F_CF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the ROR instruction and side effects. -****************************************************************************/ -uint8_t ror_byte(uint8_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - /* rotate right */ - /* - s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. - - have - - B_7 ... B_0 - - The rotate is done mod 8. - - IF n > 0 - 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) - 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) - */ - res = d; - if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */ - /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */ - res = (d << (8 - cnt)); - - /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */ - mask = (1 << (8 - cnt)) - 1; - res |= (d >> (cnt)) & mask; - - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x80, F_CF); - /* OVERFLOW is set *IFF* s==1, then it is the - xor of the two most significant bits. Blecck. */ - CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF); - } else if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x80, F_CF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROR instruction and side effects. -****************************************************************************/ -uint16_t ror_word(uint16_t d, uint8_t s) -{ - unsigned int res, cnt, mask; - - res = d; - if ((cnt = s % 16) != 0) { - res = (d << (16 - cnt)); - mask = (1 << (16 - cnt)) - 1; - res |= (d >> (cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x8000, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF); - } else if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x8000, F_CF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the ROR instruction and side effects. -****************************************************************************/ -uint32_t ror_long(uint32_t d, uint8_t s) -{ - uint32_t res, cnt, mask; - - res = d; - if ((cnt = s % 32) != 0) { - res = (d << (32 - cnt)); - mask = (1 << (32 - cnt)) - 1; - res |= (d >> (cnt)) & mask; - CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF); - CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF); - } else if (s != 0) { - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ - CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHL instruction and side effects. -****************************************************************************/ -uint8_t shl_byte(uint8_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 8) { - cnt = s % 8; - - /* last bit shifted out goes into carry flag */ - if (cnt > 0) { - res = d << cnt; - cf = d & (1 << (8 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_8((uint8_t)res); - } else { - res = (uint8_t) d; - } - - if (cnt == 1) { - /* Needs simplification. */ - CONDITIONAL_SET_FLAG( - (((res & 0x80) == 0x80) ^ - (ACCESS_FLAG(F_CF) != 0)), - /* was (M.x86.R_FLG&F_CF)==F_CF)), */ - F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHL instruction and side effects. -****************************************************************************/ -uint16_t shl_word(uint16_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - res = d << cnt; - cf = d & (1 << (16 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = (uint16_t) d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG( - (((res & 0x8000) == 0x8000) ^ - (ACCESS_FLAG(F_CF) != 0)), - F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHL instruction and side effects. -****************************************************************************/ -uint32_t shl_long(uint32_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - res = d << cnt; - cf = d & (1 << (32 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ - (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHR instruction and side effects. -****************************************************************************/ -uint8_t shr_byte(uint8_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 8) { - cnt = s % 8; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = d >> cnt; - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_8((uint8_t)res); - } else { - res = (uint8_t) d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHR instruction and side effects. -****************************************************************************/ -uint16_t shr_word(uint16_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = d >> cnt; - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHR instruction and side effects. -****************************************************************************/ -uint32_t shr_long(uint32_t d, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = d >> cnt; - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SAR instruction and side effects. -****************************************************************************/ -uint8_t sar_byte(uint8_t d, uint8_t s) -{ - unsigned int cnt, res, cf, mask, sf; - - res = d; - sf = d & 0x80; - cnt = s % 8; - if (cnt > 0 && cnt < 8) { - mask = (1 << (8 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; - CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } - set_szp_flags_8((uint8_t)res); - } else if (cnt >= 8) { - if (sf) { - res = 0xff; - SET_FLAG(F_CF); - CLEAR_FLAG(F_ZF); - SET_FLAG(F_SF); - SET_FLAG(F_PF); - } else { - res = 0; - CLEAR_FLAG(F_CF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - } - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SAR instruction and side effects. -****************************************************************************/ -uint16_t sar_word(uint16_t d, uint8_t s) -{ - unsigned int cnt, res, cf, mask, sf; - - sf = d & 0x8000; - cnt = s % 16; - res = d; - if (cnt > 0 && cnt < 16) { - mask = (1 << (16 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; - CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } - set_szp_flags_16((uint16_t)res); - } else if (cnt >= 16) { - if (sf) { - res = 0xffff; - SET_FLAG(F_CF); - CLEAR_FLAG(F_ZF); - SET_FLAG(F_SF); - SET_FLAG(F_PF); - } else { - res = 0; - CLEAR_FLAG(F_CF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SAR instruction and side effects. -****************************************************************************/ -uint32_t sar_long(uint32_t d, uint8_t s) -{ - uint32_t cnt, res, cf, mask, sf; - - sf = d & 0x80000000; - cnt = s % 32; - res = d; - if (cnt > 0 && cnt < 32) { - mask = (1 << (32 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; - CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } - set_szp_flags_32(res); - } else if (cnt >= 32) { - if (sf) { - res = 0xffffffff; - SET_FLAG(F_CF); - CLEAR_FLAG(F_ZF); - SET_FLAG(F_SF); - SET_FLAG(F_PF); - } else { - res = 0; - CLEAR_FLAG(F_CF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHLD instruction and side effects. -****************************************************************************/ -uint16_t shld_word (uint16_t d, uint16_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - res = (d << cnt) | (fill >> (16-cnt)); - cf = d & (1 << (16 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^ - (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHLD instruction and side effects. -****************************************************************************/ -uint32_t shld_long (uint32_t d, uint32_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - res = (d << cnt) | (fill >> (32-cnt)); - cf = d & (1 << (32 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^ - (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF); - CLEAR_FLAG(F_OF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_PF); - SET_FLAG(F_ZF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SHRD instruction and side effects. -****************************************************************************/ -uint16_t shrd_word (uint16_t d, uint16_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 16) { - cnt = s % 16; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) | (fill << (16 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_16((uint16_t)res); - } else { - res = d; - } - - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SHRD instruction and side effects. -****************************************************************************/ -uint32_t shrd_long (uint32_t d, uint32_t fill, uint8_t s) -{ - unsigned int cnt, res, cf; - - if (s < 32) { - cnt = s % 32; - if (cnt > 0) { - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) | (fill << (32 - cnt)); - CONDITIONAL_SET_FLAG(cf, F_CF); - set_szp_flags_32((uint32_t)res); - } else { - res = d; - } - if (cnt == 1) { - CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); - } else { - CLEAR_FLAG(F_OF); - } - } else { - res = 0; - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - SET_FLAG(F_ZF); - CLEAR_FLAG(F_SF); - CLEAR_FLAG(F_PF); - } - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SBB instruction and side effects. -****************************************************************************/ -uint8_t sbb_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - if (ACCESS_FLAG(F_CF)) - res = d - s - 1; - else - res = d - s; - set_szp_flags_8((uint8_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SBB instruction and side effects. -****************************************************************************/ -uint16_t sbb_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - if (ACCESS_FLAG(F_CF)) - res = d - s - 1; - else - res = d - s; - set_szp_flags_16((uint16_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SBB instruction and side effects. -****************************************************************************/ -uint32_t sbb_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - if (ACCESS_FLAG(F_CF)) - res = d - s - 1; - else - res = d - s; - - set_szp_flags_32(res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the SUB instruction and side effects. -****************************************************************************/ -uint8_t sub_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - res = d - s; - set_szp_flags_8((uint8_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint8_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SUB instruction and side effects. -****************************************************************************/ -uint16_t sub_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - res = d - s; - set_szp_flags_16((uint16_t)res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return (uint16_t)res; -} - -/**************************************************************************** -REMARKS: -Implements the SUB instruction and side effects. -****************************************************************************/ -uint32_t sub_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - uint32_t bc; - - res = d - s; - set_szp_flags_32(res); - - /* calculate the borrow chain. See note at top */ - bc = (res & (~d | s)) | (~d & s); - CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF); - CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF); - CONDITIONAL_SET_FLAG(bc & 0x8, F_AF); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the TEST instruction and side effects. -****************************************************************************/ -void test_byte(uint8_t d, uint8_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - - CLEAR_FLAG(F_OF); - set_szp_flags_8((uint8_t)res); - /* AF == dont care */ - CLEAR_FLAG(F_CF); -} - -/**************************************************************************** -REMARKS: -Implements the TEST instruction and side effects. -****************************************************************************/ -void test_word(uint16_t d, uint16_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - - CLEAR_FLAG(F_OF); - set_szp_flags_16((uint16_t)res); - /* AF == dont care */ - CLEAR_FLAG(F_CF); -} - -/**************************************************************************** -REMARKS: -Implements the TEST instruction and side effects. -****************************************************************************/ -void test_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d & s; - - CLEAR_FLAG(F_OF); - set_szp_flags_32(res); - /* AF == dont care */ - CLEAR_FLAG(F_CF); -} - -/**************************************************************************** -REMARKS: -Implements the XOR instruction and side effects. -****************************************************************************/ -uint8_t xor_byte(uint8_t d, uint8_t s) -{ - uint8_t res; /* all operands in native machine order */ - - res = d ^ s; - no_carry_byte_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the XOR instruction and side effects. -****************************************************************************/ -uint16_t xor_word(uint16_t d, uint16_t s) -{ - uint16_t res; /* all operands in native machine order */ - - res = d ^ s; - no_carry_word_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the XOR instruction and side effects. -****************************************************************************/ -uint32_t xor_long(uint32_t d, uint32_t s) -{ - uint32_t res; /* all operands in native machine order */ - - res = d ^ s; - no_carry_long_side_eff(res); - return res; -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_byte(uint8_t s) -{ - int16_t res = (int16_t)((int8_t)M.x86.R_AL * (int8_t)s); - - M.x86.R_AX = res; - if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) || - ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_word(uint16_t s) -{ - int32_t res = (int16_t)M.x86.R_AX * (int16_t)s; - - M.x86.R_AX = (uint16_t)res; - M.x86.R_DX = (uint16_t)(res >> 16); - if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x0000) || - ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFFFF)) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_long_direct(uint32_t *res_lo, uint32_t* res_hi,uint32_t d, uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - s64 res = (s64)d * (s64)s; - - *res_lo = (uint32_t)res; - *res_hi = (uint32_t)(res >> 32); -#else - uint32_t d_lo,d_hi,d_sign; - uint32_t s_lo,s_hi,s_sign; - uint32_t rlo_lo,rlo_hi,rhi_lo; - - if ((d_sign = d & 0x80000000) != 0) - d = -d; - d_lo = d & 0xFFFF; - d_hi = d >> 16; - if ((s_sign = s & 0x80000000) != 0) - s = -s; - s_lo = s & 0xFFFF; - s_hi = s >> 16; - rlo_lo = d_lo * s_lo; - rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16); - rhi_lo = d_hi * s_hi + (rlo_hi >> 16); - *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF); - *res_hi = rhi_lo; - if (d_sign != s_sign) { - d = ~*res_lo; - s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16); - *res_lo = ~*res_lo+1; - *res_hi = ~*res_hi+(s >> 16); - } -#endif -} - -/**************************************************************************** -REMARKS: -Implements the IMUL instruction and side effects. -****************************************************************************/ -void imul_long(uint32_t s) -{ - imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); - if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00000000) || - ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFFFFFFFF)) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the MUL instruction and side effects. -****************************************************************************/ -void mul_byte(uint8_t s) -{ - uint16_t res = (uint16_t)(M.x86.R_AL * s); - - M.x86.R_AX = res; - if (M.x86.R_AH == 0) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the MUL instruction and side effects. -****************************************************************************/ -void mul_word(uint16_t s) -{ - uint32_t res = M.x86.R_AX * s; - - M.x86.R_AX = (uint16_t)res; - M.x86.R_DX = (uint16_t)(res >> 16); - if (M.x86.R_DX == 0) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the MUL instruction and side effects. -****************************************************************************/ -void mul_long(uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - u64 res = (uint32_t)M.x86.R_EAX * (uint32_t)s; - - M.x86.R_EAX = (uint32_t)res; - M.x86.R_EDX = (uint32_t)(res >> 32); -#else - uint32_t a,a_lo,a_hi; - uint32_t s_lo,s_hi; - uint32_t rlo_lo,rlo_hi,rhi_lo; - - a = M.x86.R_EAX; - a_lo = a & 0xFFFF; - a_hi = a >> 16; - s_lo = s & 0xFFFF; - s_hi = s >> 16; - rlo_lo = a_lo * s_lo; - rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16); - rhi_lo = a_hi * s_hi + (rlo_hi >> 16); - M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF); - M.x86.R_EDX = rhi_lo; -#endif - if (M.x86.R_EDX == 0) { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } else { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } -} - -/**************************************************************************** -REMARKS: -Implements the IDIV instruction and side effects. -****************************************************************************/ -void idiv_byte(uint8_t s) -{ - int32_t dvd, div, mod; - - dvd = (int16_t)M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (int8_t)s; - mod = dvd % (int8_t)s; - if (abs(div) > 0x7f) { - x86emu_intr_raise(0); - return; - } - M.x86.R_AL = (int8_t) div; - M.x86.R_AH = (int8_t) mod; -} - -/**************************************************************************** -REMARKS: -Implements the IDIV instruction and side effects. -****************************************************************************/ -void idiv_word(uint16_t s) -{ - int32_t dvd, div, mod; - - dvd = (((int32_t)M.x86.R_DX) << 16) | M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (int16_t)s; - mod = dvd % (int16_t)s; - if (abs(div) > 0x7fff) { - x86emu_intr_raise(0); - return; - } - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_SF); - CONDITIONAL_SET_FLAG(div == 0, F_ZF); - set_parity_flag(mod); - - M.x86.R_AX = (uint16_t)div; - M.x86.R_DX = (uint16_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the IDIV instruction and side effects. -****************************************************************************/ -void idiv_long(uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - s64 dvd, div, mod; - - dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (int32_t)s; - mod = dvd % (int32_t)s; - if (abs(div) > 0x7fffffff) { - x86emu_intr_raise(0); - return; - } -#else - int32_t div = 0, mod; - int32_t h_dvd = M.x86.R_EDX; - uint32_t l_dvd = M.x86.R_EAX; - uint32_t abs_s = s & 0x7FFFFFFF; - uint32_t abs_h_dvd = h_dvd & 0x7FFFFFFF; - uint32_t h_s = abs_s >> 1; - uint32_t l_s = abs_s << 31; - int counter = 31; - int carry; - - if (s == 0) { - x86emu_intr_raise(0); - return; - } - do { - div <<= 1; - carry = (l_dvd >= l_s) ? 0 : 1; - - if (abs_h_dvd < (h_s + carry)) { - h_s >>= 1; - l_s = abs_s << (--counter); - continue; - } else { - abs_h_dvd -= (h_s + carry); - l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1) - : (l_dvd - l_s); - h_s >>= 1; - l_s = abs_s << (--counter); - div |= 1; - continue; - } - - } while (counter > -1); - /* overflow */ - if (abs_h_dvd || (l_dvd > abs_s)) { - x86emu_intr_raise(0); - return; - } - /* sign */ - div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000)); - mod = l_dvd; - -#endif - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_ZF); - set_parity_flag(mod); - - M.x86.R_EAX = (uint32_t)div; - M.x86.R_EDX = (uint32_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the DIV instruction and side effects. -****************************************************************************/ -void div_byte(uint8_t s) -{ - uint32_t dvd, div, mod; - - dvd = M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (uint8_t)s; - mod = dvd % (uint8_t)s; - if (abs(div) > 0xff) { - x86emu_intr_raise(0); - return; - } - M.x86.R_AL = (uint8_t)div; - M.x86.R_AH = (uint8_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the DIV instruction and side effects. -****************************************************************************/ -void div_word(uint16_t s) -{ - uint32_t dvd, div, mod; - - dvd = (((uint32_t)M.x86.R_DX) << 16) | M.x86.R_AX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (uint16_t)s; - mod = dvd % (uint16_t)s; - if (abs(div) > 0xffff) { - x86emu_intr_raise(0); - return; - } - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_SF); - CONDITIONAL_SET_FLAG(div == 0, F_ZF); - set_parity_flag(mod); - - M.x86.R_AX = (uint16_t)div; - M.x86.R_DX = (uint16_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the DIV instruction and side effects. -****************************************************************************/ -void div_long(uint32_t s) -{ -#ifdef __HAS_LONG_LONG__ - u64 dvd, div, mod; - - dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX; - if (s == 0) { - x86emu_intr_raise(0); - return; - } - div = dvd / (uint32_t)s; - mod = dvd % (uint32_t)s; - if (abs(div) > 0xffffffff) { - x86emu_intr_raise(0); - return; - } -#else - int32_t div = 0, mod; - int32_t h_dvd = M.x86.R_EDX; - uint32_t l_dvd = M.x86.R_EAX; - - uint32_t h_s = s; - uint32_t l_s = 0; - int counter = 32; - int carry; - - if (s == 0) { - x86emu_intr_raise(0); - return; - } - do { - div <<= 1; - carry = (l_dvd >= l_s) ? 0 : 1; - - if (h_dvd < (h_s + carry)) { - h_s >>= 1; - l_s = s << (--counter); - continue; - } else { - h_dvd -= (h_s + carry); - l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1) - : (l_dvd - l_s); - h_s >>= 1; - l_s = s << (--counter); - div |= 1; - continue; - } - - } while (counter > -1); - /* overflow */ - if (h_dvd || (l_dvd > s)) { - x86emu_intr_raise(0); - return; - } - mod = l_dvd; -#endif - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_AF); - CLEAR_FLAG(F_SF); - SET_FLAG(F_ZF); - set_parity_flag(mod); - - M.x86.R_EAX = (uint32_t)div; - M.x86.R_EDX = (uint32_t)mod; -} - -/**************************************************************************** -REMARKS: -Implements the IN string instruction and side effects. -****************************************************************************/ - -static void single_in(int size) -{ - if(size == 1) - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inb)(M.x86.R_DX)); - else if (size == 2) - store_data_word_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inw)(M.x86.R_DX)); - else - store_data_long_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inl)(M.x86.R_DX)); -} - -void ins(int size) -{ - int inc = size; - - if (ACCESS_FLAG(F_DF)) { - inc = -size; - } - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* in until CX is ZERO. */ - uint32_t count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ? - M.x86.R_ECX : M.x86.R_CX); - - while (count--) { - single_in(size); - M.x86.R_DI += inc; - } - M.x86.R_CX = 0; - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = 0; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - single_in(size); - M.x86.R_DI += inc; - } -} - -/**************************************************************************** -REMARKS: -Implements the OUT string instruction and side effects. -****************************************************************************/ - -static void single_out(int size) -{ - if(size == 1) - (*sys_outb)(M.x86.R_DX,fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI)); - else if (size == 2) - (*sys_outw)(M.x86.R_DX,fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI)); - else - (*sys_outl)(M.x86.R_DX,fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI)); -} - -void outs(int size) -{ - int inc = size; - - if (ACCESS_FLAG(F_DF)) { - inc = -size; - } - if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* out until CX is ZERO. */ - uint32_t count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ? - M.x86.R_ECX : M.x86.R_CX); - while (count--) { - single_out(size); - M.x86.R_SI += inc; - } - M.x86.R_CX = 0; - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = 0; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); - } else { - single_out(size); - M.x86.R_SI += inc; - } -} - -/**************************************************************************** -PARAMETERS: -addr - Address to fetch word from - -REMARKS: -Fetches a word from emulator memory using an absolute address. -****************************************************************************/ -uint16_t mem_access_word(int addr) -{ -DB( if (CHECK_MEM_ACCESS()) - x86emu_check_mem_access(addr);) - return (*sys_rdw)(addr); -} - -/**************************************************************************** -REMARKS: -Pushes a word onto the stack. - -NOTE: Do not inline this, as (*sys_wrX) is already inline! -****************************************************************************/ -void push_word(uint16_t w) -{ -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - M.x86.R_SP -= 2; - (*sys_wrw)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP, w); -} - -/**************************************************************************** -REMARKS: -Pushes a long onto the stack. - -NOTE: Do not inline this, as (*sys_wrX) is already inline! -****************************************************************************/ -void push_long(uint32_t w) -{ -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - M.x86.R_SP -= 4; - (*sys_wrl)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP, w); -} - -/**************************************************************************** -REMARKS: -Pops a word from the stack. - -NOTE: Do not inline this, as (*sys_rdX) is already inline! -****************************************************************************/ -uint16_t pop_word(void) -{ - uint16_t res; - -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - res = (*sys_rdw)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP); - M.x86.R_SP += 2; - return res; -} - -/**************************************************************************** -REMARKS: -Pops a long from the stack. - -NOTE: Do not inline this, as (*sys_rdX) is already inline! -****************************************************************************/ -uint32_t pop_long(void) -{ - uint32_t res; - -DB( if (CHECK_SP_ACCESS()) - x86emu_check_sp_access();) - res = (*sys_rdl)(((uint32_t)M.x86.R_SS << 4) + M.x86.R_SP); - M.x86.R_SP += 4; - return res; -} - diff --git a/BaS_gcc/x86emu/x86sys.c b/BaS_gcc/x86emu/x86sys.c deleted file mode 100644 index 1984587..0000000 --- a/BaS_gcc/x86emu/x86sys.c +++ /dev/null @@ -1,470 +0,0 @@ -/**************************************************************************** -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1996-1999 SciTech Software, Inc. -* Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* ======================================================================== -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided "as is" without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* ======================================================================== -* -* Language: ANSI C -* Environment: Any -* Developer: Kendall Bennett -* -* Description: This file includes subroutines which are related to -* programmed I/O and memory access. Included in this module -* are default functions with limited usefulness. For real -* uses these functions will most likely be overriden by the -* user library. -* -****************************************************************************/ -/* $XFree86: xc/extras/x86emu/src/x86emu/sys.c,v 1.5 2000/08/23 22:10:01 tsi Exp $ */ - -#include "radeonfb.h" -#include "pci.h" - -#include "x86emu.h" -#include "x86regs.h" -#include "x86debug.h" -#include "x86prim_ops.h" - -extern uint8_t inb(uint16_t port); -extern uint16_t inw(uint16_t port); -extern uint32_t inl(uint16_t port); -extern void outb(uint8_t val, uint16_t port); -extern void outw(uint16_t val, uint16_t port); -extern void outl(uint32_t val, uint16_t port); - -/*------------------------- Global Variables ------------------------------*/ - -X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */ -X86EMU_intrFuncs _X86EMU_intrTab[256]; -extern struct radeonfb_info *rinfo_biosemu; -extern uint32_t offset_mem; - -/*----------------------------- Implementation ----------------------------*/ - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * - * RETURNS: - * Byte value read from emulator memory. - * - * REMARKS: - * Reads a byte value from the emulator memory. - */ -inline uint8_t X86API rdb(uint32_t addr) -{ - uint8_t val; - - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - val = *(uint8_t *) (offset_mem + addr); - dbg("%s: rdb(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 1 -> %x\r\n", __FUNCTION__, addr, val); - } ) - } - return val; -} -/* - * PARAMETERS: - * addr - Emulator memory address to read - * - * RETURNS: - * Word value read from emulator memory. - * - * REMARKS: - * Reads a word value from the emulator memory. - */ -uint16_t X86API rdw(uint32_t addr) -{ - uint16_t val; - - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - val = swpw(*(uint16_t *)(offset_mem+addr)); - dbg("%s: rdw(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - val = (uint16_t) (* (uint8_t *)(M.mem_base + addr)); - val |= (((uint16_t)( *(uint8_t *)(M.mem_base + addr + 1))) << 8); - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 2 -> %x\r\n", __FUNCTION__, addr, val); - } ) - return val; -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * - * RETURNS: - * Long value read from emulator memory. - * REMARKS: - * Reads a long value from the emulator memory. - */ -inline uint32_t X86API rdl(uint32_t addr) -{ - uint32_t val; - - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - val = swpl(*(uint32_t *)(offset_mem + addr)); - dbg("%s: rdl(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - val = swpl(*(uint32_t *)(M.mem_base + addr)); - } - DB(if (DEBUG_MEM_TRACE()) - { - - dbg("%s: %p 4 -> %x\r\n", __FUNCTION__, addr, val); - } ) - return val; -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * val - Value to store - * - * REMARKS: - * Writes a byte value to emulator memory. - */ -inline void X86API wrb(uint32_t addr, uint8_t val) -{ - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - *(uint8_t *)(offset_mem + addr) = val; - dbg("%s: wrb(%x) = %x\r\n", __FUNCTION__, addr, val); - } - else - { - if (addr >= M.mem_size) - { - DB( - { - dbg("%s: mem_ptr: %p out of range!\r\n", __FUNCTION__, addr); - }) - HALT_SYS(); - } - *(uint8_t *)(M.mem_base + addr) = val; - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 1 < %x\r\n", __FUNCTION__, addr, val); - } ) -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * val - Value to store - * - * REMARKS: - * Writes a word value to emulator memory. - */ -inline void X86API wrw(uint32_t addr, uint16_t val) -{ - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - dbg("%s: wrw(%x) = %x\r\n", __FUNCTION__, addr, val); - *(uint16_t *)(offset_mem+addr) = swpw(val); - } - else - { - if (addr > M.mem_size - 2) - { - DB( - { - dbg("%s: mem_ptr: %p out of range\r\n", __FUNCTION__, addr); - }) - HALT_SYS(); - } - *(uint8_t *)(M.mem_base + addr) = (uint8_t) val; - *(uint8_t *)(M.mem_base + addr + 1) = (uint8_t) (val >> 8); - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 2 <- %x\r\n", __FUNCTION__, addr, val); - } ) -} - -/* - * PARAMETERS: - * addr - Emulator memory address to read - * val - Value to store - * - * REMARKS: - * Writes a long value to emulator memory. - */ -inline void X86API wrl(uint32_t addr, uint32_t val) -{ - if ((addr >= 0xA0000) && (addr <= 0xBFFFF)) - { - dbg("%s: wrl(%x) = %x\r\n", __FUNCTION__, addr, val); - *(uint32_t *)(offset_mem+addr) = swpl(val); - } - else - { - if (addr > M.mem_size - 4) - { - DB( - { - dbg("%s: mem_ptr: address %x out of range!\r\n", __FUNCTION__, addr); - } - ) - HALT_SYS(); - } - *(uint32_t *)(M.mem_base + addr) = swpl(val); - } - DB(if (DEBUG_MEM_TRACE()) - { - dbg("%s: %p 4 <- %x\r\n", __FUNCTION__, addr, val); - } ) -} - -/* - * PARAMETERS: - * addr - PIO address to read - * RETURN: - * 0 - * REMARKS: - * Default PIO byte read function. Doesn't perform real inb. - */ -inline uint8_t X86API p_inb(X86EMU_pioAddr addr) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: inb(%p)\r\n", __FUNCTION__); - } ) - return inb(addr); -} - -/* - * PARAMETERS: - * addr - PIO address to read - * RETURN: - * 0 - * REMARKS: - * Default PIO word read function. Doesn't perform real inw. - */ -inline uint16_t X86API p_inw(X86EMU_pioAddr addr) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: inw(%p)\r\n", __FUNCTION__, addr); - } ) - return inw(addr); -} - -/* - * PARAMETERS: - * addr - PIO address to read - * RETURN: - * 0 - * REMARKS: - * Default PIO long read function. Doesn't perform real inl. - */ -inline uint32_t X86API p_inl(X86EMU_pioAddr addr) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: inl %p\r\n", __FUNCTION__, addr); - } ) - return inl(addr); -} - -/* - * PARAMETERS: - * addr - PIO address to write - * val - Value to store - * REMARKS: - * Default PIO byte write function. Doesn't perform real outb. - */ -inline void X86API p_outb(X86EMU_pioAddr addr, uint8_t val) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: outb %x -> %x\r\n", __FUNCTION__, val, addr); - } ) - outb(val, addr); - return; -} - -/* - * PARAMETERS: - * addr - PIO address to write - * val - Value to store - * REMARKS: - * Default PIO word write function. Doesn't perform real outw. - */ -inline void X86API p_outw(X86EMU_pioAddr addr, uint16_t val) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("outw %x -> %x\r\n", __FUNCTION__, val, addr); - } ) - outw(val, addr); - return; -} - -/* - * PARAMETERS: - * addr - PIO address to write - * val - Value to store - * REMARKS: - * Default PIO ;ong write function. Doesn't perform real outl. - */ -inline void X86API p_outl(X86EMU_pioAddr addr, uint32_t val) -{ - DB(if (DEBUG_IO_TRACE()) - { - dbg("%s: outl %x -> %x\r\n", __FUNCTION__, val, addr); - } ) - outl(val, addr); - return; -} - -/*------------------------- Global Variables ------------------------------*/ - -uint8_t(X86APIP sys_rdb) (uint32_t addr) = rdb; -uint16_t(X86APIP sys_rdw) (uint32_t addr) = rdw; -uint32_t(X86APIP sys_rdl) (uint32_t addr) = rdl; -void (X86APIP sys_wrb) (uint32_t addr, uint8_t val) = wrb; -void (X86APIP sys_wrw) (uint32_t addr, uint16_t val) = wrw; -void (X86APIP sys_wrl) (uint32_t addr, uint32_t val) = wrl; -uint8_t(X86APIP sys_inb) (X86EMU_pioAddr addr) = p_inb; -uint16_t(X86APIP sys_inw) (X86EMU_pioAddr addr) = p_inw; -uint32_t(X86APIP sys_inl) (X86EMU_pioAddr addr) = p_inl; -void (X86APIP sys_outb) (X86EMU_pioAddr addr, uint8_t val) = p_outb; -void (X86APIP sys_outw) (X86EMU_pioAddr addr, uint16_t val) = p_outw; -void (X86APIP sys_outl) (X86EMU_pioAddr addr, uint32_t val) = p_outl; - -/*----------------------------- Setup -------------------------------------*/ - -#if 0 // cannot works whith data in flash -/**************************************************************************** -PARAMETERS: -funcs - New memory function pointers to make active - -REMARKS: -This function is used to set the pointers to functions which access -memory space, allowing the user application to override these functions -and hook them out as necessary for their application. -****************************************************************************/ -void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs) -{ - sys_rdb = funcs->rdb; - sys_rdw = funcs->rdw; - sys_rdl = funcs->rdl; - sys_wrb = funcs->wrb; - sys_wrw = funcs->wrw; - sys_wrl = funcs->wrl; -} - -/**************************************************************************** -PARAMETERS: -funcs - New programmed I/O function pointers to make active - -REMARKS: -This function is used to set the pointers to functions which access -I/O space, allowing the user application to override these functions -and hook them out as necessary for their application. -****************************************************************************/ -void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs) -{ - sys_inb = funcs->inb; - sys_inw = funcs->inw; - sys_inl = funcs->inl; - sys_outb = funcs->outb; - sys_outw = funcs->outw; - sys_outl = funcs->outl; -} -#endif - -/**************************************************************************** -PARAMETERS: -funcs - New interrupt vector table to make active - -REMARKS: -This function is used to set the pointers to functions which handle -interrupt processing in the emulator, allowing the user application to -hook interrupts as necessary for their application. Any interrupts that -are not hooked by the user application, and reflected and handled internally -in the emulator via the interrupt vector table. This allows the application -to get control when the code being emulated executes specific software -interrupts. -****************************************************************************/ -void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]) -{ - int i; - - for (i = 0; i < 256; i++) - _X86EMU_intrTab[i] = NULL; - if (funcs) { - for (i = 0; i < 256; i++) - _X86EMU_intrTab[i] = funcs[i]; - } -} - -/**************************************************************************** -PARAMETERS: -int - New software interrupt to prepare for - -REMARKS: -This function is used to set up the emulator state to exceute a software -interrupt. This can be used by the user application code to allow an -interrupt to be hooked, examined and then reflected back to the emulator -so that the code in the emulator will continue processing the software -interrupt as per normal. This essentially allows system code to actively -hook and handle certain software interrupts as necessary. -****************************************************************************/ -void X86EMU_prepareForInt(int num) -{ - push_word((uint16_t) M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(num * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(num * 4); - M.x86.intr = 0; -} - -void X86EMU_setMemBase(void *base, unsigned long size) -{ - M.mem_base = (int) base; - M.mem_size = size; -}