memory to memory DMA test
display BaS version and compile date/time
This commit is contained in:
Markus Fröschle
34
run_bas.bdm
34
run_bas.bdm
@@ -16,29 +16,30 @@ write-ctrl 0x0C0F 0xFF000000
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write-ctrl 0x0C04 0xFF100007
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# Turn on RAMBAR1 at address FF10_1000 (disabled - not mapped by bdm currently)
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#write-ctrl 0x0C05 0xFF101001
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write-ctrl 0x0C05 0xFF101001
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# Init CS0 (BootFLASH @ E000_0000 - E07F_FFFF 8Mbytes)
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#write 0xFF000500 0xE0000000 4
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#write 0xFF000508 0x00041180 4
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#write 0xFF000504 0x007F0001 4
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write 0xFF000500 0xE0000000 4
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write 0xFF000508 0x00041180 4
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write 0xFF000504 0x007F0001 4
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wait
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# Init CS1 (Atari I/O address range)
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#write 0xFF00050C 0xFFF00000 4
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#write 0xFF000514 0x00002180 4
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#write 0xFF000510 0x000F0001 4
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write 0xFF00050C 0xFFF00000 4
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write 0xFF000514 0x00002180 4
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write 0xFF000510 0x000F0001 4
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# Init CS2 (FireBee 32 bit I/O address range)
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#write 0xFF000518 0xF0000000 4
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#write 0xFF000520 0x00002100 4
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#write 0xFF00051C 0x07FF0001 4
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write 0xFF000518 0xF0000000 4
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write 0xFF000520 0x00002100 4
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write 0xFF00051C 0x07FF0001 4
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# Init CS3 (FireBee 16 bit I/O address range)
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#write 0xFF000524 0xF8000000 4
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#write 0xFF00052C 0x00000180 4
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#write 0xFF000528 0x03FF0001 4
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write 0xFF000524 0xF8000000 4
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write 0xFF00052C 0x00000180 4
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write 0xFF000528 0x03FF0001 4
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# Init CS4 (FireBee video address range)
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#write 0xFF000530 0x40000000 4
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#write 0xFF000538 0x00000018 4
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#write 0xFF000534 0x003F0001 4
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write 0xFF000530 0x40000000 4
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write 0xFF000538 0x00000018 4
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write 0xFF000534 0x003F0001 4
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# SDRAM Initialization @ 0000_0000 - 1FFF_FFFF 512Mbytes
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@@ -53,6 +54,7 @@ write 0xFF00010C 0x46770000 4 # SDCFG2
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write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
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write 0xFF000100 0x40010000 4 # SDMR (write to LEMR)
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write 0xFF000100 0x048D0000 4 # SDMR (write to LMR)
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write 0xFF000104 0xE10D0002 4 # SDCR + IPALL
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write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
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write 0xFF000104 0xE10D0004 4 # SDCR + IREF (first refresh)
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@@ -19,7 +19,9 @@ void *dma_memcpy(void *dst, void *src, size_t n)
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int32_t start = MCF_SLT_SCNT(0);
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int32_t end;
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ret = MCD_startDma(0, src, 1, dst, 1, n, 1, DMA_ALWAYS, 0, MCD_SINGLE_DMA, 0);
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xprintf("doing memory to memory DMA from %p to %p (%x bytes)\r\n", src, dst, n);
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ret = MCD_startDma(0, src, n, dst, n, n, 1, DMA_ALWAYS, 7, MCD_SINGLE_DMA|MCD_TT_FLAGS_CW|MCD_TT_FLAGS_RL|MCD_TT_FLAGS_SP, 0);
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if (ret == MCD_OK)
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{
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xprintf("DMA on channel 0 successfully started\r\n");
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@@ -28,7 +30,33 @@ void *dma_memcpy(void *dst, void *src, size_t n)
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do
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{
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ret = MCD_dmaStatus(0);
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xprintf(".");
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switch (ret)
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{
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case MCD_NO_DMA:
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xprintf("MCD_NO_DMA: no DMA active on this channel\r\n");
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break;
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case MCD_IDLE:
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xprintf("MCD_IDLE: DMA defined but not active (initiator not ready)\r\n");
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break;
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case MCD_RUNNING:
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//xprintf("MCD_RUNNING: DMA active and working on this channel\r\n");
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break;
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case MCD_PAUSED:
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xprintf("MCD_PAUSED: DMA defined and enabled, but currently paused\r\n");
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break;
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case MCD_HALTED:
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xprintf("MCD_HALTED: DMA killed\r\n");
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break;
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case MCD_DONE:
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xprintf("MCD_DONE: DMA finished\r\n");
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break;
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case MCD_CHANNEL_INVALID:
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xprintf("MCD_CHANNEL_INVALID: invalid DMA channel\r\n");
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break;
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default:
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xprintf("unknown DMA status %d\r\n", ret);
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break;
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}
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} while (ret != MCD_DONE);
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xprintf("\r\n");
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@@ -57,7 +85,7 @@ int spidma_init(void)
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xprintf("DMA API initialized. Tasks are at %p\r\n", SYS_SRAM);
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// test
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dma_memcpy((void *) 0x40000000, (void *) 0x30000000, 0x100000);
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dma_memcpy((void *) 0x1e000000, (void *) 0x1f000000, 0xf00000);
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xprintf("DMA finished\r\n");
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return 1;
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}
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@@ -34,6 +34,9 @@
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#include "bas_types.h"
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#include "wait.h"
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#define MAJOR_VERSION 0
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#define MINOR_VERSION 7
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#define UNUSED(x) (void)(x) /* Unused variable */
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extern volatile long _VRAM; /* start address of video ram from linker script */
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@@ -323,11 +326,12 @@ void init_fbcs()
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/* Flash */
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MCF_FBCS0_CSAR = 0xE0000000; /* flash base address */
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MCF_FBCS0_CSCR = MCF_FBCS_CSCR_PS_16 |
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MCF_FBCS_CSCR_WS(4)|
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MCF_FBCS_CSCR_WS(6)|
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MCF_FBCS_CSCR_AA;
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MCF_FBCS0_CSMR = MCF_FBCS_CSMR_BAM_8M |
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MCF_FBCS_CSMR_V; /* 8 MByte on */
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MCF_FBCS1_CSAR = 0xFFF00000; /* ATARI I/O ADRESS */
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MCF_FBCS1_CSCR = MCF_FBCS_CSCR_PS_16 /* 16BIT PORT */
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| MCF_FBCS_CSCR_WS(8) /* DEFAULT 8WS */
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@@ -844,6 +848,7 @@ void initialize_hardware(void) {
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* Determine cause(s) of Reset
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*/
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xprintf("\n\n");
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xprintf("Firebee BASIS system (BaS) v %d.%d (%s, %s)\r\n\r\n", MAJOR_VERSION, MINOR_VERSION, __DATE__, __TIME__);
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if (MCF_SIU_RSR & MCF_SIU_RSR_RST)
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xprintf("Reset. Cause: External Reset\r\n");
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if (MCF_SIU_RSR & MCF_SIU_RSR_RSTWD)
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