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do more FPGA register tests

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Markus Fröschle
2016-06-09 18:04:17 +00:00
parent bac9e62074
commit 1feb4f2c7a
2 changed files with 45 additions and 5 deletions
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tos/vmem_test/Makefile
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@@ -42,7 +42,7 @@ CFLAGS=\
-Wl,--defsym -Wl,__MMUBAR=0xff040000\
-Wl,--defsym -Wl,__FPGA_JTAG_LOADED=0xff101000\
-Wl,--defsym -Wl,__FPGA_JTAG_VALID=0xff101004\
-Wl,--defsym -Wl,__VRAM=0x60000000\
-Wl,--defsym -Wl,__VRAM=0x60010000\
-Wall
SRCDIR=sources