From 1c435cbb6a96cf0865d382312ebdbb67b2e7fbc6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Mon, 17 Oct 2016 15:07:29 +0000 Subject: [PATCH] fix mask for function number --- BaS_gcc/x86emu/x86biosemu.c | 8 ++++---- BaS_gcc/x86emu/x86pcibios.c | 12 ++++++------ 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/BaS_gcc/x86emu/x86biosemu.c b/BaS_gcc/x86emu/x86biosemu.c index 3dfb5ea..30e316c 100644 --- a/BaS_gcc/x86emu/x86biosemu.c +++ b/BaS_gcc/x86emu/x86biosemu.c @@ -24,10 +24,10 @@ #define MEM_RW(where) emu->emu_rdw(emu, where) #define MEM_RL(where) emu->emu_rdl(emu, where) -#define PCI_VGA_RAM_IMAGE_START 0xC0000 -#define PCI_RAM_IMAGE_START 0xD0000 -#define SYS_BIOS 0xF0000 -#define SIZE_EMU 0x100000 +#define PCI_VGA_RAM_IMAGE_START 0xC0000 +#define PCI_RAM_IMAGE_START 0xD0000 +#define SYS_BIOS 0xF0000 +#define SIZE_EMU 0x100000 struct rom_header diff --git a/BaS_gcc/x86emu/x86pcibios.c b/BaS_gcc/x86emu/x86pcibios.c index 624ac79..41b81c8 100644 --- a/BaS_gcc/x86emu/x86pcibios.c +++ b/BaS_gcc/x86emu/x86pcibios.c @@ -75,7 +75,7 @@ int x86_pcibios_handler(struct X86EMU *emu) case READ_CONFIG_BYTE: // bus, devfn dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI); - dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3); + dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7); emu->x86.R_CL = pci_read_config_byte(dev, emu->x86.R_DI); dbg("value = %x\r\n", emu->x86.R_CL); emu->x86.R_AH = SUCCESSFUL; @@ -86,7 +86,7 @@ int x86_pcibios_handler(struct X86EMU *emu) case READ_CONFIG_WORD: // bus, devfn dbg("READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI); - dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3); + dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7); if (emu->x86.R_DI == PCIBAR1) emu->x86.R_CX = offset_port + 1; else @@ -100,7 +100,7 @@ int x86_pcibios_handler(struct X86EMU *emu) case READ_CONFIG_DWORD: // bus, devfn dbg("READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI); - dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3); + dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7); if (emu->x86.R_DI == PCIBAR1) emu->x86.R_CX = (unsigned long) offset_port + 1; else @@ -115,7 +115,7 @@ int x86_pcibios_handler(struct X86EMU *emu) // bus, devfn dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x, value = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CL); - dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3); + dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7); pci_write_config_byte(dev, emu->x86.R_DI, emu->x86.R_CL); emu->x86.R_AH = SUCCESSFUL; emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */ @@ -124,7 +124,7 @@ int x86_pcibios_handler(struct X86EMU *emu) case WRITE_CONFIG_WORD: // bus, devfn - dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3); + dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7); dbg("WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CX); if (emu->x86.R_DI == PCIBAR1) { @@ -142,7 +142,7 @@ int x86_pcibios_handler(struct X86EMU *emu) case WRITE_CONFIG_DWORD: // bus, devfn - dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3); + dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 7); dbg("WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_ECX); if (emu->x86.R_DI == PCIBAR1)