stack was misaligned

This commit is contained in:
Markus Fröschle
2013-11-19 14:59:20 +00:00
parent 8bbf52a8cb
commit 1ad308bf6e
2 changed files with 5 additions and 2 deletions

View File

@@ -554,7 +554,9 @@ access_mmu:
move.l MCF_MMU_MMUAR,d0
cmp.l #__FASTRAM_END,d0 // above max User RAM area?
bge bus_error // -> bus error
bra _mmutr_miss // else we have an MMU TLB miss
bsr _mmutr_miss // else we have an MMU TLB miss
move.l (sp)+,d0 // restore register
rte
bus_error:
move.l (sp)+,d0 // restore register