From 1612d5201060f2d0e16aa406a0b4c0d1c4a91b9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Markus=20Fr=C3=B6schle?= Date: Mon, 22 Dec 2014 21:09:46 +0000 Subject: [PATCH] more formatting --- vhdl/rtl/vhdl/Firebee/Firebee.vhd | 104 ++++++++++----------- vhdl/rtl/vhdl/Firebee/Firebee_pkg.vhd | 130 +++++++++++++------------- vhdl/rtl/vhdl/Video/Video_Top.vhd | 112 +++++++++++----------- 3 files changed, 173 insertions(+), 173 deletions(-) diff --git a/vhdl/rtl/vhdl/Firebee/Firebee.vhd b/vhdl/rtl/vhdl/Firebee/Firebee.vhd index 0053e44..78690de 100644 --- a/vhdl/rtl/vhdl/Firebee/Firebee.vhd +++ b/vhdl/rtl/vhdl/Firebee/Firebee.vhd @@ -804,7 +804,7 @@ BEGIN blitter_adr => UNSIGNED(blitter_adr), blitter_sig => blitter_sig, blitter_wr => blitter_wr, - SR_BLITTER_DACK => blitter_dack_sr, + sr_blitter_dack => blitter_dack_sr, STD_LOGIC_VECTOR(ba) => ba, STD_LOGIC_VECTOR(va) => va, STD_LOGIC_VECTOR(fb_le) => fb_le, @@ -817,8 +817,8 @@ BEGIN DDRCLK0 => clk_ddr(0), video_control_register => UNSIGNED(video_ram_ctr), vcke => vcke, - DATA_IN => UNSIGNED(fb_ad), - STD_LOGIC_VECTOR(DATA_OUT) => data_out_ddr_ctrl, + data_in => UNSIGNED(fb_ad), + STD_LOGIC_VECTOR(data_out) => data_out_ddr_ctrl, DATA_EN_H => data_en_h_ddr_ctrl, DATA_EN_L => data_en_l_ddr_ctrl, STD_LOGIC_VECTOR(vdm_sel) => vdm_sel, @@ -845,8 +845,8 @@ BEGIN -- fb_cs_n => fb_cs_n, -- fb_oe_n => fb_oe_n, -- fb_wr_n => fb_wr_n, --- DATA_IN => fb_ad, --- DATA_OUT => data_out_blitter, +-- data_in => fb_ad, +-- data_out => data_out_blitter, -- DATA_EN => data_en_blitter, -- blitter_adr => blitter_adr, -- blitter_sig => blitter_sig, @@ -891,9 +891,9 @@ BEGIN vr_wr => vr_wr, video_reconfig => video_reconfig, - RED => vr, - GREEN => vg, - BLUE => vb, + red => vr, + green => vg, + blue => vb, vsync => vsync_i, hsync => hsync_i, sync_n => sync_n, @@ -1115,7 +1115,7 @@ BEGIN I_MFP: WF68901IP_TOP_SOC PORT MAP( -- System control: - CLK => clk_main, + clk => clk_main, resetn => reset_n, -- Asynchronous bus control: DSn => NOT lds, @@ -1123,18 +1123,18 @@ BEGIN RWn => fb_wr_n, DTACKn => dtack_out_mfp_n, -- Data and Adresses: - RS => fb_adr(5 DOWNTO 1), - DATA_IN => fb_ad(23 DOWNTO 16), - DATA_OUT => data_out_mfp, + rs => fb_adr(5 DOWNTO 1), + data_in => fb_ad(23 DOWNTO 16), + data_out => data_out_mfp, -- DATA_EN => DATA_EN_MFP, -- Not used. - GPIP_IN(7) => NOT drq11_dma, - GPIP_IN(6) => NOT ri, - GPIP_IN(5) => dint_n, - GPIP_IN(4) => acia_irq_n, - GPIP_IN(3) => dsp_int, - GPIP_IN(2) => NOT cts, - GPIP_IN(1) => NOT dcd, - GPIP_IN(0) => lp_busy, + gpip_in(7) => NOT drq11_dma, + gpip_in(6) => NOT ri, + gpip_in(5) => dint_n, + gpip_in(4) => acia_irq_n, + gpip_in(3) => dsp_int, + gpip_in(2) => NOT cts, + gpip_in(1) => NOT dcd, + gpip_in(0) => lp_busy, -- GPIP_OUT =>, -- Not used; all GPIPs are direction INput. -- GPIP_EN =>, -- Not used; all GPIPs are direction INput. -- Interrupt control: @@ -1144,17 +1144,17 @@ BEGIN irq_n => mfp_int_n, -- Timers and timer control: XTAL1 => clk_2m4576, - TAI => '0', - TBI => blank_i_n, + tai => '0', + tbi => blank_i_n, -- TAO =>, -- TBO =>, -- TCO =>, tdo => tdo, -- Serial I/O control: - RC => tdo, - TC => tdo, - SI => rxd, - SO => txd + rc => tdo, + tc => tdo, + si => rxd, + so => txd -- SO_EN => -- Not used. -- DMA control: -- RRn => -- Not used. @@ -1163,66 +1163,66 @@ BEGIN -- I_ACIA_MIDI: WF6850IP_TOP_SOC -- PORT MAP( --- CLK => clk_main, +-- clk => clk_main, -- resetn => reset_n, -- -- CS2n => '0', --- CS1 => fb_adr(2), --- CS0 => acia_cs, +-- cs1 => fb_adr(2), +-- cs0 => acia_cs, -- E => acia_cs, -- RWn => fb_wr_n, --- RS => fb_adr(1), +-- rs => fb_adr(1), -- --- DATA_IN => fb_ad(31 DOWNTO 24), --- DATA_OUT => data_out_acia_iI, +-- data_in => fb_ad(31 DOWNTO 24), +-- data_out => data_out_acia_iI, -- -- DATA_EN => -- Not used. -- --- TXCLK => clk_500k, --- RXCLK => clk_500k, --- RXDATA => midi_in, +-- txclk => clk_500k, +-- rxclk => clk_500k, +-- rxdata => midi_in, -- CTSn => '0', -- DCDn => '0', -- -- irq_n => irq_midi_n, --- TXDATA => midi_out +-- txdata => midi_out -- --RTSn => -- Not used. -- ); I_ACIA_KEYBOARD: WF6850IP_TOP_SOC PORT MAP( - CLK => clk_main, + clk => clk_main, resetn => reset_n, CS2n => fb_adr(2), - CS1 => '1', - CS0 => acia_cs, + cs1 => '1', + cs0 => acia_cs, E => acia_cs, RWn => fb_wr_n, - RS => fb_adr(1), + rs => fb_adr(1), - DATA_IN => fb_ad(31 DOWNTO 24), - DATA_OUT => data_out_acia_i, + data_in => fb_ad(31 DOWNTO 24), + data_out => data_out_acia_i, -- DATA_EN => Not used. - TXCLK => clk_500k, - RXCLK => clk_500k, - RXDATA => keyb_rxd, + txclk => clk_500k, + rxclk => clk_500k, + rxdata => keyb_rxd, CTSn => '0', DCDn => '0', irq_n => irq_keybd_n, - TXDATA => amkb_tx + txdata => amkb_tx --RTSn => -- Not used. ); -- I_SCSI: WF5380_TOP_SOC -- PORT MAP( --- CLK => clk_fdc, +-- clk => clk_fdc, -- resetn => reset_n, -- ADR => ca, --- DATA_IN => data_in_fdc_scsi, --- DATA_OUT => data_out_scsi, +-- data_in => data_in_fdc_scsi, +-- data_out => data_out_scsi, -- --DATA_EN =>, -- -- Bus and DMA controls: -- CSn => scsi_csn, @@ -1271,14 +1271,14 @@ BEGIN -- -- I_FDC: WF1772IP_TOP_SOC -- PORT MAP( --- CLK => clk_fdc, +-- clk => clk_fdc, -- resetn => reset_n, -- CSn => fdc_cs_n, -- RWn => fdc_wr_n, -- A1 => ca(2), -- A0 => ca(1), --- DATA_IN => data_in_fdc_scsi, --- DATA_OUT => data_out_fdc, +-- data_in => data_in_fdc_scsi, +-- data_out => data_out_fdc, -- -- DATA_EN => CD_EN_FDC, -- RDn => FDD_RDn, -- TR00n => FDD_TRACK00, diff --git a/vhdl/rtl/vhdl/Firebee/Firebee_pkg.vhd b/vhdl/rtl/vhdl/Firebee/Firebee_pkg.vhd index 9174ef1..73bd268 100644 --- a/vhdl/rtl/vhdl/Firebee/Firebee_pkg.vhd +++ b/vhdl/rtl/vhdl/Firebee/Firebee_pkg.vhd @@ -48,19 +48,19 @@ LIBRARY IEEE; PACKAGE firebee_pkg IS COMPONENT VIDEO_SYSTEM PORT( - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; CLK_33M : IN STD_LOGIC; CLK_25M : IN STD_LOGIC; - CLK_VIDEO : IN STD_LOGIC; + clk_video : IN STD_LOGIC; CLK_DDR3 : IN STD_LOGIC; CLK_DDR2 : IN STD_LOGIC; CLK_DDR0 : IN STD_LOGIC; CLK_PIXEL : OUT STD_LOGIC; - VR_D : IN STD_LOGIC_VECTOR(8 DOWNTO 0); - VR_BUSY : IN STD_LOGIC; + vr_d : IN STD_LOGIC_VECTOR(8 DOWNTO 0); + vr_busy : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(31 DOWNTO 0); FB_AD_IN : IN STD_LOGIC_VECTOR(31 DOWNTO 0); FB_AD_OUT : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); FB_AD_EN_31_16 : OUT STD_LOGIC; -- Hi word. @@ -72,63 +72,63 @@ PACKAGE firebee_pkg IS fb_size1 : IN STD_LOGIC; fb_size0 : IN STD_LOGIC; - VDP_IN : IN STD_LOGIC_VECTOR(63 DOWNTO 0); + vdp_in : IN STD_LOGIC_VECTOR(63 DOWNTO 0); VR_RD : OUT STD_LOGIC; VR_WR : OUT STD_LOGIC; - VIDEO_RECONFIG : OUT STD_LOGIC; + video_reconfig : OUT STD_LOGIC; - RED : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); - GREEN : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); - BLUE : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); - VSYNC : OUT STD_LOGIC; - HSYNC : OUT STD_LOGIC; + red : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); + green : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); + blue : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); + vsync : OUT STD_LOGIC; + hsync : OUT STD_LOGIC; sync_n : OUT STD_LOGIC; blank_n : OUT STD_LOGIC; pd_vga_n : OUT STD_LOGIC; - VIDEO_MOD_TA : OUT STD_LOGIC; + video_mod_ta : OUT STD_LOGIC; - VD_VZ : OUT STD_LOGIC_VECTOR(127 DOWNTO 0); - SR_FIFO_WRE : IN STD_LOGIC; - SR_VDMP : IN STD_LOGIC_VECTOR(7 DOWNTO 0); - FIFO_MW : OUT UNSIGNED (8 DOWNTO 0); - VDM_SEL : IN STD_LOGIC_VECTOR(3 DOWNTO 0); - VIDEO_RAM_CTR : OUT STD_LOGIC_VECTOR(15 DOWNTO 0); - FIFO_CLR : OUT STD_LOGIC; + vd_vz : OUT STD_LOGIC_VECTOR(127 DOWNTO 0); + sr_fifo_wre : IN STD_LOGIC; + sr_vdmp : IN STD_LOGIC_VECTOR(7 DOWNTO 0); + fifo_mw : OUT UNSIGNED (8 DOWNTO 0); + vdm_sel : IN STD_LOGIC_VECTOR(3 DOWNTO 0); + video_ram_ctr : OUT STD_LOGIC_VECTOR(15 DOWNTO 0); + fifo_clr : OUT STD_LOGIC; - VDM : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); + vdm : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); - BLITTER_RUN : IN STD_LOGIC; - BLITTER_ON : OUT STD_LOGIC + blitter_run : IN STD_LOGIC; + blitter_on : OUT STD_LOGIC ); END COMPONENT; COMPONENT VIDEO_CTRL PORT( - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; fb_cs_n : IN STD_LOGIC_VECTOR(2 DOWNTO 1); fb_wr_n : IN STD_LOGIC; fb_oe_n : IN STD_LOGIC; - FB_SIZE : IN STD_LOGIC_VECTOR(1 DOWNTO 0); - FB_ADR : IN STD_LOGIC_VECTOR(31 DOWNTO 0); - CLK33M : IN STD_LOGIC; - CLK25M : IN STD_LOGIC; - BLITTER_RUN : IN STD_LOGIC; - CLK_VIDEO : IN STD_LOGIC; - VR_D : IN STD_LOGIC_VECTOR(8 DOWNTO 0); - VR_BUSY : IN STD_LOGIC; - COLOR8 : OUT STD_LOGIC; - FBEE_CLUT_RD : OUT STD_LOGIC; - COLOR1 : OUT STD_LOGIC; - FALCON_CLUT_RDH : OUT STD_LOGIC; - FALCON_CLUT_RDL : OUT STD_LOGIC; - FALCON_CLUT_WR : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); - CLUT_ST_RD : OUT STD_LOGIC; - CLUT_ST_WR : OUT STD_LOGIC_VECTOR(1 DOWNTO 0); - CLUT_MUX_ADR : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); - HSYNC : OUT STD_LOGIC; - VSYNC : OUT STD_LOGIC; + fb_size : IN STD_LOGIC_VECTOR(1 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + clk33m : IN STD_LOGIC; + clk25m : IN STD_LOGIC; + blitter_run : IN STD_LOGIC; + clk_video : IN STD_LOGIC; + vr_d : IN STD_LOGIC_VECTOR(8 DOWNTO 0); + vr_busy : IN STD_LOGIC; + color8 : OUT STD_LOGIC; + fbee_clut_rd : OUT STD_LOGIC; + color1 : OUT STD_LOGIC; + falcon_clut_rdh : OUT STD_LOGIC; + falcon_clut_rdl : OUT STD_LOGIC; + falcon_clut_wr : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); + clut_st_rd : OUT STD_LOGIC; + clut_st_wr : OUT STD_LOGIC_VECTOR(1 DOWNTO 0); + clut_mux_adr : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); + hsync : OUT STD_LOGIC; + vsync : OUT STD_LOGIC; blank_n : OUT STD_LOGIC; sync_n : OUT STD_LOGIC; pd_vga_n : OUT STD_LOGIC; @@ -137,18 +137,18 @@ PACKAGE firebee_pkg IS COLOR4 : OUT STD_LOGIC; CLK_PIXEL : OUT STD_LOGIC; CLUT_OFF : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); - BLITTER_ON : OUT STD_LOGIC; - VIDEO_RAM_CTR : OUT STD_LOGIC_VECTOR(15 DOWNTO 0); - VIDEO_MOD_TA : OUT STD_LOGIC; + blitter_on : OUT STD_LOGIC; + video_ram_ctr : OUT STD_LOGIC_VECTOR(15 DOWNTO 0); + video_mod_ta : OUT STD_LOGIC; CCR : OUT STD_LOGIC_VECTOR(23 DOWNTO 0); CCSEL : OUT STD_LOGIC_VECTOR(2 DOWNTO 0); FBEE_CLUT_WR : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); INTER_ZEI : OUT STD_LOGIC; DOP_FIFO_CLR : OUT STD_LOGIC; - VIDEO_RECONFIG : OUT STD_LOGIC; + video_reconfig : OUT STD_LOGIC; VR_WR : OUT STD_LOGIC; VR_RD : OUT STD_LOGIC; - FIFO_CLR : OUT STD_LOGIC; + fifo_clr : OUT STD_LOGIC; DATA_IN : IN STD_LOGIC_VECTOR(31 DOWNTO 0); DATA_OUT : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); DATA_EN_H : OUT STD_LOGIC; @@ -207,9 +207,9 @@ PACKAGE firebee_pkg IS COMPONENT INTHANDLER PORT( - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; RESETn : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(31 DOWNTO 0); fb_cs_n : IN STD_LOGIC_VECTOR(2 DOWNTO 1); fb_size0 : IN STD_LOGIC; fb_size1 : IN STD_LOGIC; @@ -230,8 +230,8 @@ PACKAGE firebee_pkg IS pci_intd_n : IN STD_LOGIC; mfp_int_n : IN STD_LOGIC; DSP_INT : IN STD_LOGIC; - VSYNC : IN STD_LOGIC; - HSYNC : IN STD_LOGIC; + vsync : IN STD_LOGIC; + hsync : IN STD_LOGIC; DRQ_DMA : IN STD_LOGIC; irq_n : OUT STD_LOGIC_VECTOR(7 DOWNTO 2); INT_HANDLER_TA : OUT STD_LOGIC; @@ -243,12 +243,12 @@ PACKAGE firebee_pkg IS COMPONENT FBEE_DMA is PORT( RESET : IN STD_LOGIC; - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; CLK_FDC : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(26 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(26 DOWNTO 0); FB_ALE : IN STD_LOGIC; - FB_SIZE : IN STD_LOGIC_VECTOR(1 DOWNTO 0); + fb_size : IN STD_LOGIC_VECTOR(1 DOWNTO 0); fb_cs_n : IN STD_LOGIC_VECTOR(2 DOWNTO 1); fb_oe_n : IN STD_LOGIC; fb_wr_n : IN STD_LOGIC; @@ -297,9 +297,9 @@ PACKAGE firebee_pkg IS COMPONENT IDE_CF_SD_ROM is PORT( RESET : IN STD_LOGIC; - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(19 DOWNTO 5); + fb_adr : IN STD_LOGIC_VECTOR(19 DOWNTO 5); FB_CS1n : IN STD_LOGIC; fb_wr_n : IN STD_LOGIC; FB_B0 : IN STD_LOGIC; @@ -341,9 +341,9 @@ PACKAGE firebee_pkg IS COMPONENT FBEE_BLITTER is PORT( RESETn : IN STD_LOGIC; - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; CLK_DDR0 : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(31 DOWNTO 0); FB_ALE : IN STD_LOGIC; fb_size1 : IN STD_LOGIC; fb_size0 : IN STD_LOGIC; @@ -353,10 +353,10 @@ PACKAGE firebee_pkg IS DATA_IN : IN STD_LOGIC_VECTOR(31 DOWNTO 0); DATA_OUT : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); DATA_EN : OUT STD_LOGIC; - BLITTER_ON : IN STD_LOGIC; + blitter_on : IN STD_LOGIC; BLITTER_DIN : IN STD_LOGIC_VECTOR(127 DOWNTO 0); BLITTER_DACK_SR : IN STD_LOGIC; - BLITTER_RUN : OUT STD_LOGIC; + blitter_run : OUT STD_LOGIC; BLITTER_DOUT : OUT STD_LOGIC_VECTOR(127 DOWNTO 0); BLITTER_ADR : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); BLITTER_SIG : OUT STD_LOGIC; @@ -368,7 +368,7 @@ PACKAGE firebee_pkg IS COMPONENT DSP is PORT( CLK_33M : IN STD_LOGIC; - CLK_MAIN : IN STD_LOGIC; + clk_main : IN STD_LOGIC; fb_oe_n : IN STD_LOGIC; fb_wr_n : IN STD_LOGIC; FB_CS1n : IN STD_LOGIC; @@ -376,7 +376,7 @@ PACKAGE firebee_pkg IS fb_size0 : IN STD_LOGIC; fb_size1 : IN STD_LOGIC; FB_BURSTn : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(31 DOWNTO 0); RESETn : IN STD_LOGIC; FB_CS3n : IN STD_LOGIC; SRCSn : OUT STD_LOGIC; @@ -569,8 +569,8 @@ PACKAGE firebee_pkg IS COMPONENT RTC is PORT( - CLK_MAIN : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(19 DOWNTO 0); + clk_main : IN STD_LOGIC; + fb_adr : IN STD_LOGIC_VECTOR(19 DOWNTO 0); FB_CS1n : IN STD_LOGIC; fb_size0 : IN STD_LOGIC; fb_size1 : IN STD_LOGIC; diff --git a/vhdl/rtl/vhdl/Video/Video_Top.vhd b/vhdl/rtl/vhdl/Video/Video_Top.vhd index 10921c6..a0a29a7 100644 --- a/vhdl/rtl/vhdl/Video/Video_Top.vhd +++ b/vhdl/rtl/vhdl/Video/Video_Top.vhd @@ -52,58 +52,58 @@ LIBRARY IEEE; ENTITY VIDEO_SYSTEM IS PORT ( - CLK_MAIN : IN STD_LOGIC; - CLK_33M : IN STD_LOGIC; - CLK_25M : IN STD_LOGIC; - CLK_VIDEO : IN STD_LOGIC; + clk_main : IN STD_LOGIC; + clk_33m : IN STD_LOGIC; + clk_25m : IN STD_LOGIC; + clk_video : IN STD_LOGIC; clk_ddr3 : IN STD_LOGIC; clk_ddr2 : IN STD_LOGIC; clk_ddr0 : IN STD_LOGIC; clk_pixel : OUT STD_LOGIC; - VR_D : IN STD_LOGIC_VECTOR(8 DOWNTO 0); - VR_BUSY : IN STD_LOGIC; + vr_d : IN STD_LOGIC_VECTOR(8 DOWNTO 0); + vr_busy : IN STD_LOGIC; - FB_ADR : IN STD_LOGIC_VECTOR(31 DOWNTO 0); - FB_AD_IN : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + fb_adr : IN STD_LOGIC_VECTOR(31 DOWNTO 0); + fb_ad_in : IN STD_LOGIC_VECTOR(31 DOWNTO 0); fb_ad_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0); fb_ad_en_31_16 : OUT STD_LOGIC; -- Hi word. fb_ad_en_15_0 : OUT STD_LOGIC; -- Low word. - FB_ALE : IN STD_LOGIC; + fb_ale : IN STD_LOGIC; fb_cs_n : IN STD_LOGIC_VECTOR(3 DOWNTO 1); fb_oe_n : IN STD_LOGIC; fb_wr_n : IN STD_LOGIC; - FB_SIZE1 : IN STD_LOGIC; - FB_SIZE0 : IN STD_LOGIC; + fb_size1 : IN STD_LOGIC; + fb_size0 : IN STD_LOGIC; vdp_in : IN STD_LOGIC_VECTOR(63 DOWNTO 0); - VR_RD : OUT STD_LOGIC; - VR_WR : OUT STD_LOGIC; - VIDEO_RECONFIG : OUT STD_LOGIC; + vr_rd : OUT STD_LOGIC; + vr_wr : OUT STD_LOGIC; + video_reconfig : OUT STD_LOGIC; red : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); green : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); blue : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); - VSYNC : OUT STD_LOGIC; - HSYNC : OUT STD_LOGIC; + vsync : OUT STD_LOGIC; + hsync : OUT STD_LOGIC; sync_n : OUT STD_LOGIC; blank_n : OUT STD_LOGIC; pd_vga_n : OUT STD_LOGIC; - VIDEO_MOD_TA : OUT STD_LOGIC; + video_mod_ta : OUT STD_LOGIC; vd_vz : OUT STD_LOGIC_VECTOR(127 DOWNTO 0); sr_fifo_wre : IN STD_LOGIC; sr_vdmp : IN STD_LOGIC_VECTOR(7 DOWNTO 0); - FIFO_MW : OUT STD_LOGIC_VECTOR(8 DOWNTO 0); + fifo_mw : OUT STD_LOGIC_VECTOR(8 DOWNTO 0); vdm_sel : IN STD_LOGIC_VECTOR(3 DOWNTO 0); - VIDEO_RAM_CTR : OUT STD_LOGIC_VECTOR(15 DOWNTO 0); + video_ram_ctr : OUT STD_LOGIC_VECTOR(15 DOWNTO 0); fifo_clr : OUT STD_LOGIC; vdm : OUT STD_LOGIC_VECTOR(3 DOWNTO 0); - BLITTER_RUN : IN STD_LOGIC; - BLITTER_ON : OUT STD_LOGIC + blitter_run : IN STD_LOGIC; + blitter_on : OUT STD_LOGIC ); END ENTITY VIDEO_SYSTEM; @@ -183,7 +183,7 @@ ARCHITECTURE BEHAVIOUR OF VIDEO_SYSTEM is SIGNAL CC_SEL : STD_LOGIC_VECTOR(2 DOWNTO 0); SIGNAL fifo_clr_i : STD_LOGIC; - SIGNAL DOP_FIFO_CLR : STD_LOGIC; + SIGNAL dop_fifo_clr : STD_LOGIC; SIGNAL fifo_wre : STD_LOGIC; SIGNAL fifo_rd_req_128 : STD_LOGIC; @@ -218,36 +218,36 @@ BEGIN VARIABLE clut_st_index : INTEGER; VARIABLE clut_fi_index : INTEGER; BEGIN - clut_st_index := TO_INTEGER(UNSIGNED(FB_ADR(4 DOWNTO 1))); - clut_fa_index := TO_INTEGER(UNSIGNED(FB_ADR(9 DOWNTO 2))); - clut_fi_index := TO_INTEGER(UNSIGNED(FB_ADR(9 DOWNTO 2))); + clut_st_index := TO_INTEGER(UNSIGNED(fb_adr(4 DOWNTO 1))); + clut_fa_index := TO_INTEGER(UNSIGNED(fb_adr(9 DOWNTO 2))); + clut_fi_index := TO_INTEGER(UNSIGNED(fb_adr(9 DOWNTO 2))); - WAIT UNTIL RISING_EDGE(CLK_MAIN); + WAIT UNTIL RISING_EDGE(clk_main); IF clut_st_wr(0) = '1' THEN - clut_st(clut_st_index)(11 DOWNTO 8) <= FB_AD_IN(27 DOWNTO 24); + clut_st(clut_st_index)(11 DOWNTO 8) <= fb_ad_in(27 DOWNTO 24); END IF; IF clut_st_wr(1) = '1' THEN - clut_st(clut_st_index)(7 DOWNTO 0) <= FB_AD_IN(23 DOWNTO 16); + clut_st(clut_st_index)(7 DOWNTO 0) <= fb_ad_in(23 DOWNTO 16); END IF; IF clut_fa_wr(0) = '1' THEN - clut_fa(clut_fa_index)(17 DOWNTO 12) <= FB_AD_IN(31 DOWNTO 26); + clut_fa(clut_fa_index)(17 DOWNTO 12) <= fb_ad_in(31 DOWNTO 26); END IF; IF clut_fa_wr(1) = '1' THEN - clut_fa(clut_fa_index)(11 DOWNTO 6) <= FB_AD_IN(23 DOWNTO 18); + clut_fa(clut_fa_index)(11 DOWNTO 6) <= fb_ad_in(23 DOWNTO 18); END IF; IF clut_fa_wr(3) = '1' THEN - clut_fa(clut_fa_index)(5 DOWNTO 0) <= FB_AD_IN(23 DOWNTO 18); + clut_fa(clut_fa_index)(5 DOWNTO 0) <= fb_ad_in(23 DOWNTO 18); END IF; IF clut_fbee_wr(1) = '1' THEN - clut_fi(clut_fi_index)(23 DOWNTO 16) <= FB_AD_IN(23 DOWNTO 16); + clut_fi(clut_fi_index)(23 DOWNTO 16) <= fb_ad_in(23 DOWNTO 16); END IF; IF clut_fbee_wr(2) = '1' THEN - clut_fi(clut_fi_index)(15 DOWNTO 8) <= FB_AD_IN(15 DOWNTO 8); + clut_fi(clut_fi_index)(15 DOWNTO 8) <= fb_ad_in(15 DOWNTO 8); END IF; IF clut_fbee_wr(3) = '1' THEN - clut_fi(clut_fi_index)(7 DOWNTO 0) <= FB_AD_IN(7 DOWNTO 0); + clut_fi(clut_fi_index)(7 DOWNTO 0) <= fb_ad_in(7 DOWNTO 0); END IF; -- clut_st_out <= clut_st(clut_st_index); @@ -484,12 +484,12 @@ BEGIN wrreq => fifo_wre, q => fifo_d_out_512, --rdempty =>, -- Not d. - wrusedw => FIFO_MW + wrusedw => fifo_mw ); I_FIFO_DZ: lpm_fifoDZ PORT map( - aclr => DOP_FIFO_CLR, + aclr => dop_fifo_clr, clock => clk_pixel_i, data => fifo_d_out_512, rdreq => fifo_rd_req_128, @@ -499,20 +499,20 @@ BEGIN I_VIDEO_CTRL: VIDEO_CTRL PORT map( - CLK_MAIN => CLK_MAIN, + clk_main => clk_main, fb_cs_n(1) => fb_cs_n(1), fb_cs_n(2) => fb_cs_n(2), fb_wr_n => fb_wr_n, fb_oe_n => fb_oe_n, - FB_SIZE(0) => FB_SIZE0, - FB_SIZE(1) => FB_SIZE1, - FB_ADR => FB_ADR, - CLK33M => CLK_33M, - CLK25M => CLK_25M, - BLITTER_RUN => BLITTER_RUN, - CLK_VIDEO => CLK_VIDEO, - VR_D => VR_D, - VR_BUSY => VR_BUSY, + FB_SIZE(0) => fb_size0, + FB_SIZE(1) => fb_size1, + fb_adr => fb_adr, + CLK33M => clk_33m, + CLK25M => clk_25m, + blitter_run => blitter_run, + clk_video => clk_video, + vr_d => vr_d, + vr_busy => vr_busy, color8 => color8, FBEE_CLUT_RD => clut_fbee_rd, COLOR1 => COLOR1, @@ -522,8 +522,8 @@ BEGIN clut_st_rd => clut_st_rd, clut_st_wr => clut_st_wr, CLUT_MUX_ADR => clut_adr_mux, - HSYNC => HSYNC, - VSYNC => VSYNC, + hsync => hsync, + vsync => vsync, blank_n => blank_n, sync_n => sync_n, pd_vga_n => pd_vga_n, @@ -532,19 +532,19 @@ BEGIN color4 => color4, clk_pixel => clk_pixel_i, clut_off => clut_off, - BLITTER_ON => BLITTER_ON, - VIDEO_RAM_CTR => VIDEO_RAM_CTR, - VIDEO_MOD_TA => VIDEO_MOD_TA, + blitter_on => blitter_on, + video_ram_ctr => video_ram_ctr, + video_mod_ta => video_mod_ta, ccr => ccr, CCSEL => CC_SEL, FBEE_CLUT_WR => clut_fbee_wr, inter_zei => inter_zei, - DOP_FIFO_CLR => DOP_FIFO_CLR, - VIDEO_RECONFIG => VIDEO_RECONFIG, - VR_WR => VR_WR, - VR_RD => VR_RD, + dop_fifo_clr => dop_fifo_clr, + video_reconfig => video_reconfig, + vr_wr => vr_wr, + vr_rd => vr_rd, fifo_clr => fifo_clr_i, - DATA_IN => FB_AD_IN, + DATA_IN => fb_ad_in, DATA_OUT => data_out_video_ctrl, DATA_EN_H => data_en_h_video_ctrl, DATA_EN_L => data_en_l_video_ctrl