Firebee/FireBee_SVN
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

added setjmp()/longjmp() (used by NetBSD x86 emulator)

Browse Source 
modified x86pcibios.c to work with NetBSD x86 emulator
This commit is contained in:
Markus Fröschle
2015-02-17 14:43:11 +00:00
parent 5cf48838c6
commit 13209134c3
10 changed files with 305 additions and 118 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
BaS_gcc.files
View File

@@ -202,3 +202,7 @@ x86emu/x86biosemu.c
x86emu/x86emu.c
x86emu/x86pcibios.c
util/libgcc_helper.S
util/setjmp.c
util/setjmp.S
include/x86emu_regs.h
x86emu/x86emu_util.c

4
Makefile
View File

@@ -138,6 +138,9 @@ CSRCS= \
fnt_st_8x16.c \
\
x86emu.c \
x86pcibios.c \
x86biosemu.c \
x86emu_util.c \
\
basflash.c \
basflash_start.c
@@ -147,6 +150,7 @@ ASRCS= \
startcf.S \
printf_helper.S \
exceptions.S \
setjmp.S \
xhdi_vec.S \
pci_wrappers.S

2
bas.lk.in
View File

@@ -42,6 +42,7 @@ SECTIONS
#endif /* MACHINE_FIREBEE */
OBJDIR/wait.o(.text)
OBJDIR/exceptions.o(.text)
OBJDIR/setjmp.o(.text)
OBJDIR/driver_vec.o(.text)
OBJDIR/interrupts.o(.text)
OBJDIR/mmu.o(.text)
@@ -97,6 +98,7 @@ SECTIONS
OBJDIR/offscreen.o(.text)
OBJDIR/x86emu.o(.text)
OBJDIR/x86emu_util.o(.text)
OBJDIR/radeon_base.o(.text)
OBJDIR/radeon_accel.o(.text)

3
include/x86emu.h
View File

@@ -113,7 +113,8 @@ struct X86EMU_regs {
typedef uint32_t label_t;
struct X86EMU {
struct X86EMU
{
char *mem_base;
size_t mem_size;
void *sys_private;

2
sys/mmu.c
View File

@@ -79,7 +79,7 @@
#else
#define dbg(format, arg...) do {;} while (0)
#endif /* DBG_MMU */
#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0);
#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0)
/*
* set ASID register

16
util/setjmp.S Normal file
View File

@@ -0,0 +1,16 @@
.globl _setjmp
.globl _longjmp
_setjmp: move.l 4(sp),a0 // address of jmp_buf[]
move.l (sp),(a0) // save return address
movem.l d2-d7/a2-a7,4(a0) // save registers to jmp_buf
clr.l d0
rts
_longjmp: move.l 4(sp),a0 // address of jmp_buf[]
move.l 8(sp),d0 // value to return
jne not_0 // value may not be 0
moveq.l #1,d0
not_0: movem.l 4(a0),d2-d7/a2-a7 // restore registers
move.l (a0),(sp) // restore saved return address
rts

3
x86emu/x86biosemu.c
View File

@@ -274,8 +274,7 @@ void run_bios(struct radeonfb_info *rinfo)
if ((rinfo->mmio_base == NULL) || (rinfo->io_base == NULL))
{
dbg("%s: rinfo->mmio_base = %p, rinfo->io_base = %p\r\n",
__FUNCTION__, rinfo->mmio_base, rinfo->io_base);
dbg("rinfo->mmio_base = %p, rinfo->io_base = %p\r\n", rinfo->mmio_base, rinfo->io_base);
return;
}

149
x86emu/x86emu_util.c Normal file
View File

@@ -0,0 +1,149 @@
/* $NetBSD: x86emu_util.c,v 1.1 2007/11/30 20:02:50 joerg Exp $ */
/****************************************************************************
*
* Realmode X86 Emulator Library
*
* Copyright (C) 1996-1999 SciTech Software, Inc.
* Copyright (C) David Mosberger-Tang
* Copyright (C) 1999 Egbert Eich
* Copyright (C) 2007 Joerg Sonnenberger
*
* ========================================================================
*
* Permission to use, copy, modify, distribute, and sell this software and
* its documentation for any purpose is hereby granted without fee,
* provided that the above copyright notice appear in all copies and that
* both that copyright notice and this permission notice appear in
* supporting documentation, and that the name of the authors not be used
* in advertising or publicity pertaining to distribution of the software
* without specific, written prior permission. The authors makes no
* representations about the suitability of this software for any purpose.
* It is provided "as is" without express or implied warranty.
*
* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*
****************************************************************************/
#include "x86emu.h"
#include "x86emu_regs.h"
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
RETURNS:
Byte value read from emulator memory.
REMARKS:
Reads a byte value from the emulator memory.
****************************************************************************/
static uint8_t
rdb(struct X86EMU *emu, uint32_t addr)
{
if (addr > emu->mem_size - 1)
X86EMU_halt_sys(emu);
return emu->mem_base[addr];
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
RETURNS:
Word value read from emulator memory.
REMARKS:
Reads a word value from the emulator memory.
****************************************************************************/
static uint16_t
rdw(struct X86EMU *emu, uint32_t addr)
{
if (addr > emu->mem_size - 2)
X86EMU_halt_sys(emu);
return le16dec(emu->mem_base + addr);
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
RETURNS:
Long value read from emulator memory.
REMARKS:
Reads a long value from the emulator memory.
****************************************************************************/
static uint32_t
rdl(struct X86EMU *emu, uint32_t addr)
{
if (addr > emu->mem_size - 4)
X86EMU_halt_sys(emu);
return le32dec(emu->mem_base + addr);
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
val - Value to store
REMARKS:
Writes a byte value to emulator memory.
****************************************************************************/
static void
wrb(struct X86EMU *emu, uint32_t addr, uint8_t val)
{
if (addr > emu->mem_size - 1)
X86EMU_halt_sys(emu);
emu->mem_base[addr] = val;
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
val - Value to store
REMARKS:
Writes a word value to emulator memory.
****************************************************************************/
static void
wrw(struct X86EMU *emu, uint32_t addr, uint16_t val)
{
if (addr > emu->mem_size - 2)
X86EMU_halt_sys(emu);
le16enc(emu->mem_base + addr, val);
}
/****************************************************************************
PARAMETERS:
addr - Emulator memory address to read
val - Value to store
REMARKS:
Writes a long value to emulator memory.
****************************************************************************/
static void
wrl(struct X86EMU *emu, uint32_t addr, uint32_t val)
{
if (addr > emu->mem_size - 4)
X86EMU_halt_sys(emu);
le32enc(emu->mem_base + addr, val);
}
/*----------------------------- Setup -------------------------------------*/
void
X86EMU_init_default(struct X86EMU *emu)
{
int i;
emu->emu_rdb = rdb;
emu->emu_rdw = rdw;
emu->emu_rdl = rdl;
emu->emu_wrb = wrb;
emu->emu_wrw = wrw;
emu->emu_wrl = wrl;
for (i = 0; i < 256; i++)
emu->_X86EMU_intrTab[i] = NULL;
}

174
x86emu/x86pcibios.c
View File

@@ -2,161 +2,173 @@
#include "pci.h"
#include "x86emu.h"
#include "x86pcibios.h"
#include "x86emu_regs.h"
#include "bas_printf.h"
extern unsigned short offset_port;
int x86_pcibios_emulator()
#define DBG_PCIBIOS
#ifdef DBG_PCIBIOS
#define dbg(format, arg...) do { xprintf("DEBUG (%s()): " format, __FUNCTION__, ##arg);} while(0)
#else
#define dbg(format, arg...) do {;} while (0)
#endif /* DBG_PCIBIOS */
#define err(format, arg...) do { xprintf("ERROR (%s()): " format, __FUNCTION__, ##arg); } while(0);
int x86_pcibios_handler(struct X86EMU *emu)
{
int ret = 0;
unsigned long dev;
switch (X86_AX)
switch (emu->x86.R_AX)
{
case PCI_BIOS_PRESENT:
dbg("%s: PCI_BIOS_PRESENT\r\n", __FUNCTION__);
X86_AH = 0x00; /* no config space/special cycle support */
X86_AL = 0x01; /* config mechanism 1 */
X86_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24;
X86_EBX = 0x0210; /* Version 2.10 */
X86_ECX = 0xFF00; /* FixME: Max bus number */
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
dbg("PCI_BIOS_PRESENT\r\n");
emu->x86.R_AH = 0x00; /* no config space/special cycle support */
emu->x86.R_AL = 0x01; /* config mechanism 1 */
emu->x86.R_EDX = 'P' | 'C' << 8 | 'I' << 16 | ' ' << 24;
emu->x86.R_EBX = 0x0210; /* Version 2.10 */
emu->x86.R_ECX = 0xFF00; /* FixME: Max bus number */
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case FIND_PCI_DEVICE:
dbg("%s: FIND_PCI_DEVICE vendor = %04x, device = %04x\r\n", __FUNCTION__, X86_DX, X86_CX);
dev = pci_find_device((unsigned long) X86_DX, ((unsigned long) X86_CX), 0);
dbg("FIND_PCI_DEVICE vendor = %04x, device = %04x\r\n", emu->x86.R_DX, emu->x86.R_CX);
dev = pci_find_device((unsigned long) emu->x86.R_DX, ((unsigned long) emu->x86.R_CX), 0);
if (dev != 0)
{
dbg("%s: ... OK\r\n", __FUNCTION__);
X86_BH = PCI_BUS_FROM_HANDLE(dev);
dbg("dev = %d\r\n", dev);
emu->x86.R_BH = PCI_BUS_FROM_HANDLE(dev);
//X86_BH = (char)(dev >> 16) / PCI_MAX_FUNCTION); // dev->bus->secondary;
X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
emu->x86.R_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
//X86_BL = (char)dev; // dev->path.u.pci.devfn;
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
} else {
dbg("%s: ... error\r\n", __FUNCTION__);
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
}
else
{
dbg("device not found\r\n");
emu->x86.R_AH = DEVICE_NOT_FOUND;
emu->x86.R_EFLG |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case FIND_PCI_CLASS_CODE:
/* FixME: support SI != 0 */
dbg("%s: FIND_PCI_CLASS_CODE %x\r\n", __FUNCTION__, X86_ECX);
dev = pci_find_classcode(X86_ECX, 0);
dbg("FIND_PCI_CLASS_CODE %x", emu->x86.R_ECX);
dev = pci_find_classcode(emu->x86.R_ECX, 0);
if (dev != 0) {
dbg("%s: ... OK\r\n", __FUNCTION__);
X86_BH = PCI_BUS_FROM_HANDLE(dev);
X86_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
dbg(" ...OK\r\n");
emu->x86.R_BH = PCI_BUS_FROM_HANDLE(dev);
emu->x86.R_BL = PCI_DEVICE_FROM_HANDLE(dev) << 3 | PCI_FUNCTION_FROM_HANDLE(dev);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
}
else
{
dbg("%s: ... error\r\n", __FUNCTION__);
X86_AH = DEVICE_NOT_FOUND;
X86_EFLAGS |= FB_CF; /* set carry flag */
dbg(" ... error\r\n");
emu->x86.R_AH = DEVICE_NOT_FOUND;
emu->x86.R_EFLG |= FB_CF; /* set carry flag */
ret = 0;
}
break;
case READ_CONFIG_BYTE:
// bus, devfn
dbg("%s: READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI);
dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3);
X86_CL = pci_read_config_byte(dev, X86_DI);
dbg("%s: value = %x\r\n", __FUNCTION__, X86_CL);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
emu->x86.R_CL = pci_read_config_byte(dev, emu->x86.R_DI);
dbg("value = %x\r\n", emu->x86.R_CL);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case READ_CONFIG_WORD:
// bus, devfn
dbg("%s: READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI);
dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3);
if(X86_DI == PCIBAR1)
X86_CX = offset_port + 1;
dbg("READ_CONFIG_WORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
if (emu->x86.R_DI == PCIBAR1)
emu->x86.R_CX = offset_port + 1;
else
X86_CX = pci_read_config_word(dev, X86_DI);
dbg("%s: value = %x\r\n", __FUNCTION__, X86_CX);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
emu->x86.R_CX = pci_read_config_word(dev, emu->x86.R_DI);
dbg("value = %x\r\n", emu->x86.R_CX);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case READ_CONFIG_DWORD:
// bus, devfn
dbg("%s: READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", __FUNCTION__, X86_BH, X86_BL, X86_DI);
dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3);
if (X86_DI == PCIBAR1)
X86_CX = (unsigned long) offset_port + 1;
dbg("READ_CONFIG_DWORD bus = %x, devfn = %x, reg = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI);
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
if (emu->x86.R_DI == PCIBAR1)
emu->x86.R_CX = (unsigned long) offset_port + 1;
else
X86_ECX = pci_read_config_longword(dev, X86_DI);
dbg("%s: value = %x\r\n", __FUNCTION__, X86_ECX);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
emu->x86.R_ECX = pci_read_config_longword(dev, emu->x86.R_DI);
dbg("value = %x\r\n", emu->x86.R_ECX);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case WRITE_CONFIG_BYTE:
// bus, devfn
dbg("%s: READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x, value = %x\r\n", __FUNCTION__,
X86_BH, X86_BL, X86_DI, X86_CL);
dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3);
pci_write_config_byte(dev, X86_DI, X86_CL);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
dbg("READ_CONFIG_BYTE bus = %x, devfn = %x, reg = %x, value = %x\r\n",
emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CL);
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
pci_write_config_byte(dev, emu->x86.R_DI, emu->x86.R_CL);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case WRITE_CONFIG_WORD:
// bus, devfn
dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3);
dbg("%s: WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", X86_BH, X86_BL, X86_DI, X86_CX);
if (X86_DI == PCIBAR1)
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
dbg("WRITE_CONFIG_WORD bus = %x, devfn = %x, reg = %x, value = %x\r\n", emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_CX);
if (emu->x86.R_DI == PCIBAR1)
{
offset_port = X86_CX;
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
offset_port = emu->x86.R_CX;
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
}
pci_write_config_word(dev, X86_DI, X86_CX);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
pci_write_config_word(dev, emu->x86.R_DI, emu->x86.R_CX);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
case WRITE_CONFIG_DWORD:
// bus, devfn
dev = PCI_HANDLE(X86_BH, X86_BL >> 3, X86_BL & 3);
dbg("%s: WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n", __FUNCTION__,
X86_BH, X86_BL, X86_DI, X86_ECX);
if (X86_DI == PCIBAR1)
dev = PCI_HANDLE(emu->x86.R_BH, emu->x86.R_BL >> 3, emu->x86.R_BL & 3);
dbg("WRITE_CONFIG_DWORD bus = %x, devfn = %x, value = %x\r\n",
emu->x86.R_BH, emu->x86.R_BL, emu->x86.R_DI, emu->x86.R_ECX);
if (emu->x86.R_DI == PCIBAR1)
{
offset_port = (unsigned short) X86_ECX & 0xFFFC;
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
offset_port = (unsigned short) emu->x86.R_ECX & 0xFFFC;
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
}
pci_write_config_longword(dev, X86_DI, X86_ECX);
X86_AH = SUCCESSFUL;
X86_EFLAGS &= ~FB_CF; /* clear carry flag */
pci_write_config_longword(dev, emu->x86.R_DI, emu->x86.R_ECX);
emu->x86.R_AH = SUCCESSFUL;
emu->x86.R_EFLG &= ~FB_CF; /* clear carry flag */
ret = 1;
break;
default:
dbg("%s: PCI_BIOS FUNC_NOT_SUPPORTED\r\n", __FUNCTION__);
X86_AH = FUNC_NOT_SUPPORTED;
X86_EFLAGS |= FB_CF;
dbg("PCI_BIOS FUNC_NOT_SUPPORTED\r\n");
emu->x86.R_AH = FUNC_NOT_SUPPORTED;
emu->x86.R_EFLG |= FB_CF;
break;
}